1/**************************************************************************
2
3Copyright (c) 2007, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10    this list of conditions and the following disclaimer.
11
12 2. Neither the name of the Chelsio Corporation nor the names of its
13    contributors may be used to endorse or promote products derived from
14    this software without specific prior written permission.
15
16THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28$FreeBSD$
29
30***************************************************************************/
31#ifndef _FIRMWARE_EXPORTS_H_
32#define _FIRMWARE_EXPORTS_H_
33
34/* WR OPCODES supported by the firmware.
35 */
36#define	FW_WROPCODE_FORWARD			0x01
37#define FW_WROPCODE_BYPASS			0x05
38
39#define FW_WROPCODE_TUNNEL_TX_PKT		0x03
40
41#define FW_WROPOCDE_ULPTX_DATA_SGL		0x00
42#define FW_WROPCODE_ULPTX_MEM_READ		0x02
43#define FW_WROPCODE_ULPTX_PKT			0x04
44#define FW_WROPCODE_ULPTX_INVALIDATE		0x06
45
46#define FW_WROPCODE_TUNNEL_RX_PKT		0x07
47
48#define FW_WROPCODE_OFLD_GETTCB_RPL		0x08
49#define FW_WROPCODE_OFLD_CLOSE_CON		0x09
50#define FW_WROPCODE_OFLD_TP_ABORT_CON_REQ	0x0A
51#define FW_WROPCODE_OFLD_HOST_ABORT_CON_RPL	0x0F
52#define FW_WROPCODE_OFLD_HOST_ABORT_CON_REQ	0x0B
53#define FW_WROPCODE_OFLD_TP_ABORT_CON_RPL	0x0C
54#define FW_WROPCODE_OFLD_TX_DATA		0x0D
55#define FW_WROPCODE_OFLD_TX_DATA_ACK		0x0E
56
57#define FW_WROPCODE_RI_RDMA_INIT		0x10
58#define FW_WROPCODE_RI_RDMA_WRITE		0x11
59#define FW_WROPCODE_RI_RDMA_READ_REQ		0x12
60#define FW_WROPCODE_RI_RDMA_READ_RESP		0x13
61#define FW_WROPCODE_RI_SEND			0x14
62#define FW_WROPCODE_RI_TERMINATE		0x15
63#define FW_WROPCODE_RI_RDMA_READ		0x16
64#define FW_WROPCODE_RI_RECEIVE			0x17
65#define FW_WROPCODE_RI_BIND_MW			0x18
66#define FW_WROPCODE_RI_FASTREGISTER_MR		0x19
67#define FW_WROPCODE_RI_LOCAL_INV		0x1A
68#define FW_WROPCODE_RI_MODIFY_QP		0x1B
69#define FW_WROPCODE_RI_BYPASS			0x1C
70
71#define FW_WROPOCDE_RSVD			0x1E
72
73#define FW_WROPCODE_SGE_EGRESSCONTEXT_RR	0x1F
74
75#define FW_WROPCODE_MNGT			0x1D
76#define FW_MNGTOPCODE_PKTSCHED_SET		0x00
77#define FW_MNGTOPCODE_WRC_SET			0x01
78#define FW_MNGTOPCODE_TUNNEL_CR_FLUSH		0x02
79
80/* Maximum size of a WR sent from the host, limited by the SGE.
81 *
82 * Note: WR coming from ULP or TP are only limited by CIM.
83 */
84#define FW_WR_SIZE			128
85
86/* Maximum number of outstanding WRs sent from the host. Value must be
87 * programmed in the CTRL/TUNNEL/QP SGE Egress Context and used by
88 * offload modules to limit the number of WRs per connection.
89 */
90#define FW_T3_WR_NUM			16
91#define FW_N3_WR_NUM			7
92
93#ifndef N3
94# define FW_WR_NUM			FW_T3_WR_NUM
95#else
96# define FW_WR_NUM			FW_N3_WR_NUM
97#endif
98
99/* FW_TUNNEL_NUM corresponds to the number of supported TUNNEL Queues. These
100 * queues must start at SGE Egress Context FW_TUNNEL_SGEEC_START and must
101 * start at 'TID' (or 'uP Token') FW_TUNNEL_TID_START.
102 *
103 * Ingress Traffic (e.g. DMA completion credit)  for TUNNEL Queue[i] is sent
104 * to RESP Queue[i].
105 */
106#define FW_TUNNEL_NUM			8
107#define FW_TUNNEL_SGEEC_START		8
108#define FW_TUNNEL_TID_START		65544
109
110
111/* FW_CTRL_NUM corresponds to the number of supported CTRL Queues. These queues
112 * must start at SGE Egress Context FW_CTRL_SGEEC_START and must start at 'TID'
113 * (or 'uP Token') FW_CTRL_TID_START.
114 *
115 * Ingress Traffic for CTRL Queue[i] is sent to RESP Queue[i].
116 */
117#define FW_CTRL_NUM			8
118#define FW_CTRL_SGEEC_START		65528
119#define FW_CTRL_TID_START		65536
120
121/* FW_OFLD_NUM corresponds to the number of supported OFFLOAD Queues. These
122 * queues must start at SGE Egress Context FW_OFLD_SGEEC_START.
123 *
124 * Note: the 'uP Token' in the SGE Egress Context fields is irrelevant for
125 * OFFLOAD Queues, as the host is responsible for providing the correct TID in
126 * every WR.
127 *
128 * Ingress Trafffic for OFFLOAD Queue[i] is sent to RESP Queue[i].
129 */
130#define FW_OFLD_NUM			8
131#define FW_OFLD_SGEEC_START		0
132
133/*
134 *
135 */
136#define FW_RI_NUM			1
137#define FW_RI_SGEEC_START		65527
138#define FW_RI_TID_START			65552
139
140/*
141 * The RX_PKT_TID
142 */
143#define FW_RX_PKT_NUM			1
144#define FW_RX_PKT_TID_START		65553
145
146/* FW_WRC_NUM corresponds to the number of Work Request Context that supported
147 * by the firmware.
148 */
149#define FW_WRC_NUM			\
150    (65536 + FW_TUNNEL_NUM + FW_CTRL_NUM + FW_RI_NUM + FW_RX_PKT_NUM)
151
152/*
153 * FW type and version.
154 */
155#define S_FW_VERSION_TYPE		28
156#define M_FW_VERSION_TYPE		0xF
157#define V_FW_VERSION_TYPE(x)		((x) << S_FW_VERSION_TYPE)
158#define G_FW_VERSION_TYPE(x)		\
159    (((x) >> S_FW_VERSION_TYPE) & M_FW_VERSION_TYPE)
160
161#define S_FW_VERSION_MAJOR		16
162#define M_FW_VERSION_MAJOR		0xFFF
163#define V_FW_VERSION_MAJOR(x)		((x) << S_FW_VERSION_MAJOR)
164#define G_FW_VERSION_MAJOR(x)		\
165    (((x) >> S_FW_VERSION_MAJOR) & M_FW_VERSION_MAJOR)
166
167#define S_FW_VERSION_MINOR		8
168#define M_FW_VERSION_MINOR		0xFF
169#define V_FW_VERSION_MINOR(x)		((x) << S_FW_VERSION_MINOR)
170#define G_FW_VERSION_MINOR(x)		\
171    (((x) >> S_FW_VERSION_MINOR) & M_FW_VERSION_MINOR)
172
173#define S_FW_VERSION_MICRO		0
174#define M_FW_VERSION_MICRO		0xFF
175#define V_FW_VERSION_MICRO(x)		((x) << S_FW_VERSION_MICRO)
176#define G_FW_VERSION_MICRO(x)		\
177    (((x) >> S_FW_VERSION_MICRO) & M_FW_VERSION_MICRO)
178
179#endif /* _FIRMWARE_EXPORTS_H_ */
180