cvmx-app-init.h revision 242104
1/***********************license start*************** 2 * Copyright (c) 2003-2012 Cavium Inc. (support@cavium.com). All rights 3 * reserved. 4 * 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: 9 * 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 13 * * Redistributions in binary form must reproduce the above 14 * copyright notice, this list of conditions and the following 15 * disclaimer in the documentation and/or other materials provided 16 * with the distribution. 17 18 * * Neither the name of Cavium Inc. nor the names of 19 * its contributors may be used to endorse or promote products 20 * derived from this software without specific prior written 21 * permission. 22 23 * This Software, including technical data, may be subject to U.S. export control 24 * laws, including the U.S. Export Administration Act and its associated 25 * regulations, and may be subject to export or import regulations in other 26 * countries. 27 28 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29 * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR 30 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31 * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32 * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33 * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34 * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35 * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36 * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38 ***********************license end**************************************/ 39 40 41 42 43 44 45/** 46 * @file 47 * Header file for simple executive application initialization. This defines 48 * part of the ABI between the bootloader and the application. 49 * <hr>$Revision: 70327 $<hr> 50 * 51 */ 52 53#ifndef __CVMX_APP_INIT_H__ 54#define __CVMX_APP_INIT_H__ 55 56#ifdef __cplusplus 57extern "C" { 58#endif 59 60 61/* Current major and minor versions of the CVMX bootinfo block that is passed 62** from the bootloader to the application. This is versioned so that applications 63** can properly handle multiple bootloader versions. */ 64#define CVMX_BOOTINFO_MAJ_VER 1 65#define CVMX_BOOTINFO_MIN_VER 3 66 67 68#if (CVMX_BOOTINFO_MAJ_VER == 1) 69#define CVMX_BOOTINFO_OCTEON_SERIAL_LEN 20 70/* This structure is populated by the bootloader. For binary 71** compatibility the only changes that should be made are 72** adding members to the end of the structure, and the minor 73** version should be incremented at that time. 74** If an incompatible change is made, the major version 75** must be incremented, and the minor version should be reset 76** to 0. 77*/ 78struct cvmx_bootinfo { 79#ifdef __BIG_ENDIAN_BITFIELD 80 uint32_t major_version; 81 uint32_t minor_version; 82 83 uint64_t stack_top; 84 uint64_t heap_base; 85 uint64_t heap_end; 86 uint64_t desc_vaddr; 87 88 uint32_t exception_base_addr; 89 uint32_t stack_size; 90 uint32_t flags; 91 uint32_t core_mask; 92 uint32_t dram_size; /**< DRAM size in megabytes */ 93 uint32_t phy_mem_desc_addr; /**< physical address of free memory descriptor block*/ 94 uint32_t debugger_flags_base_addr; /**< used to pass flags from app to debugger */ 95 uint32_t eclock_hz; /**< CPU clock speed, in hz */ 96 uint32_t dclock_hz; /**< DRAM clock speed, in hz */ 97 uint32_t reserved0; 98 uint16_t board_type; 99 uint8_t board_rev_major; 100 uint8_t board_rev_minor; 101 uint16_t reserved1; 102 uint8_t reserved2; 103 uint8_t reserved3; 104 char board_serial_number[CVMX_BOOTINFO_OCTEON_SERIAL_LEN]; 105 uint8_t mac_addr_base[6]; 106 uint8_t mac_addr_count; 107#if (CVMX_BOOTINFO_MIN_VER >= 1) 108 /* Several boards support compact flash on the Octeon boot bus. The CF 109 ** memory spaces may be mapped to different addresses on different boards. 110 ** These are the physical addresses, so care must be taken to use the correct 111 ** XKPHYS/KSEG0 addressing depending on the application's ABI. 112 ** These values will be 0 if CF is not present */ 113 uint64_t compact_flash_common_base_addr; 114 uint64_t compact_flash_attribute_base_addr; 115 /* Base address of the LED display (as on EBT3000 board) 116 ** This will be 0 if LED display not present. */ 117 uint64_t led_display_base_addr; 118#endif 119#if (CVMX_BOOTINFO_MIN_VER >= 2) 120 uint32_t dfa_ref_clock_hz; /**< DFA reference clock in hz (if applicable)*/ 121 uint32_t config_flags; /**< flags indicating various configuration options. These flags supercede 122 ** the 'flags' variable and should be used instead if available */ 123#endif 124#if (CVMX_BOOTINFO_MIN_VER >= 3) 125 uint64_t fdt_addr; /**< Address of the OF Flattened Device Tree structure describing the board. */ 126#endif 127#else /* __BIG_ENDIAN */ 128 /* 129 * Little-Endian: When the CPU mode is switched to 130 * little-endian, the view of the structure has some of the 131 * fields swapped. 132 */ 133 uint32_t minor_version; 134 uint32_t major_version; 135 136 uint64_t stack_top; 137 uint64_t heap_base; 138 uint64_t heap_end; 139 uint64_t desc_vaddr; 140 141 uint32_t stack_size; 142 uint32_t exception_base_addr; 143 144 uint32_t core_mask; 145 uint32_t flags; 146 147 uint32_t phy_mem_desc_addr; 148 uint32_t dram_size; 149 150 uint32_t eclock_hz; 151 uint32_t debugger_flags_base_addr; 152 153 uint32_t reserved0; 154 uint32_t dclock_hz; 155 156 uint8_t reserved3; 157 uint8_t reserved2; 158 uint16_t reserved1; 159 uint8_t board_rev_minor; 160 uint8_t board_rev_major; 161 uint16_t board_type; 162 163 union cvmx_bootinfo_scramble { 164 /* Must byteswap these four words so that...*/ 165 uint64_t s[4]; 166 /* ... this strucure has the proper data arrangement. */ 167 struct { 168 char board_serial_number[CVMX_BOOTINFO_OCTEON_SERIAL_LEN]; 169 uint8_t mac_addr_base[6]; 170 uint8_t mac_addr_count; 171 uint8_t pad[5]; 172 } le; 173 } scramble1; 174 175#if (CVMX_BOOTINFO_MIN_VER >= 1) 176 uint64_t compact_flash_common_base_addr; 177 uint64_t compact_flash_attribute_base_addr; 178 uint64_t led_display_base_addr; 179#endif 180#if (CVMX_BOOTINFO_MIN_VER >= 2) 181 uint32_t config_flags; 182 uint32_t dfa_ref_clock_hz; 183#endif 184#if (CVMX_BOOTINFO_MIN_VER >= 3) 185 uint64_t fdt_addr; 186#endif 187#endif 188}; 189 190typedef struct cvmx_bootinfo cvmx_bootinfo_t; 191 192#define CVMX_BOOTINFO_CFG_FLAG_PCI_HOST (1ull << 0) 193#define CVMX_BOOTINFO_CFG_FLAG_PCI_TARGET (1ull << 1) 194#define CVMX_BOOTINFO_CFG_FLAG_DEBUG (1ull << 2) 195#define CVMX_BOOTINFO_CFG_FLAG_NO_MAGIC (1ull << 3) 196/* This flag is set if the TLB mappings are not contained in the 197** 0x10000000 - 0x20000000 boot bus region. */ 198#define CVMX_BOOTINFO_CFG_FLAG_OVERSIZE_TLB_MAPPING (1ull << 4) 199#define CVMX_BOOTINFO_CFG_FLAG_BREAK (1ull << 5) 200 201#endif /* (CVMX_BOOTINFO_MAJ_VER == 1) */ 202 203 204/* Type defines for board and chip types */ 205enum cvmx_board_types_enum { 206 CVMX_BOARD_TYPE_NULL = 0, 207 CVMX_BOARD_TYPE_SIM = 1, 208 CVMX_BOARD_TYPE_EBT3000 = 2, 209 CVMX_BOARD_TYPE_KODAMA = 3, 210 CVMX_BOARD_TYPE_NIAGARA = 4, /* Obsolete, no longer supported */ 211 CVMX_BOARD_TYPE_NAC38 = 5, /* Obsolete, no longer supported */ 212 CVMX_BOARD_TYPE_THUNDER = 6, 213 CVMX_BOARD_TYPE_TRANTOR = 7, /* Obsolete, no longer supported */ 214 CVMX_BOARD_TYPE_EBH3000 = 8, 215 CVMX_BOARD_TYPE_EBH3100 = 9, 216 CVMX_BOARD_TYPE_HIKARI = 10, 217 CVMX_BOARD_TYPE_CN3010_EVB_HS5 = 11, 218 CVMX_BOARD_TYPE_CN3005_EVB_HS5 = 12, 219 CVMX_BOARD_TYPE_KBP = 13, 220 CVMX_BOARD_TYPE_CN3020_EVB_HS5 = 14, /* Deprecated, CVMX_BOARD_TYPE_CN3010_EVB_HS5 supports the CN3020 */ 221 CVMX_BOARD_TYPE_EBT5800 = 15, 222 CVMX_BOARD_TYPE_NICPRO2 = 16, 223 CVMX_BOARD_TYPE_EBH5600 = 17, 224 CVMX_BOARD_TYPE_EBH5601 = 18, 225 CVMX_BOARD_TYPE_EBH5200 = 19, 226 CVMX_BOARD_TYPE_BBGW_REF = 20, 227 CVMX_BOARD_TYPE_NIC_XLE_4G = 21, 228 CVMX_BOARD_TYPE_EBT5600 = 22, 229 CVMX_BOARD_TYPE_EBH5201 = 23, 230 CVMX_BOARD_TYPE_EBT5200 = 24, 231 CVMX_BOARD_TYPE_CB5600 = 25, 232 CVMX_BOARD_TYPE_CB5601 = 26, 233 CVMX_BOARD_TYPE_CB5200 = 27, 234 CVMX_BOARD_TYPE_GENERIC = 28, /* Special 'generic' board type, supports many boards */ 235 CVMX_BOARD_TYPE_EBH5610 = 29, 236 CVMX_BOARD_TYPE_LANAI2_A = 30, 237 CVMX_BOARD_TYPE_LANAI2_U = 31, 238 CVMX_BOARD_TYPE_EBB5600 = 32, 239 CVMX_BOARD_TYPE_EBB6300 = 33, 240 CVMX_BOARD_TYPE_NIC_XLE_10G = 34, 241 CVMX_BOARD_TYPE_LANAI2_G = 35, 242 CVMX_BOARD_TYPE_EBT5810 = 36, 243 CVMX_BOARD_TYPE_NIC10E = 37, 244 CVMX_BOARD_TYPE_EP6300C = 38, 245 CVMX_BOARD_TYPE_EBB6800 = 39, 246 CVMX_BOARD_TYPE_NIC4E = 40, 247 CVMX_BOARD_TYPE_NIC2E = 41, 248 CVMX_BOARD_TYPE_EBB6600 = 42, 249 CVMX_BOARD_TYPE_REDWING = 43, 250 CVMX_BOARD_TYPE_NIC68_4 = 44, 251 CVMX_BOARD_TYPE_NIC10E_66 = 45, 252 CVMX_BOARD_TYPE_EBB6100 = 46, 253 CVMX_BOARD_TYPE_EVB7100 = 47, 254 CVMX_BOARD_TYPE_MAX, 255 /* NOTE: 256-257 are being used by a customer. */ 256 257 /* The range from CVMX_BOARD_TYPE_MAX to CVMX_BOARD_TYPE_CUST_DEFINED_MIN is reserved 258 ** for future SDK use. */ 259 260 /* Set aside a range for customer boards. These numbers are managed 261 ** by Cavium. 262 */ 263 CVMX_BOARD_TYPE_CUST_DEFINED_MIN = 10000, 264 CVMX_BOARD_TYPE_CUST_WSX16 = 10001, 265 CVMX_BOARD_TYPE_CUST_NS0216 = 10002, 266 CVMX_BOARD_TYPE_CUST_NB5 = 10003, 267 CVMX_BOARD_TYPE_CUST_WMR500 = 10004, 268 CVMX_BOARD_TYPE_CUST_ITB101 = 10005, 269 CVMX_BOARD_TYPE_CUST_NTE102 = 10006, 270 CVMX_BOARD_TYPE_CUST_AGS103 = 10007, 271#if !defined(OCTEON_VENDOR_LANNER) 272 CVMX_BOARD_TYPE_CUST_GST104 = 10008, 273#else 274 CVMX_BOARD_TYPE_CUST_LANNER_MR955= 10008, 275#endif 276 CVMX_BOARD_TYPE_CUST_GCT105 = 10009, 277 CVMX_BOARD_TYPE_CUST_AGS106 = 10010, 278 CVMX_BOARD_TYPE_CUST_SGM107 = 10011, 279 CVMX_BOARD_TYPE_CUST_GCT108 = 10012, 280 CVMX_BOARD_TYPE_CUST_AGS109 = 10013, 281 CVMX_BOARD_TYPE_CUST_GCT110 = 10014, 282 CVMX_BOARD_TYPE_CUST_L2_AIR_SENDER = 10015, 283 CVMX_BOARD_TYPE_CUST_L2_AIR_RECEIVER= 10016, 284 CVMX_BOARD_TYPE_CUST_L2_ACCTON2_TX = 10017, 285 CVMX_BOARD_TYPE_CUST_L2_ACCTON2_RX = 10018, 286 CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_TX= 10019, 287 CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_RX= 10020, 288#if defined(OCTEON_VENDOR_LANNER) 289 CVMX_BOARD_TYPE_CUST_LANNER_MR730 = 10021, 290#else 291 CVMX_BOARD_TYPE_CUST_L2_ZINWELL = 10021, 292#endif 293 CVMX_BOARD_TYPE_CUST_DEFINED_MAX = 20000, 294 295 /* Set aside a range for customer private use. The SDK won't 296 ** use any numbers in this range. */ 297 CVMX_BOARD_TYPE_CUST_PRIVATE_MIN = 20001, 298#if defined(OCTEON_VENDOR_LANNER) 299 CVMX_BOARD_TYPE_CUST_LANNER_MR320= 20002, 300 CVMX_BOARD_TYPE_CUST_LANNER_MR321X=20007, 301#endif 302#if defined(OCTEON_VENDOR_RADISYS) 303 CVMX_BOARD_TYPE_CUST_RADISYS_RSYS4GBE=20002, 304#endif 305 CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000, 306 307 308 /* Range for IO modules */ 309 CVMX_BOARD_TYPE_MODULE_MIN = 30001, 310 CVMX_BOARD_TYPE_MODULE_PCIE_RC_4X = 30002, 311 CVMX_BOARD_TYPE_MODULE_PCIE_EP_4X = 30003, 312 CVMX_BOARD_TYPE_MODULE_SGMII_MARVEL = 30004, 313 CVMX_BOARD_TYPE_MODULE_SFPPLUS_BCM = 30005, 314 CVMX_BOARD_TYPE_MODULE_SRIO = 30006, 315 CVMX_BOARD_TYPE_MODULE_EBB5600_QLM0 = 30007, 316 CVMX_BOARD_TYPE_MODULE_EBB5600_QLM1 = 30008, 317 CVMX_BOARD_TYPE_MODULE_EBB5600_QLM2 = 30009, 318 CVMX_BOARD_TYPE_MODULE_EBB5600_QLM3 = 30010, 319 CVMX_BOARD_TYPE_MODULE_MAX = 31000 320 321 /* The remaining range is reserved for future use. */ 322}; 323enum cvmx_chip_types_enum { 324 CVMX_CHIP_TYPE_NULL = 0, 325 CVMX_CHIP_SIM_TYPE_DEPRECATED = 1, 326 CVMX_CHIP_TYPE_OCTEON_SAMPLE = 2, 327 CVMX_CHIP_TYPE_MAX 328}; 329 330/* Compatability alias for NAC38 name change, planned to be removed from SDK 1.7 */ 331#define CVMX_BOARD_TYPE_NAO38 CVMX_BOARD_TYPE_NAC38 332 333/* Functions to return string based on type */ 334#define ENUM_BRD_TYPE_CASE(x) case x: return(#x + 16); /* Skip CVMX_BOARD_TYPE_ */ 335static inline const char *cvmx_board_type_to_string(enum cvmx_board_types_enum type) 336{ 337 switch (type) 338 { 339 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NULL) 340 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_SIM) 341 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT3000) 342 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KODAMA) 343 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIAGARA) 344 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NAC38) 345 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_THUNDER) 346 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_TRANTOR) 347 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH3000) 348 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH3100) 349 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_HIKARI) 350 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3010_EVB_HS5) 351 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3005_EVB_HS5) 352 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KBP) 353 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3020_EVB_HS5) 354 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5800) 355 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NICPRO2) 356 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5600) 357 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5601) 358 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5200) 359 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_BBGW_REF) 360 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC_XLE_4G) 361 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5600) 362 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5201) 363 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5200) 364 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5600) 365 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5601) 366 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5200) 367 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_GENERIC) 368 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5610) 369 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_A) 370 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_U) 371 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB5600) 372 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6300) 373 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC_XLE_10G) 374 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_G) 375 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5810) 376 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC10E) 377 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EP6300C) 378 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6800) 379 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC4E) 380 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC2E) 381 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6600) 382 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_REDWING) 383 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC68_4) 384 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC10E_66) 385 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6100) 386 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EVB7100) 387 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MAX) 388 389 /* Customer boards listed here */ 390 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DEFINED_MIN) 391 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_WSX16) 392 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NS0216) 393 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NB5) 394 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_WMR500) 395 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_ITB101) 396 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NTE102) 397 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS103) 398#if !defined(OCTEON_VENDOR_LANNER) 399 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GST104) 400#else 401 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_LANNER_MR955) 402#endif 403 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT105) 404 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS106) 405 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_SGM107) 406 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT108) 407 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS109) 408 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT110) 409 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_AIR_SENDER) 410 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_AIR_RECEIVER) 411 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ACCTON2_TX) 412 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ACCTON2_RX) 413 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_TX) 414 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_RX) 415#if defined(OCTEON_VENDOR_LANNER) 416 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_LANNER_MR730) 417#else 418 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ZINWELL) 419#endif 420 421 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DEFINED_MAX) 422 423 /* Customer private range */ 424 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MIN) 425#if defined(OCTEON_VENDOR_LANNER) 426 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_LANNER_MR320) 427 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_LANNER_MR321X) 428#endif 429#if defined(OCTEON_VENDOR_RADISYS) 430 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_RADISYS_RSYS4GBE) 431#endif 432 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX) 433 434 /* Module range */ 435 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_MIN) 436 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_PCIE_RC_4X) 437 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_PCIE_EP_4X) 438 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_SGMII_MARVEL) 439 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_SFPPLUS_BCM) 440 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_SRIO) 441 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_EBB5600_QLM0) 442 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_EBB5600_QLM1) 443 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_EBB5600_QLM2) 444 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_EBB5600_QLM3) 445 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_MAX) 446 } 447 return "Unsupported Board"; 448} 449 450#define ENUM_CHIP_TYPE_CASE(x) case x: return(#x + 15); /* Skip CVMX_CHIP_TYPE */ 451static inline const char *cvmx_chip_type_to_string(enum cvmx_chip_types_enum type) 452{ 453 switch (type) 454 { 455 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_NULL) 456 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_SIM_TYPE_DEPRECATED) 457 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_OCTEON_SAMPLE) 458 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_MAX) 459 } 460 return "Unsupported Chip"; 461} 462 463 464extern int cvmx_debug_uart; 465 466 467 468#ifdef __cplusplus 469} 470#endif 471 472#endif /* __CVMX_APP_INIT_H__ */ 473