1/***********************license start*************** 2 * Copyright (c) 2003-2012 Cavium Inc. (support@cavium.com). All rights 3 * reserved. 4 * 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: 9 * 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 13 * * Redistributions in binary form must reproduce the above 14 * copyright notice, this list of conditions and the following 15 * disclaimer in the documentation and/or other materials provided 16 * with the distribution. 17 18 * * Neither the name of Cavium Inc. nor the names of 19 * its contributors may be used to endorse or promote products 20 * derived from this software without specific prior written 21 * permission. 22 23 * This Software, including technical data, may be subject to U.S. export control 24 * laws, including the U.S. Export Administration Act and its associated 25 * regulations, and may be subject to export or import regulations in other 26 * countries. 27 28 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29 * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR 30 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31 * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32 * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33 * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34 * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35 * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36 * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38 ***********************license end**************************************/ 39 40 41 42 43 44 45/** 46 * @file 47 * Header file for simple executive application initialization. This defines 48 * part of the ABI between the bootloader and the application. 49 * <hr>$Revision: 70327 $<hr> 50 * 51 */ 52 53#ifndef __CVMX_APP_INIT_H__ 54#define __CVMX_APP_INIT_H__ 55 56#ifdef __cplusplus 57extern "C" { 58#endif 59 60 61/* Current major and minor versions of the CVMX bootinfo block that is passed 62** from the bootloader to the application. This is versioned so that applications 63** can properly handle multiple bootloader versions. */ 64#define CVMX_BOOTINFO_MAJ_VER 1 65#define CVMX_BOOTINFO_MIN_VER 3 66 67 68#if (CVMX_BOOTINFO_MAJ_VER == 1) 69#define CVMX_BOOTINFO_OCTEON_SERIAL_LEN 20 70/* This structure is populated by the bootloader. For binary 71** compatibility the only changes that should be made are 72** adding members to the end of the structure, and the minor 73** version should be incremented at that time. 74** If an incompatible change is made, the major version 75** must be incremented, and the minor version should be reset 76** to 0. 77*/ 78struct cvmx_bootinfo { 79#ifdef __BIG_ENDIAN_BITFIELD 80 uint32_t major_version; 81 uint32_t minor_version; 82 83 uint64_t stack_top; 84 uint64_t heap_base; 85 uint64_t heap_end; 86 uint64_t desc_vaddr; 87 88 uint32_t exception_base_addr; 89 uint32_t stack_size; 90 uint32_t flags; 91 uint32_t core_mask; 92 uint32_t dram_size; /**< DRAM size in megabytes */ 93 uint32_t phy_mem_desc_addr; /**< physical address of free memory descriptor block*/ 94 uint32_t debugger_flags_base_addr; /**< used to pass flags from app to debugger */ 95 uint32_t eclock_hz; /**< CPU clock speed, in hz */ 96 uint32_t dclock_hz; /**< DRAM clock speed, in hz */ 97 uint32_t reserved0; 98 uint16_t board_type; 99 uint8_t board_rev_major; 100 uint8_t board_rev_minor; 101 uint16_t reserved1; 102 uint8_t reserved2; 103 uint8_t reserved3; 104 char board_serial_number[CVMX_BOOTINFO_OCTEON_SERIAL_LEN]; 105 uint8_t mac_addr_base[6]; 106 uint8_t mac_addr_count; 107#if (CVMX_BOOTINFO_MIN_VER >= 1) 108 /* Several boards support compact flash on the Octeon boot bus. The CF 109 ** memory spaces may be mapped to different addresses on different boards. 110 ** These are the physical addresses, so care must be taken to use the correct 111 ** XKPHYS/KSEG0 addressing depending on the application's ABI. 112 ** These values will be 0 if CF is not present */ 113 uint64_t compact_flash_common_base_addr; 114 uint64_t compact_flash_attribute_base_addr; 115 /* Base address of the LED display (as on EBT3000 board) 116 ** This will be 0 if LED display not present. */ 117 uint64_t led_display_base_addr; 118#endif 119#if (CVMX_BOOTINFO_MIN_VER >= 2) 120 uint32_t dfa_ref_clock_hz; /**< DFA reference clock in hz (if applicable)*/ 121 uint32_t config_flags; /**< flags indicating various configuration options. These flags supercede 122 ** the 'flags' variable and should be used instead if available */ 123#if defined(OCTEON_VENDOR_GEFES) 124 uint32_t dfm_size; /**< DFA Size */ 125#endif 126#endif 127#if (CVMX_BOOTINFO_MIN_VER >= 3) 128 uint64_t fdt_addr; /**< Address of the OF Flattened Device Tree structure describing the board. */ 129#endif 130#else /* __BIG_ENDIAN */ 131 /* 132 * Little-Endian: When the CPU mode is switched to 133 * little-endian, the view of the structure has some of the 134 * fields swapped. 135 */ 136 uint32_t minor_version; 137 uint32_t major_version; 138 139 uint64_t stack_top; 140 uint64_t heap_base; 141 uint64_t heap_end; 142 uint64_t desc_vaddr; 143 144 uint32_t stack_size; 145 uint32_t exception_base_addr; 146 147 uint32_t core_mask; 148 uint32_t flags; 149 150 uint32_t phy_mem_desc_addr; 151 uint32_t dram_size; 152 153 uint32_t eclock_hz; 154 uint32_t debugger_flags_base_addr; 155 156 uint32_t reserved0; 157 uint32_t dclock_hz; 158 159 uint8_t reserved3; 160 uint8_t reserved2; 161 uint16_t reserved1; 162 uint8_t board_rev_minor; 163 uint8_t board_rev_major; 164 uint16_t board_type; 165 166 union cvmx_bootinfo_scramble { 167 /* Must byteswap these four words so that...*/ 168 uint64_t s[4]; 169 /* ... this strucure has the proper data arrangement. */ 170 struct { 171 char board_serial_number[CVMX_BOOTINFO_OCTEON_SERIAL_LEN]; 172 uint8_t mac_addr_base[6]; 173 uint8_t mac_addr_count; 174 uint8_t pad[5]; 175 } le; 176 } scramble1; 177 178#if (CVMX_BOOTINFO_MIN_VER >= 1) 179 uint64_t compact_flash_common_base_addr; 180 uint64_t compact_flash_attribute_base_addr; 181 uint64_t led_display_base_addr; 182#endif 183#if (CVMX_BOOTINFO_MIN_VER >= 2) 184 uint32_t config_flags; 185 uint32_t dfa_ref_clock_hz; 186#endif 187#if (CVMX_BOOTINFO_MIN_VER >= 3) 188 uint64_t fdt_addr; 189#endif 190#endif 191}; 192 193typedef struct cvmx_bootinfo cvmx_bootinfo_t; 194 195#define CVMX_BOOTINFO_CFG_FLAG_PCI_HOST (1ull << 0) 196#define CVMX_BOOTINFO_CFG_FLAG_PCI_TARGET (1ull << 1) 197#define CVMX_BOOTINFO_CFG_FLAG_DEBUG (1ull << 2) 198#define CVMX_BOOTINFO_CFG_FLAG_NO_MAGIC (1ull << 3) 199/* This flag is set if the TLB mappings are not contained in the 200** 0x10000000 - 0x20000000 boot bus region. */ 201#define CVMX_BOOTINFO_CFG_FLAG_OVERSIZE_TLB_MAPPING (1ull << 4) 202#define CVMX_BOOTINFO_CFG_FLAG_BREAK (1ull << 5) 203 204#endif /* (CVMX_BOOTINFO_MAJ_VER == 1) */ 205 206 207/* Type defines for board and chip types */ 208enum cvmx_board_types_enum { 209 CVMX_BOARD_TYPE_NULL = 0, 210 CVMX_BOARD_TYPE_SIM = 1, 211 CVMX_BOARD_TYPE_EBT3000 = 2, 212 CVMX_BOARD_TYPE_KODAMA = 3, 213 CVMX_BOARD_TYPE_NIAGARA = 4, /* Obsolete, no longer supported */ 214 CVMX_BOARD_TYPE_NAC38 = 5, /* Obsolete, no longer supported */ 215 CVMX_BOARD_TYPE_THUNDER = 6, 216 CVMX_BOARD_TYPE_TRANTOR = 7, /* Obsolete, no longer supported */ 217 CVMX_BOARD_TYPE_EBH3000 = 8, 218 CVMX_BOARD_TYPE_EBH3100 = 9, 219 CVMX_BOARD_TYPE_HIKARI = 10, 220 CVMX_BOARD_TYPE_CN3010_EVB_HS5 = 11, 221 CVMX_BOARD_TYPE_CN3005_EVB_HS5 = 12, 222#if defined(OCTEON_VENDOR_GEFES) 223 CVMX_BOARD_TYPE_TNPA3804 = 13, 224 CVMX_BOARD_TYPE_AT5810 = 14, 225 CVMX_BOARD_TYPE_WNPA3850 = 15, 226 CVMX_BOARD_TYPE_W3860 = 16, 227#else 228 CVMX_BOARD_TYPE_KBP = 13, 229 CVMX_BOARD_TYPE_CN3020_EVB_HS5 = 14, /* Deprecated, CVMX_BOARD_TYPE_CN3010_EVB_HS5 supports the CN3020 */ 230 CVMX_BOARD_TYPE_EBT5800 = 15, 231 CVMX_BOARD_TYPE_NICPRO2 = 16, 232#endif 233 CVMX_BOARD_TYPE_EBH5600 = 17, 234 CVMX_BOARD_TYPE_EBH5601 = 18, 235 CVMX_BOARD_TYPE_EBH5200 = 19, 236 CVMX_BOARD_TYPE_BBGW_REF = 20, 237 CVMX_BOARD_TYPE_NIC_XLE_4G = 21, 238 CVMX_BOARD_TYPE_EBT5600 = 22, 239 CVMX_BOARD_TYPE_EBH5201 = 23, 240 CVMX_BOARD_TYPE_EBT5200 = 24, 241 CVMX_BOARD_TYPE_CB5600 = 25, 242 CVMX_BOARD_TYPE_CB5601 = 26, 243 CVMX_BOARD_TYPE_CB5200 = 27, 244 CVMX_BOARD_TYPE_GENERIC = 28, /* Special 'generic' board type, supports many boards */ 245 CVMX_BOARD_TYPE_EBH5610 = 29, 246 CVMX_BOARD_TYPE_LANAI2_A = 30, 247 CVMX_BOARD_TYPE_LANAI2_U = 31, 248 CVMX_BOARD_TYPE_EBB5600 = 32, 249 CVMX_BOARD_TYPE_EBB6300 = 33, 250 CVMX_BOARD_TYPE_NIC_XLE_10G = 34, 251 CVMX_BOARD_TYPE_LANAI2_G = 35, 252 CVMX_BOARD_TYPE_EBT5810 = 36, 253 CVMX_BOARD_TYPE_NIC10E = 37, 254 CVMX_BOARD_TYPE_EP6300C = 38, 255 CVMX_BOARD_TYPE_EBB6800 = 39, 256 CVMX_BOARD_TYPE_NIC4E = 40, 257 CVMX_BOARD_TYPE_NIC2E = 41, 258 CVMX_BOARD_TYPE_EBB6600 = 42, 259 CVMX_BOARD_TYPE_REDWING = 43, 260 CVMX_BOARD_TYPE_NIC68_4 = 44, 261 CVMX_BOARD_TYPE_NIC10E_66 = 45, 262 CVMX_BOARD_TYPE_EBB6100 = 46, 263 CVMX_BOARD_TYPE_EVB7100 = 47, 264 CVMX_BOARD_TYPE_MAX, 265 /* NOTE: 256-257 are being used by a customer. */ 266 267 /* The range from CVMX_BOARD_TYPE_MAX to CVMX_BOARD_TYPE_CUST_DEFINED_MIN is reserved 268 ** for future SDK use. */ 269 270 /* Set aside a range for customer boards. These numbers are managed 271 ** by Cavium. 272 */ 273 CVMX_BOARD_TYPE_CUST_DEFINED_MIN = 10000, 274 CVMX_BOARD_TYPE_CUST_WSX16 = 10001, 275 CVMX_BOARD_TYPE_CUST_NS0216 = 10002, 276 CVMX_BOARD_TYPE_CUST_NB5 = 10003, 277 CVMX_BOARD_TYPE_CUST_WMR500 = 10004, 278 CVMX_BOARD_TYPE_CUST_ITB101 = 10005, 279 CVMX_BOARD_TYPE_CUST_NTE102 = 10006, 280 CVMX_BOARD_TYPE_CUST_AGS103 = 10007, 281#if !defined(OCTEON_VENDOR_LANNER) 282 CVMX_BOARD_TYPE_CUST_GST104 = 10008, 283#else 284 CVMX_BOARD_TYPE_CUST_LANNER_MR955= 10008, 285#endif 286 CVMX_BOARD_TYPE_CUST_GCT105 = 10009, 287 CVMX_BOARD_TYPE_CUST_AGS106 = 10010, 288 CVMX_BOARD_TYPE_CUST_SGM107 = 10011, 289 CVMX_BOARD_TYPE_CUST_GCT108 = 10012, 290 CVMX_BOARD_TYPE_CUST_AGS109 = 10013, 291 CVMX_BOARD_TYPE_CUST_GCT110 = 10014, 292 CVMX_BOARD_TYPE_CUST_L2_AIR_SENDER = 10015, 293 CVMX_BOARD_TYPE_CUST_L2_AIR_RECEIVER= 10016, 294 CVMX_BOARD_TYPE_CUST_L2_ACCTON2_TX = 10017, 295 CVMX_BOARD_TYPE_CUST_L2_ACCTON2_RX = 10018, 296 CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_TX= 10019, 297 CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_RX= 10020, 298#if defined(OCTEON_VENDOR_LANNER) 299 CVMX_BOARD_TYPE_CUST_LANNER_MR730 = 10021, 300#else 301 CVMX_BOARD_TYPE_CUST_L2_ZINWELL = 10021, 302#endif 303 CVMX_BOARD_TYPE_CUST_DEFINED_MAX = 20000, 304 305 /* Set aside a range for customer private use. The SDK won't 306 ** use any numbers in this range. */ 307 CVMX_BOARD_TYPE_CUST_PRIVATE_MIN = 20001, 308#if defined(OCTEON_VENDOR_LANNER) 309 CVMX_BOARD_TYPE_CUST_LANNER_MR320= 20002, 310 CVMX_BOARD_TYPE_CUST_LANNER_MR321X=20007, 311#endif 312#if defined(OCTEON_VENDOR_UBIQUITI) 313 CVMX_BOARD_TYPE_CUST_UBIQUITI_E100=20002, 314#endif 315#if defined(OCTEON_VENDOR_RADISYS) 316 CVMX_BOARD_TYPE_CUST_RADISYS_RSYS4GBE=20002, 317#endif 318#if defined(OCTEON_VENDOR_GEFES) 319 CVMX_BOARD_TYPE_CUST_TNPA5804 = 20005, 320 CVMX_BOARD_TYPE_CUST_W5434 = 20006, 321 CVMX_BOARD_TYPE_CUST_W5650 = 20007, 322 CVMX_BOARD_TYPE_CUST_W5800 = 20008, 323 CVMX_BOARD_TYPE_CUST_W5651X = 20009, 324 CVMX_BOARD_TYPE_CUST_TNPA5651X = 20010, 325 CVMX_BOARD_TYPE_CUST_TNPA56X4 = 20011, 326 CVMX_BOARD_TYPE_CUST_W63XX = 20013, 327#endif 328 CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000, 329 330 331 /* Range for IO modules */ 332 CVMX_BOARD_TYPE_MODULE_MIN = 30001, 333 CVMX_BOARD_TYPE_MODULE_PCIE_RC_4X = 30002, 334 CVMX_BOARD_TYPE_MODULE_PCIE_EP_4X = 30003, 335 CVMX_BOARD_TYPE_MODULE_SGMII_MARVEL = 30004, 336 CVMX_BOARD_TYPE_MODULE_SFPPLUS_BCM = 30005, 337 CVMX_BOARD_TYPE_MODULE_SRIO = 30006, 338 CVMX_BOARD_TYPE_MODULE_EBB5600_QLM0 = 30007, 339 CVMX_BOARD_TYPE_MODULE_EBB5600_QLM1 = 30008, 340 CVMX_BOARD_TYPE_MODULE_EBB5600_QLM2 = 30009, 341 CVMX_BOARD_TYPE_MODULE_EBB5600_QLM3 = 30010, 342 CVMX_BOARD_TYPE_MODULE_MAX = 31000 343 344 /* The remaining range is reserved for future use. */ 345}; 346enum cvmx_chip_types_enum { 347 CVMX_CHIP_TYPE_NULL = 0, 348 CVMX_CHIP_SIM_TYPE_DEPRECATED = 1, 349 CVMX_CHIP_TYPE_OCTEON_SAMPLE = 2, 350 CVMX_CHIP_TYPE_MAX 351}; 352 353/* Compatability alias for NAC38 name change, planned to be removed from SDK 1.7 */ 354#define CVMX_BOARD_TYPE_NAO38 CVMX_BOARD_TYPE_NAC38 355 356/* Functions to return string based on type */ 357#define ENUM_BRD_TYPE_CASE(x) case x: return(#x + 16); /* Skip CVMX_BOARD_TYPE_ */ 358static inline const char *cvmx_board_type_to_string(enum cvmx_board_types_enum type) 359{ 360 switch (type) 361 { 362 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NULL) 363 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_SIM) 364 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT3000) 365 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KODAMA) 366 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIAGARA) 367 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NAC38) 368 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_THUNDER) 369 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_TRANTOR) 370 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH3000) 371 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH3100) 372 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_HIKARI) 373 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3010_EVB_HS5) 374 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3005_EVB_HS5) 375#if defined(OCTEON_VENDOR_GEFES) 376 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_TNPA3804) 377 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_AT5810) 378 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_WNPA3850) 379 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_W3860) 380#else 381 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KBP) 382 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3020_EVB_HS5) 383 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5800) 384 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NICPRO2) 385#endif 386 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5600) 387 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5601) 388 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5200) 389 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_BBGW_REF) 390 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC_XLE_4G) 391 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5600) 392 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5201) 393 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5200) 394 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5600) 395 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5601) 396 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5200) 397 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_GENERIC) 398 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5610) 399 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_A) 400 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_U) 401 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB5600) 402 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6300) 403 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC_XLE_10G) 404 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_G) 405 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5810) 406 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC10E) 407 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EP6300C) 408 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6800) 409 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC4E) 410 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC2E) 411 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6600) 412 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_REDWING) 413 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC68_4) 414 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC10E_66) 415 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6100) 416 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EVB7100) 417 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MAX) 418 419 /* Customer boards listed here */ 420 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DEFINED_MIN) 421 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_WSX16) 422 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NS0216) 423 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NB5) 424 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_WMR500) 425 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_ITB101) 426 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NTE102) 427 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS103) 428#if !defined(OCTEON_VENDOR_LANNER) 429 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GST104) 430#else 431 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_LANNER_MR955) 432#endif 433 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT105) 434 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS106) 435 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_SGM107) 436 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT108) 437 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS109) 438 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT110) 439 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_AIR_SENDER) 440 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_AIR_RECEIVER) 441 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ACCTON2_TX) 442 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ACCTON2_RX) 443 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_TX) 444 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_RX) 445#if defined(OCTEON_VENDOR_LANNER) 446 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_LANNER_MR730) 447#else 448 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ZINWELL) 449#endif 450 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DEFINED_MAX) 451 452 /* Customer private range */ 453 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MIN) 454#if defined(OCTEON_VENDOR_LANNER) 455 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_LANNER_MR320) 456 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_LANNER_MR321X) 457#endif 458#if defined(OCTEON_VENDOR_UBIQUITI) 459 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_UBIQUITI_E100) 460#endif 461#if defined(OCTEON_VENDOR_RADISYS) 462 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_RADISYS_RSYS4GBE) 463#endif 464#if defined(OCTEON_VENDOR_GEFES) 465 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_TNPA5804) 466 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_W5434) 467 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_W5650) 468 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_W5800) 469 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_W5651X) 470 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_TNPA5651X) 471 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_TNPA56X4) 472 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_W63XX) 473#endif 474 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX) 475 476 /* Module range */ 477 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_MIN) 478 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_PCIE_RC_4X) 479 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_PCIE_EP_4X) 480 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_SGMII_MARVEL) 481 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_SFPPLUS_BCM) 482 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_SRIO) 483 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_EBB5600_QLM0) 484 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_EBB5600_QLM1) 485 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_EBB5600_QLM2) 486 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_EBB5600_QLM3) 487 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_MAX) 488 } 489 return "Unsupported Board"; 490} 491 492#define ENUM_CHIP_TYPE_CASE(x) case x: return(#x + 15); /* Skip CVMX_CHIP_TYPE */ 493static inline const char *cvmx_chip_type_to_string(enum cvmx_chip_types_enum type) 494{ 495 switch (type) 496 { 497 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_NULL) 498 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_SIM_TYPE_DEPRECATED) 499 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_OCTEON_SAMPLE) 500 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_MAX) 501 } 502 return "Unsupported Chip"; 503} 504 505 506extern int cvmx_debug_uart; 507 508 509 510#ifdef __cplusplus 511} 512#endif 513 514#endif /* __CVMX_APP_INIT_H__ */ 515