1//===-- SystemZMCAsmBackend.cpp - SystemZ assembler backend ---------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10#include "MCTargetDesc/SystemZMCTargetDesc.h" 11#include "MCTargetDesc/SystemZMCFixups.h" 12#include "llvm/MC/MCAsmBackend.h" 13#include "llvm/MC/MCELFObjectWriter.h" 14#include "llvm/MC/MCFixupKindInfo.h" 15#include "llvm/MC/MCInst.h" 16#include "llvm/MC/MCObjectWriter.h" 17 18using namespace llvm; 19 20// Value is a fully-resolved relocation value: Symbol + Addend [- Pivot]. 21// Return the bits that should be installed in a relocation field for 22// fixup kind Kind. 23static uint64_t extractBitsForFixup(MCFixupKind Kind, uint64_t Value) { 24 if (Kind < FirstTargetFixupKind) 25 return Value; 26 27 switch (unsigned(Kind)) { 28 case SystemZ::FK_390_PC16DBL: 29 case SystemZ::FK_390_PC32DBL: 30 case SystemZ::FK_390_PLT16DBL: 31 case SystemZ::FK_390_PLT32DBL: 32 return (int64_t)Value / 2; 33 } 34 35 llvm_unreachable("Unknown fixup kind!"); 36} 37 38// If Opcode can be relaxed, return the relaxed form, otherwise return 0. 39static unsigned getRelaxedOpcode(unsigned Opcode) { 40 switch (Opcode) { 41 case SystemZ::BRC: return SystemZ::BRCL; 42 case SystemZ::J: return SystemZ::JG; 43 case SystemZ::BRAS: return SystemZ::BRASL; 44 } 45 return 0; 46} 47 48namespace { 49class SystemZMCAsmBackend : public MCAsmBackend { 50 uint8_t OSABI; 51public: 52 SystemZMCAsmBackend(uint8_t osABI) 53 : OSABI(osABI) {} 54 55 // Override MCAsmBackend 56 virtual unsigned getNumFixupKinds() const LLVM_OVERRIDE { 57 return SystemZ::NumTargetFixupKinds; 58 } 59 virtual const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const 60 LLVM_OVERRIDE; 61 virtual void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, 62 uint64_t Value) const LLVM_OVERRIDE; 63 virtual bool mayNeedRelaxation(const MCInst &Inst) const LLVM_OVERRIDE; 64 virtual bool fixupNeedsRelaxation(const MCFixup &Fixup, 65 uint64_t Value, 66 const MCRelaxableFragment *Fragment, 67 const MCAsmLayout &Layout) const 68 LLVM_OVERRIDE; 69 virtual void relaxInstruction(const MCInst &Inst, 70 MCInst &Res) const LLVM_OVERRIDE; 71 virtual bool writeNopData(uint64_t Count, 72 MCObjectWriter *OW) const LLVM_OVERRIDE; 73 virtual MCObjectWriter *createObjectWriter(raw_ostream &OS) const 74 LLVM_OVERRIDE { 75 return createSystemZObjectWriter(OS, OSABI); 76 } 77 virtual bool doesSectionRequireSymbols(const MCSection &Section) const 78 LLVM_OVERRIDE { 79 return false; 80 } 81}; 82} // end anonymous namespace 83 84const MCFixupKindInfo & 85SystemZMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const { 86 const static MCFixupKindInfo Infos[SystemZ::NumTargetFixupKinds] = { 87 { "FK_390_PC16DBL", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, 88 { "FK_390_PC32DBL", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, 89 { "FK_390_PLT16DBL", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, 90 { "FK_390_PLT32DBL", 0, 32, MCFixupKindInfo::FKF_IsPCRel } 91 }; 92 93 if (Kind < FirstTargetFixupKind) 94 return MCAsmBackend::getFixupKindInfo(Kind); 95 96 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() && 97 "Invalid kind!"); 98 return Infos[Kind - FirstTargetFixupKind]; 99} 100 101void SystemZMCAsmBackend::applyFixup(const MCFixup &Fixup, char *Data, 102 unsigned DataSize, uint64_t Value) const { 103 MCFixupKind Kind = Fixup.getKind(); 104 unsigned Offset = Fixup.getOffset(); 105 unsigned Size = (getFixupKindInfo(Kind).TargetSize + 7) / 8; 106 107 assert(Offset + Size <= DataSize && "Invalid fixup offset!"); 108 109 // Big-endian insertion of Size bytes. 110 Value = extractBitsForFixup(Kind, Value); 111 unsigned ShiftValue = (Size * 8) - 8; 112 for (unsigned I = 0; I != Size; ++I) { 113 Data[Offset + I] |= uint8_t(Value >> ShiftValue); 114 ShiftValue -= 8; 115 } 116} 117 118bool SystemZMCAsmBackend::mayNeedRelaxation(const MCInst &Inst) const { 119 return getRelaxedOpcode(Inst.getOpcode()) != 0; 120} 121 122bool 123SystemZMCAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup, 124 uint64_t Value, 125 const MCRelaxableFragment *Fragment, 126 const MCAsmLayout &Layout) const { 127 // At the moment we just need to relax 16-bit fields to wider fields. 128 Value = extractBitsForFixup(Fixup.getKind(), Value); 129 return (int16_t)Value != (int64_t)Value; 130} 131 132void SystemZMCAsmBackend::relaxInstruction(const MCInst &Inst, 133 MCInst &Res) const { 134 unsigned Opcode = getRelaxedOpcode(Inst.getOpcode()); 135 assert(Opcode && "Unexpected insn to relax"); 136 Res = Inst; 137 Res.setOpcode(Opcode); 138} 139 140bool SystemZMCAsmBackend::writeNopData(uint64_t Count, 141 MCObjectWriter *OW) const { 142 for (uint64_t I = 0; I != Count; ++I) 143 OW->Write8(7); 144 return true; 145} 146 147MCAsmBackend *llvm::createSystemZMCAsmBackend(const Target &T, StringRef TT, 148 StringRef CPU) { 149 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS()); 150 return new SystemZMCAsmBackend(OSABI); 151} 152