PPCInstr64Bit.td revision 198953
1151937Sjkim//===- PPCInstr64Bit.td - The PowerPC 64-bit Support -------*- tablegen -*-===// 2151937Sjkim// 3151937Sjkim// The LLVM Compiler Infrastructure 4151937Sjkim// 5151937Sjkim// This file is distributed under the University of Illinois Open Source 6151937Sjkim// License. See LICENSE.TXT for details. 7151937Sjkim// 8151937Sjkim//===----------------------------------------------------------------------===// 9151937Sjkim// 10151937Sjkim// This file describes the PowerPC 64-bit instructions. These patterns are used 11193267Sjkim// both when in ppc64 mode and when in "use 64-bit extensions in 32-bit" mode. 12151937Sjkim// 13151937Sjkim//===----------------------------------------------------------------------===// 14151937Sjkim 15151937Sjkim//===----------------------------------------------------------------------===// 16151937Sjkim// 64-bit operands. 17151937Sjkim// 18151937Sjkimdef s16imm64 : Operand<i64> { 19151937Sjkim let PrintMethod = "printS16ImmOperand"; 20151937Sjkim} 21151937Sjkimdef u16imm64 : Operand<i64> { 22151937Sjkim let PrintMethod = "printU16ImmOperand"; 23151937Sjkim} 24151937Sjkimdef symbolHi64 : Operand<i64> { 25151937Sjkim let PrintMethod = "printSymbolHi"; 26151937Sjkim} 27151937Sjkimdef symbolLo64 : Operand<i64> { 28151937Sjkim let PrintMethod = "printSymbolLo"; 29151937Sjkim} 30151937Sjkim 31151937Sjkim//===----------------------------------------------------------------------===// 32151937Sjkim// 64-bit transformation functions. 33151937Sjkim// 34151937Sjkim 35151937Sjkimdef SHL64 : SDNodeXForm<imm, [{ 36151937Sjkim // Transformation function: 63 - imm 37151937Sjkim return getI32Imm(63 - N->getZExtValue()); 38151937Sjkim}]>; 39151937Sjkim 40151937Sjkimdef SRL64 : SDNodeXForm<imm, [{ 41151937Sjkim // Transformation function: 64 - imm 42151937Sjkim return N->getZExtValue() ? getI32Imm(64 - N->getZExtValue()) : getI32Imm(0); 43151937Sjkim}]>; 44151937Sjkim 45151937Sjkimdef HI32_48 : SDNodeXForm<imm, [{ 46151937Sjkim // Transformation function: shift the immediate value down into the low bits. 47151937Sjkim return getI32Imm((unsigned short)(N->getZExtValue() >> 32)); 48151937Sjkim}]>; 49151937Sjkim 50151937Sjkimdef HI48_64 : SDNodeXForm<imm, [{ 51151937Sjkim // Transformation function: shift the immediate value down into the low bits. 52151937Sjkim return getI32Imm((unsigned short)(N->getZExtValue() >> 48)); 53151937Sjkim}]>; 54151937Sjkim 55151937Sjkim 56151937Sjkim//===----------------------------------------------------------------------===// 57151937Sjkim// Calls. 58151937Sjkim// 59151937Sjkim 60151937Sjkimlet Defs = [LR8] in 61151937Sjkim def MovePCtoLR8 : Pseudo<(outs), (ins piclabel:$label), "bl $label", []>, 62151937Sjkim PPC970_Unit_BRU; 63151937Sjkim 64151937Sjkim// Darwin ABI Calls. 65151937Sjkimlet isCall = 1, PPC970_Unit = 7, 66151937Sjkim // All calls clobber the PPC64 non-callee saved registers. 67151937Sjkim Defs = [X0,X2,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12, 68151937Sjkim F0,F1,F2,F3,F4,F5,F6,F7,F8,F9,F10,F11,F12,F13, 69151937Sjkim V0,V1,V2,V3,V4,V5,V6,V7,V8,V9,V10,V11,V12,V13,V14,V15,V16,V17,V18,V19, 70151937Sjkim LR8,CTR8, 71151937Sjkim CR0,CR1,CR5,CR6,CR7,CARRY] in { 72151937Sjkim // Convenient aliases for call instructions 73151937Sjkim let Uses = [RM] in { 74151937Sjkim def BL8_Darwin : IForm<18, 0, 1, 75151937Sjkim (outs), (ins calltarget:$func, variable_ops), 76151937Sjkim "bl $func", BrB, []>; // See Pat patterns below. 77151937Sjkim def BLA8_Darwin : IForm<18, 1, 1, 78151937Sjkim (outs), (ins aaddr:$func, variable_ops), 79151937Sjkim "bla $func", BrB, [(PPCcall_Darwin (i64 imm:$func))]>; 80151937Sjkim } 81151937Sjkim let Uses = [CTR8, RM] in { 82151937Sjkim def BCTRL8_Darwin : XLForm_2_ext<19, 528, 20, 0, 1, 83151937Sjkim (outs), (ins variable_ops), 84151937Sjkim "bctrl", BrB, 85151937Sjkim [(PPCbctrl_Darwin)]>, Requires<[In64BitMode]>; 86151937Sjkim } 87151937Sjkim} 88151937Sjkim 89151937Sjkim// ELF 64 ABI Calls = Darwin ABI Calls 90151937Sjkim// Used to define BL8_ELF and BLA8_ELF 91151937Sjkimlet isCall = 1, PPC970_Unit = 7, 92151937Sjkim // All calls clobber the PPC64 non-callee saved registers. 93151937Sjkim Defs = [X0,X2,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12, 94151937Sjkim F0,F1,F2,F3,F4,F5,F6,F7,F8,F9,F10,F11,F12,F13, 95151937Sjkim V0,V1,V2,V3,V4,V5,V6,V7,V8,V9,V10,V11,V12,V13,V14,V15,V16,V17,V18,V19, 96151937Sjkim LR8,CTR8, 97151937Sjkim CR0,CR1,CR5,CR6,CR7,CARRY] in { 98151937Sjkim // Convenient aliases for call instructions 99151937Sjkim let Uses = [RM] in { 100151937Sjkim def BL8_ELF : IForm<18, 0, 1, 101151937Sjkim (outs), (ins calltarget:$func, variable_ops), 102151937Sjkim "bl $func", BrB, []>; // See Pat patterns below. 103151937Sjkim def BLA8_ELF : IForm<18, 1, 1, 104151937Sjkim (outs), (ins aaddr:$func, variable_ops), 105151937Sjkim "bla $func", BrB, [(PPCcall_SVR4 (i64 imm:$func))]>; 106151937Sjkim } 107151937Sjkim let Uses = [CTR8, RM] in { 108151937Sjkim def BCTRL8_ELF : XLForm_2_ext<19, 528, 20, 0, 1, 109151937Sjkim (outs), (ins variable_ops), 110151937Sjkim "bctrl", BrB, 111151937Sjkim [(PPCbctrl_SVR4)]>, Requires<[In64BitMode]>; 112151937Sjkim } 113151937Sjkim} 114151937Sjkim 115151937Sjkim 116151937Sjkim// Calls 117151937Sjkimdef : Pat<(PPCcall_Darwin (i64 tglobaladdr:$dst)), 118151937Sjkim (BL8_Darwin tglobaladdr:$dst)>; 119151937Sjkimdef : Pat<(PPCcall_Darwin (i64 texternalsym:$dst)), 120151937Sjkim (BL8_Darwin texternalsym:$dst)>; 121151937Sjkim 122151937Sjkimdef : Pat<(PPCcall_SVR4 (i64 tglobaladdr:$dst)), 123151937Sjkim (BL8_ELF tglobaladdr:$dst)>; 124151937Sjkimdef : Pat<(PPCcall_SVR4 (i64 texternalsym:$dst)), 125151937Sjkim (BL8_ELF texternalsym:$dst)>; 126151937Sjkimdef : Pat<(PPCnop), 127151937Sjkim (NOP)>; 128151937Sjkim 129151937Sjkim// Atomic operations 130151937Sjkimlet usesCustomInserter = 1 in { 131151937Sjkim let Uses = [CR0] in { 132151937Sjkim def ATOMIC_LOAD_ADD_I64 : Pseudo< 133151937Sjkim (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), 134151937Sjkim "${:comment} ATOMIC_LOAD_ADD_I64 PSEUDO!", 135151937Sjkim [(set G8RC:$dst, (atomic_load_add_64 xoaddr:$ptr, G8RC:$incr))]>; 136151937Sjkim def ATOMIC_LOAD_SUB_I64 : Pseudo< 137151937Sjkim (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), 138151937Sjkim "${:comment} ATOMIC_LOAD_SUB_I64 PSEUDO!", 139151937Sjkim [(set G8RC:$dst, (atomic_load_sub_64 xoaddr:$ptr, G8RC:$incr))]>; 140151937Sjkim def ATOMIC_LOAD_OR_I64 : Pseudo< 141151937Sjkim (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), 142151937Sjkim "${:comment} ATOMIC_LOAD_OR_I64 PSEUDO!", 143151937Sjkim [(set G8RC:$dst, (atomic_load_or_64 xoaddr:$ptr, G8RC:$incr))]>; 144151937Sjkim def ATOMIC_LOAD_XOR_I64 : Pseudo< 145151937Sjkim (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), 146151937Sjkim "${:comment} ATOMIC_LOAD_XOR_I64 PSEUDO!", 147151937Sjkim [(set G8RC:$dst, (atomic_load_xor_64 xoaddr:$ptr, G8RC:$incr))]>; 148151937Sjkim def ATOMIC_LOAD_AND_I64 : Pseudo< 149151937Sjkim (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), 150151937Sjkim "${:comment} ATOMIC_LOAD_AND_I64 PSEUDO!", 151151937Sjkim [(set G8RC:$dst, (atomic_load_and_64 xoaddr:$ptr, G8RC:$incr))]>; 152151937Sjkim def ATOMIC_LOAD_NAND_I64 : Pseudo< 153151937Sjkim (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), 154151937Sjkim "${:comment} ATOMIC_LOAD_NAND_I64 PSEUDO!", 155151937Sjkim [(set G8RC:$dst, (atomic_load_nand_64 xoaddr:$ptr, G8RC:$incr))]>; 156151937Sjkim 157151937Sjkim def ATOMIC_CMP_SWAP_I64 : Pseudo< 158151937Sjkim (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$old, G8RC:$new), 159151937Sjkim "${:comment} ATOMIC_CMP_SWAP_I64 PSEUDO!", 160151937Sjkim [(set G8RC:$dst, 161151937Sjkim (atomic_cmp_swap_64 xoaddr:$ptr, G8RC:$old, G8RC:$new))]>; 162151937Sjkim 163151937Sjkim def ATOMIC_SWAP_I64 : Pseudo< 164151937Sjkim (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$new), 165151937Sjkim "${:comment} ATOMIC_SWAP_I64 PSEUDO!", 166151937Sjkim [(set G8RC:$dst, (atomic_swap_64 xoaddr:$ptr, G8RC:$new))]>; 167151937Sjkim } 168151937Sjkim} 169151937Sjkim 170167802Sjkim// Instructions to support atomic operations 171151937Sjkimdef LDARX : XForm_1<31, 84, (outs G8RC:$rD), (ins memrr:$ptr), 172151937Sjkim "ldarx $rD, $ptr", LdStLDARX, 173151937Sjkim [(set G8RC:$rD, (PPClarx xoaddr:$ptr))]>; 174151937Sjkim 175151937Sjkimlet Defs = [CR0] in 176151937Sjkimdef STDCX : XForm_1<31, 214, (outs), (ins G8RC:$rS, memrr:$dst), 177151937Sjkim "stdcx. $rS, $dst", LdStSTDCX, 178151937Sjkim [(PPCstcx G8RC:$rS, xoaddr:$dst)]>, 179151937Sjkim isDOT; 180151937Sjkim 181151937Sjkimlet isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 182151937Sjkimdef TCRETURNdi8 :Pseudo< (outs), 183151937Sjkim (ins calltarget:$dst, i32imm:$offset, variable_ops), 184151937Sjkim "#TC_RETURNd8 $dst $offset", 185151937Sjkim []>; 186151937Sjkim 187151937Sjkimlet isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 188151937Sjkimdef TCRETURNai8 :Pseudo<(outs), (ins aaddr:$func, i32imm:$offset, variable_ops), 189151937Sjkim "#TC_RETURNa8 $func $offset", 190151937Sjkim [(PPCtc_return (i64 imm:$func), imm:$offset)]>; 191151937Sjkim 192151937Sjkimlet isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 193151937Sjkimdef TCRETURNri8 : Pseudo<(outs), (ins CTRRC8:$dst, i32imm:$offset, variable_ops), 194151937Sjkim "#TC_RETURNr8 $dst $offset", 195151937Sjkim []>; 196151937Sjkim 197151937Sjkim 198151937Sjkimlet isTerminator = 1, isBarrier = 1, PPC970_Unit = 7, isBranch = 1, 199151937Sjkim isIndirectBranch = 1, isCall = 1, isReturn = 1, Uses = [CTR, RM] in 200151937Sjkimdef TAILBCTR8 : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), "bctr", BrB, []>, 201151937Sjkim Requires<[In64BitMode]>; 202151937Sjkim 203151937Sjkim 204151937Sjkim 205151937Sjkimlet isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7, 206151937Sjkim isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in 207151937Sjkimdef TAILB8 : IForm<18, 0, 0, (outs), (ins calltarget:$dst), 208151937Sjkim "b $dst", BrB, 209151937Sjkim []>; 210151937Sjkim 211151937Sjkim 212151937Sjkimlet isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7, 213151937Sjkim isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in 214151937Sjkimdef TAILBA8 : IForm<18, 0, 0, (outs), (ins aaddr:$dst), 215151937Sjkim "ba $dst", BrB, 216151937Sjkim []>; 217151937Sjkim 218151937Sjkimdef : Pat<(PPCtc_return (i64 tglobaladdr:$dst), imm:$imm), 219151937Sjkim (TCRETURNdi8 tglobaladdr:$dst, imm:$imm)>; 220151937Sjkim 221151937Sjkimdef : Pat<(PPCtc_return (i64 texternalsym:$dst), imm:$imm), 222151937Sjkim (TCRETURNdi8 texternalsym:$dst, imm:$imm)>; 223151937Sjkim 224151937Sjkimdef : Pat<(PPCtc_return CTRRC8:$dst, imm:$imm), 225151937Sjkim (TCRETURNri8 CTRRC8:$dst, imm:$imm)>; 226151937Sjkim 227151937Sjkim 228151937Sjkim//===----------------------------------------------------------------------===// 229151937Sjkim// 64-bit SPR manipulation instrs. 230151937Sjkim 231151937Sjkimlet Uses = [CTR8] in { 232151937Sjkimdef MFCTR8 : XFXForm_1_ext<31, 339, 9, (outs G8RC:$rT), (ins), 233151937Sjkim "mfctr $rT", SprMFSPR>, 234151937Sjkim PPC970_DGroup_First, PPC970_Unit_FXU; 235151937Sjkim} 236151937Sjkimlet Pattern = [(PPCmtctr G8RC:$rS)], Defs = [CTR8] in { 237151937Sjkimdef MTCTR8 : XFXForm_7_ext<31, 467, 9, (outs), (ins G8RC:$rS), 238151937Sjkim "mtctr $rS", SprMTSPR>, 239151937Sjkim PPC970_DGroup_First, PPC970_Unit_FXU; 240151937Sjkim} 241151937Sjkim 242151937Sjkimlet Defs = [X1], Uses = [X1] in 243151937Sjkimdef DYNALLOC8 : Pseudo<(outs G8RC:$result), (ins G8RC:$negsize, memri:$fpsi), 244151937Sjkim "${:comment} DYNALLOC8 $result, $negsize, $fpsi", 245151937Sjkim [(set G8RC:$result, 246151937Sjkim (PPCdynalloc G8RC:$negsize, iaddr:$fpsi))]>; 247151937Sjkim 248151937Sjkimlet Defs = [LR8] in { 249151937Sjkimdef MTLR8 : XFXForm_7_ext<31, 467, 8, (outs), (ins G8RC:$rS), 250151937Sjkim "mtlr $rS", SprMTSPR>, 251151937Sjkim PPC970_DGroup_First, PPC970_Unit_FXU; 252151937Sjkim} 253151937Sjkimlet Uses = [LR8] in { 254151937Sjkimdef MFLR8 : XFXForm_1_ext<31, 339, 8, (outs G8RC:$rT), (ins), 255151937Sjkim "mflr $rT", SprMFSPR>, 256151937Sjkim PPC970_DGroup_First, PPC970_Unit_FXU; 257151937Sjkim} 258151937Sjkim 259151937Sjkim//===----------------------------------------------------------------------===// 260151937Sjkim// Fixed point instructions. 261151937Sjkim// 262151937Sjkim 263151937Sjkimlet PPC970_Unit = 1 in { // FXU Operations. 264151937Sjkim 265151937Sjkim// Copies, extends, truncates. 266151937Sjkimdef OR4To8 : XForm_6<31, 444, (outs G8RC:$rA), (ins GPRC:$rS, GPRC:$rB), 267151937Sjkim "or $rA, $rS, $rB", IntGeneral, 268151937Sjkim []>; 269151937Sjkimdef OR8To4 : XForm_6<31, 444, (outs GPRC:$rA), (ins G8RC:$rS, G8RC:$rB), 270151937Sjkim "or $rA, $rS, $rB", IntGeneral, 271151937Sjkim []>; 272151937Sjkim 273151937Sjkimdef LI8 : DForm_2_r0<14, (outs G8RC:$rD), (ins symbolLo64:$imm), 274151937Sjkim "li $rD, $imm", IntGeneral, 275151937Sjkim [(set G8RC:$rD, immSExt16:$imm)]>; 276151937Sjkimdef LIS8 : DForm_2_r0<15, (outs G8RC:$rD), (ins symbolHi64:$imm), 277151937Sjkim "lis $rD, $imm", IntGeneral, 278151937Sjkim [(set G8RC:$rD, imm16ShiftedSExt:$imm)]>; 279151937Sjkim 280151937Sjkim// Logical ops. 281151937Sjkimdef NAND8: XForm_6<31, 476, (outs G8RC:$rA), (ins G8RC:$rS, G8RC:$rB), 282151937Sjkim "nand $rA, $rS, $rB", IntGeneral, 283151937Sjkim [(set G8RC:$rA, (not (and G8RC:$rS, G8RC:$rB)))]>; 284151937Sjkimdef AND8 : XForm_6<31, 28, (outs G8RC:$rA), (ins G8RC:$rS, G8RC:$rB), 285151937Sjkim "and $rA, $rS, $rB", IntGeneral, 286151937Sjkim [(set G8RC:$rA, (and G8RC:$rS, G8RC:$rB))]>; 287151937Sjkimdef ANDC8: XForm_6<31, 60, (outs G8RC:$rA), (ins G8RC:$rS, G8RC:$rB), 288151937Sjkim "andc $rA, $rS, $rB", IntGeneral, 289151937Sjkim [(set G8RC:$rA, (and G8RC:$rS, (not G8RC:$rB)))]>; 290151937Sjkimdef OR8 : XForm_6<31, 444, (outs G8RC:$rA), (ins G8RC:$rS, G8RC:$rB), 291151937Sjkim "or $rA, $rS, $rB", IntGeneral, 292151937Sjkim [(set G8RC:$rA, (or G8RC:$rS, G8RC:$rB))]>; 293151937Sjkimdef NOR8 : XForm_6<31, 124, (outs G8RC:$rA), (ins G8RC:$rS, G8RC:$rB), 294151937Sjkim "nor $rA, $rS, $rB", IntGeneral, 295151937Sjkim [(set G8RC:$rA, (not (or G8RC:$rS, G8RC:$rB)))]>; 296151937Sjkimdef ORC8 : XForm_6<31, 412, (outs G8RC:$rA), (ins G8RC:$rS, G8RC:$rB), 297151937Sjkim "orc $rA, $rS, $rB", IntGeneral, 298151937Sjkim [(set G8RC:$rA, (or G8RC:$rS, (not G8RC:$rB)))]>; 299151937Sjkimdef EQV8 : XForm_6<31, 284, (outs G8RC:$rA), (ins G8RC:$rS, G8RC:$rB), 300151937Sjkim "eqv $rA, $rS, $rB", IntGeneral, 301151937Sjkim [(set G8RC:$rA, (not (xor G8RC:$rS, G8RC:$rB)))]>; 302151937Sjkimdef XOR8 : XForm_6<31, 316, (outs G8RC:$rA), (ins G8RC:$rS, G8RC:$rB), 303151937Sjkim "xor $rA, $rS, $rB", IntGeneral, 304151937Sjkim [(set G8RC:$rA, (xor G8RC:$rS, G8RC:$rB))]>; 305151937Sjkim 306151937Sjkim// Logical ops with immediate. 307151937Sjkimdef ANDIo8 : DForm_4<28, (outs G8RC:$dst), (ins G8RC:$src1, u16imm:$src2), 308151937Sjkim "andi. $dst, $src1, $src2", IntGeneral, 309151937Sjkim [(set G8RC:$dst, (and G8RC:$src1, immZExt16:$src2))]>, 310193267Sjkim isDOT; 311151937Sjkimdef ANDISo8 : DForm_4<29, (outs G8RC:$dst), (ins G8RC:$src1, u16imm:$src2), 312151937Sjkim "andis. $dst, $src1, $src2", IntGeneral, 313151937Sjkim [(set G8RC:$dst, (and G8RC:$src1,imm16ShiftedZExt:$src2))]>, 314151937Sjkim isDOT; 315151937Sjkimdef ORI8 : DForm_4<24, (outs G8RC:$dst), (ins G8RC:$src1, u16imm:$src2), 316151937Sjkim "ori $dst, $src1, $src2", IntGeneral, 317151937Sjkim [(set G8RC:$dst, (or G8RC:$src1, immZExt16:$src2))]>; 318151937Sjkimdef ORIS8 : DForm_4<25, (outs G8RC:$dst), (ins G8RC:$src1, u16imm:$src2), 319151937Sjkim "oris $dst, $src1, $src2", IntGeneral, 320151937Sjkim [(set G8RC:$dst, (or G8RC:$src1, imm16ShiftedZExt:$src2))]>; 321151937Sjkimdef XORI8 : DForm_4<26, (outs G8RC:$dst), (ins G8RC:$src1, u16imm:$src2), 322151937Sjkim "xori $dst, $src1, $src2", IntGeneral, 323193267Sjkim [(set G8RC:$dst, (xor G8RC:$src1, immZExt16:$src2))]>; 324151937Sjkimdef XORIS8 : DForm_4<27, (outs G8RC:$dst), (ins G8RC:$src1, u16imm:$src2), 325151937Sjkim "xoris $dst, $src1, $src2", IntGeneral, 326151937Sjkim [(set G8RC:$dst, (xor G8RC:$src1, imm16ShiftedZExt:$src2))]>; 327151937Sjkim 328151937Sjkimdef ADD8 : XOForm_1<31, 266, 0, (outs G8RC:$rT), (ins G8RC:$rA, G8RC:$rB), 329151937Sjkim "add $rT, $rA, $rB", IntGeneral, 330151937Sjkim [(set G8RC:$rT, (add G8RC:$rA, G8RC:$rB))]>; 331151937Sjkim 332151937Sjkimlet Defs = [CARRY] in { 333151937Sjkimdef ADDC8 : XOForm_1<31, 10, 0, (outs G8RC:$rT), (ins G8RC:$rA, G8RC:$rB), 334167802Sjkim "addc $rT, $rA, $rB", IntGeneral, 335151937Sjkim [(set G8RC:$rT, (addc G8RC:$rA, G8RC:$rB))]>, 336151937Sjkim PPC970_DGroup_Cracked; 337151937Sjkimdef ADDIC8 : DForm_2<12, (outs G8RC:$rD), (ins G8RC:$rA, s16imm64:$imm), 338151937Sjkim "addic $rD, $rA, $imm", IntGeneral, 339151937Sjkim [(set G8RC:$rD, (addc G8RC:$rA, immSExt16:$imm))]>; 340151937Sjkim} 341151937Sjkimdef ADDI8 : DForm_2<14, (outs G8RC:$rD), (ins G8RC:$rA, s16imm64:$imm), 342151937Sjkim "addi $rD, $rA, $imm", IntGeneral, 343151937Sjkim [(set G8RC:$rD, (add G8RC:$rA, immSExt16:$imm))]>; 344151937Sjkimdef ADDIS8 : DForm_2<15, (outs G8RC:$rD), (ins G8RC:$rA, symbolHi64:$imm), 345151937Sjkim "addis $rD, $rA, $imm", IntGeneral, 346151937Sjkim [(set G8RC:$rD, (add G8RC:$rA, imm16ShiftedSExt:$imm))]>; 347151937Sjkim 348151937Sjkimlet Defs = [CARRY] in { 349151937Sjkimdef SUBFIC8: DForm_2< 8, (outs G8RC:$rD), (ins G8RC:$rA, s16imm64:$imm), 350151937Sjkim "subfic $rD, $rA, $imm", IntGeneral, 351151937Sjkim [(set G8RC:$rD, (subc immSExt16:$imm, G8RC:$rA))]>; 352151937Sjkimdef SUBFC8 : XOForm_1<31, 8, 0, (outs G8RC:$rT), (ins G8RC:$rA, G8RC:$rB), 353151937Sjkim "subfc $rT, $rA, $rB", IntGeneral, 354151937Sjkim [(set G8RC:$rT, (subc G8RC:$rB, G8RC:$rA))]>, 355151937Sjkim PPC970_DGroup_Cracked; 356151937Sjkim} 357151937Sjkimdef SUBF8 : XOForm_1<31, 40, 0, (outs G8RC:$rT), (ins G8RC:$rA, G8RC:$rB), 358151937Sjkim "subf $rT, $rA, $rB", IntGeneral, 359151937Sjkim [(set G8RC:$rT, (sub G8RC:$rB, G8RC:$rA))]>; 360151937Sjkimdef NEG8 : XOForm_3<31, 104, 0, (outs G8RC:$rT), (ins G8RC:$rA), 361151937Sjkim "neg $rT, $rA", IntGeneral, 362151937Sjkim [(set G8RC:$rT, (ineg G8RC:$rA))]>; 363151937Sjkimlet Uses = [CARRY], Defs = [CARRY] in { 364151937Sjkimdef ADDE8 : XOForm_1<31, 138, 0, (outs G8RC:$rT), (ins G8RC:$rA, G8RC:$rB), 365151937Sjkim "adde $rT, $rA, $rB", IntGeneral, 366151937Sjkim [(set G8RC:$rT, (adde G8RC:$rA, G8RC:$rB))]>; 367151937Sjkimdef ADDME8 : XOForm_3<31, 234, 0, (outs G8RC:$rT), (ins G8RC:$rA), 368151937Sjkim "addme $rT, $rA", IntGeneral, 369151937Sjkim [(set G8RC:$rT, (adde G8RC:$rA, immAllOnes))]>; 370151937Sjkimdef ADDZE8 : XOForm_3<31, 202, 0, (outs G8RC:$rT), (ins G8RC:$rA), 371151937Sjkim "addze $rT, $rA", IntGeneral, 372151937Sjkim [(set G8RC:$rT, (adde G8RC:$rA, 0))]>; 373151937Sjkimdef SUBFE8 : XOForm_1<31, 136, 0, (outs G8RC:$rT), (ins G8RC:$rA, G8RC:$rB), 374151937Sjkim "subfe $rT, $rA, $rB", IntGeneral, 375151937Sjkim [(set G8RC:$rT, (sube G8RC:$rB, G8RC:$rA))]>; 376151937Sjkimdef SUBFME8 : XOForm_3<31, 232, 0, (outs G8RC:$rT), (ins G8RC:$rA), 377151937Sjkim "subfme $rT, $rA", IntGeneral, 378151937Sjkim [(set G8RC:$rT, (sube immAllOnes, G8RC:$rA))]>; 379151937Sjkimdef SUBFZE8 : XOForm_3<31, 200, 0, (outs G8RC:$rT), (ins G8RC:$rA), 380151937Sjkim "subfze $rT, $rA", IntGeneral, 381151937Sjkim [(set G8RC:$rT, (sube 0, G8RC:$rA))]>; 382151937Sjkim} 383151937Sjkim 384151937Sjkim 385151937Sjkimdef MULHD : XOForm_1<31, 73, 0, (outs G8RC:$rT), (ins G8RC:$rA, G8RC:$rB), 386151937Sjkim "mulhd $rT, $rA, $rB", IntMulHW, 387151937Sjkim [(set G8RC:$rT, (mulhs G8RC:$rA, G8RC:$rB))]>; 388151937Sjkimdef MULHDU : XOForm_1<31, 9, 0, (outs G8RC:$rT), (ins G8RC:$rA, G8RC:$rB), 389151937Sjkim "mulhdu $rT, $rA, $rB", IntMulHWU, 390151937Sjkim [(set G8RC:$rT, (mulhu G8RC:$rA, G8RC:$rB))]>; 391151937Sjkim 392151937Sjkimdef CMPD : XForm_16_ext<31, 0, (outs CRRC:$crD), (ins G8RC:$rA, G8RC:$rB), 393151937Sjkim "cmpd $crD, $rA, $rB", IntCompare>, isPPC64; 394151937Sjkimdef CMPLD : XForm_16_ext<31, 32, (outs CRRC:$crD), (ins G8RC:$rA, G8RC:$rB), 395151937Sjkim "cmpld $crD, $rA, $rB", IntCompare>, isPPC64; 396151937Sjkimdef CMPDI : DForm_5_ext<11, (outs CRRC:$crD), (ins G8RC:$rA, s16imm:$imm), 397151937Sjkim "cmpdi $crD, $rA, $imm", IntCompare>, isPPC64; 398def CMPLDI : DForm_6_ext<10, (outs CRRC:$dst), (ins G8RC:$src1, u16imm:$src2), 399 "cmpldi $dst, $src1, $src2", IntCompare>, isPPC64; 400 401def SLD : XForm_6<31, 27, (outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB), 402 "sld $rA, $rS, $rB", IntRotateD, 403 [(set G8RC:$rA, (PPCshl G8RC:$rS, GPRC:$rB))]>, isPPC64; 404def SRD : XForm_6<31, 539, (outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB), 405 "srd $rA, $rS, $rB", IntRotateD, 406 [(set G8RC:$rA, (PPCsrl G8RC:$rS, GPRC:$rB))]>, isPPC64; 407let Defs = [CARRY] in { 408def SRAD : XForm_6<31, 794, (outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB), 409 "srad $rA, $rS, $rB", IntRotateD, 410 [(set G8RC:$rA, (PPCsra G8RC:$rS, GPRC:$rB))]>, isPPC64; 411} 412 413def EXTSB8 : XForm_11<31, 954, (outs G8RC:$rA), (ins G8RC:$rS), 414 "extsb $rA, $rS", IntGeneral, 415 [(set G8RC:$rA, (sext_inreg G8RC:$rS, i8))]>; 416def EXTSH8 : XForm_11<31, 922, (outs G8RC:$rA), (ins G8RC:$rS), 417 "extsh $rA, $rS", IntGeneral, 418 [(set G8RC:$rA, (sext_inreg G8RC:$rS, i16))]>; 419 420def EXTSW : XForm_11<31, 986, (outs G8RC:$rA), (ins G8RC:$rS), 421 "extsw $rA, $rS", IntGeneral, 422 [(set G8RC:$rA, (sext_inreg G8RC:$rS, i32))]>, isPPC64; 423/// EXTSW_32 - Just like EXTSW, but works on '32-bit' registers. 424def EXTSW_32 : XForm_11<31, 986, (outs GPRC:$rA), (ins GPRC:$rS), 425 "extsw $rA, $rS", IntGeneral, 426 [(set GPRC:$rA, (PPCextsw_32 GPRC:$rS))]>, isPPC64; 427def EXTSW_32_64 : XForm_11<31, 986, (outs G8RC:$rA), (ins GPRC:$rS), 428 "extsw $rA, $rS", IntGeneral, 429 [(set G8RC:$rA, (sext GPRC:$rS))]>, isPPC64; 430 431let Defs = [CARRY] in { 432def SRADI : XSForm_1<31, 413, (outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH), 433 "sradi $rA, $rS, $SH", IntRotateD, 434 [(set G8RC:$rA, (sra G8RC:$rS, (i32 imm:$SH)))]>, isPPC64; 435} 436def CNTLZD : XForm_11<31, 58, (outs G8RC:$rA), (ins G8RC:$rS), 437 "cntlzd $rA, $rS", IntGeneral, 438 [(set G8RC:$rA, (ctlz G8RC:$rS))]>; 439 440def DIVD : XOForm_1<31, 489, 0, (outs G8RC:$rT), (ins G8RC:$rA, G8RC:$rB), 441 "divd $rT, $rA, $rB", IntDivD, 442 [(set G8RC:$rT, (sdiv G8RC:$rA, G8RC:$rB))]>, isPPC64, 443 PPC970_DGroup_First, PPC970_DGroup_Cracked; 444def DIVDU : XOForm_1<31, 457, 0, (outs G8RC:$rT), (ins G8RC:$rA, G8RC:$rB), 445 "divdu $rT, $rA, $rB", IntDivD, 446 [(set G8RC:$rT, (udiv G8RC:$rA, G8RC:$rB))]>, isPPC64, 447 PPC970_DGroup_First, PPC970_DGroup_Cracked; 448def MULLD : XOForm_1<31, 233, 0, (outs G8RC:$rT), (ins G8RC:$rA, G8RC:$rB), 449 "mulld $rT, $rA, $rB", IntMulHD, 450 [(set G8RC:$rT, (mul G8RC:$rA, G8RC:$rB))]>, isPPC64; 451 452 453let isCommutable = 1 in { 454def RLDIMI : MDForm_1<30, 3, 455 (outs G8RC:$rA), (ins G8RC:$rSi, G8RC:$rS, u6imm:$SH, u6imm:$MB), 456 "rldimi $rA, $rS, $SH, $MB", IntRotateD, 457 []>, isPPC64, RegConstraint<"$rSi = $rA">, 458 NoEncode<"$rSi">; 459} 460 461// Rotate instructions. 462def RLDCL : MDForm_1<30, 0, 463 (outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB, u6imm:$MB), 464 "rldcl $rA, $rS, $rB, $MB", IntRotateD, 465 []>, isPPC64; 466def RLDICL : MDForm_1<30, 0, 467 (outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH, u6imm:$MB), 468 "rldicl $rA, $rS, $SH, $MB", IntRotateD, 469 []>, isPPC64; 470def RLDICR : MDForm_1<30, 1, 471 (outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH, u6imm:$ME), 472 "rldicr $rA, $rS, $SH, $ME", IntRotateD, 473 []>, isPPC64; 474} // End FXU Operations. 475 476 477//===----------------------------------------------------------------------===// 478// Load/Store instructions. 479// 480 481 482// Sign extending loads. 483let canFoldAsLoad = 1, PPC970_Unit = 2 in { 484def LHA8: DForm_1<42, (outs G8RC:$rD), (ins memri:$src), 485 "lha $rD, $src", LdStLHA, 486 [(set G8RC:$rD, (sextloadi16 iaddr:$src))]>, 487 PPC970_DGroup_Cracked; 488def LWA : DSForm_1<58, 2, (outs G8RC:$rD), (ins memrix:$src), 489 "lwa $rD, $src", LdStLWA, 490 [(set G8RC:$rD, (sextloadi32 ixaddr:$src))]>, isPPC64, 491 PPC970_DGroup_Cracked; 492def LHAX8: XForm_1<31, 343, (outs G8RC:$rD), (ins memrr:$src), 493 "lhax $rD, $src", LdStLHA, 494 [(set G8RC:$rD, (sextloadi16 xaddr:$src))]>, 495 PPC970_DGroup_Cracked; 496def LWAX : XForm_1<31, 341, (outs G8RC:$rD), (ins memrr:$src), 497 "lwax $rD, $src", LdStLHA, 498 [(set G8RC:$rD, (sextloadi32 xaddr:$src))]>, isPPC64, 499 PPC970_DGroup_Cracked; 500 501// Update forms. 502let mayLoad = 1 in 503def LHAU8 : DForm_1<43, (outs G8RC:$rD, ptr_rc:$ea_result), (ins symbolLo:$disp, 504 ptr_rc:$rA), 505 "lhau $rD, $disp($rA)", LdStGeneral, 506 []>, RegConstraint<"$rA = $ea_result">, 507 NoEncode<"$ea_result">; 508// NO LWAU! 509 510} 511 512// Zero extending loads. 513let canFoldAsLoad = 1, PPC970_Unit = 2 in { 514def LBZ8 : DForm_1<34, (outs G8RC:$rD), (ins memri:$src), 515 "lbz $rD, $src", LdStGeneral, 516 [(set G8RC:$rD, (zextloadi8 iaddr:$src))]>; 517def LHZ8 : DForm_1<40, (outs G8RC:$rD), (ins memri:$src), 518 "lhz $rD, $src", LdStGeneral, 519 [(set G8RC:$rD, (zextloadi16 iaddr:$src))]>; 520def LWZ8 : DForm_1<32, (outs G8RC:$rD), (ins memri:$src), 521 "lwz $rD, $src", LdStGeneral, 522 [(set G8RC:$rD, (zextloadi32 iaddr:$src))]>, isPPC64; 523 524def LBZX8 : XForm_1<31, 87, (outs G8RC:$rD), (ins memrr:$src), 525 "lbzx $rD, $src", LdStGeneral, 526 [(set G8RC:$rD, (zextloadi8 xaddr:$src))]>; 527def LHZX8 : XForm_1<31, 279, (outs G8RC:$rD), (ins memrr:$src), 528 "lhzx $rD, $src", LdStGeneral, 529 [(set G8RC:$rD, (zextloadi16 xaddr:$src))]>; 530def LWZX8 : XForm_1<31, 23, (outs G8RC:$rD), (ins memrr:$src), 531 "lwzx $rD, $src", LdStGeneral, 532 [(set G8RC:$rD, (zextloadi32 xaddr:$src))]>; 533 534 535// Update forms. 536let mayLoad = 1 in { 537def LBZU8 : DForm_1<35, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr), 538 "lbzu $rD, $addr", LdStGeneral, 539 []>, RegConstraint<"$addr.reg = $ea_result">, 540 NoEncode<"$ea_result">; 541def LHZU8 : DForm_1<41, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr), 542 "lhzu $rD, $addr", LdStGeneral, 543 []>, RegConstraint<"$addr.reg = $ea_result">, 544 NoEncode<"$ea_result">; 545def LWZU8 : DForm_1<33, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr), 546 "lwzu $rD, $addr", LdStGeneral, 547 []>, RegConstraint<"$addr.reg = $ea_result">, 548 NoEncode<"$ea_result">; 549} 550} 551 552 553// Full 8-byte loads. 554let canFoldAsLoad = 1, PPC970_Unit = 2 in { 555def LD : DSForm_1<58, 0, (outs G8RC:$rD), (ins memrix:$src), 556 "ld $rD, $src", LdStLD, 557 [(set G8RC:$rD, (load ixaddr:$src))]>, isPPC64; 558def LDtoc: DSForm_1<58, 0, (outs G8RC:$rD), (ins tocentry:$disp, G8RC:$reg), 559 "ld $rD, $disp($reg)", LdStLD, 560 [(set G8RC:$rD, 561 (PPCtoc_entry tglobaladdr:$disp, G8RC:$reg))]>, isPPC64; 562def LDX : XForm_1<31, 21, (outs G8RC:$rD), (ins memrr:$src), 563 "ldx $rD, $src", LdStLD, 564 [(set G8RC:$rD, (load xaddr:$src))]>, isPPC64; 565 566let mayLoad = 1 in 567def LDU : DSForm_1<58, 1, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memrix:$addr), 568 "ldu $rD, $addr", LdStLD, 569 []>, RegConstraint<"$addr.reg = $ea_result">, isPPC64, 570 NoEncode<"$ea_result">; 571 572} 573 574let PPC970_Unit = 2 in { 575// Truncating stores. 576def STB8 : DForm_1<38, (outs), (ins G8RC:$rS, memri:$src), 577 "stb $rS, $src", LdStGeneral, 578 [(truncstorei8 G8RC:$rS, iaddr:$src)]>; 579def STH8 : DForm_1<44, (outs), (ins G8RC:$rS, memri:$src), 580 "sth $rS, $src", LdStGeneral, 581 [(truncstorei16 G8RC:$rS, iaddr:$src)]>; 582def STW8 : DForm_1<36, (outs), (ins G8RC:$rS, memri:$src), 583 "stw $rS, $src", LdStGeneral, 584 [(truncstorei32 G8RC:$rS, iaddr:$src)]>; 585def STBX8 : XForm_8<31, 215, (outs), (ins G8RC:$rS, memrr:$dst), 586 "stbx $rS, $dst", LdStGeneral, 587 [(truncstorei8 G8RC:$rS, xaddr:$dst)]>, 588 PPC970_DGroup_Cracked; 589def STHX8 : XForm_8<31, 407, (outs), (ins G8RC:$rS, memrr:$dst), 590 "sthx $rS, $dst", LdStGeneral, 591 [(truncstorei16 G8RC:$rS, xaddr:$dst)]>, 592 PPC970_DGroup_Cracked; 593def STWX8 : XForm_8<31, 151, (outs), (ins G8RC:$rS, memrr:$dst), 594 "stwx $rS, $dst", LdStGeneral, 595 [(truncstorei32 G8RC:$rS, xaddr:$dst)]>, 596 PPC970_DGroup_Cracked; 597// Normal 8-byte stores. 598def STD : DSForm_1<62, 0, (outs), (ins G8RC:$rS, memrix:$dst), 599 "std $rS, $dst", LdStSTD, 600 [(store G8RC:$rS, ixaddr:$dst)]>, isPPC64; 601def STDX : XForm_8<31, 149, (outs), (ins G8RC:$rS, memrr:$dst), 602 "stdx $rS, $dst", LdStSTD, 603 [(store G8RC:$rS, xaddr:$dst)]>, isPPC64, 604 PPC970_DGroup_Cracked; 605} 606 607let PPC970_Unit = 2 in { 608 609def STBU8 : DForm_1<38, (outs ptr_rc:$ea_res), (ins G8RC:$rS, 610 symbolLo:$ptroff, ptr_rc:$ptrreg), 611 "stbu $rS, $ptroff($ptrreg)", LdStGeneral, 612 [(set ptr_rc:$ea_res, 613 (pre_truncsti8 G8RC:$rS, ptr_rc:$ptrreg, 614 iaddroff:$ptroff))]>, 615 RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; 616def STHU8 : DForm_1<45, (outs ptr_rc:$ea_res), (ins G8RC:$rS, 617 symbolLo:$ptroff, ptr_rc:$ptrreg), 618 "sthu $rS, $ptroff($ptrreg)", LdStGeneral, 619 [(set ptr_rc:$ea_res, 620 (pre_truncsti16 G8RC:$rS, ptr_rc:$ptrreg, 621 iaddroff:$ptroff))]>, 622 RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; 623def STWU8 : DForm_1<37, (outs ptr_rc:$ea_res), (ins G8RC:$rS, 624 symbolLo:$ptroff, ptr_rc:$ptrreg), 625 "stwu $rS, $ptroff($ptrreg)", LdStGeneral, 626 [(set ptr_rc:$ea_res, (pre_store G8RC:$rS, ptr_rc:$ptrreg, 627 iaddroff:$ptroff))]>, 628 RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; 629 630 631def STDU : DSForm_1<62, 1, (outs ptr_rc:$ea_res), (ins G8RC:$rS, 632 s16immX4:$ptroff, ptr_rc:$ptrreg), 633 "stdu $rS, $ptroff($ptrreg)", LdStSTD, 634 [(set ptr_rc:$ea_res, (pre_store G8RC:$rS, ptr_rc:$ptrreg, 635 iaddroff:$ptroff))]>, 636 RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">, 637 isPPC64; 638 639let mayStore = 1 in 640def STDUX : XForm_8<31, 181, (outs), (ins G8RC:$rS, memrr:$dst), 641 "stdux $rS, $dst", LdStSTD, 642 []>, isPPC64; 643 644// STD_32/STDX_32 - Just like STD/STDX, but uses a '32-bit' input register. 645def STD_32 : DSForm_1<62, 0, (outs), (ins GPRC:$rT, memrix:$dst), 646 "std $rT, $dst", LdStSTD, 647 [(PPCstd_32 GPRC:$rT, ixaddr:$dst)]>, isPPC64; 648def STDX_32 : XForm_8<31, 149, (outs), (ins GPRC:$rT, memrr:$dst), 649 "stdx $rT, $dst", LdStSTD, 650 [(PPCstd_32 GPRC:$rT, xaddr:$dst)]>, isPPC64, 651 PPC970_DGroup_Cracked; 652} 653 654 655 656//===----------------------------------------------------------------------===// 657// Floating point instructions. 658// 659 660 661let PPC970_Unit = 3, Uses = [RM] in { // FPU Operations. 662def FCFID : XForm_26<63, 846, (outs F8RC:$frD), (ins F8RC:$frB), 663 "fcfid $frD, $frB", FPGeneral, 664 [(set F8RC:$frD, (PPCfcfid F8RC:$frB))]>, isPPC64; 665def FCTIDZ : XForm_26<63, 815, (outs F8RC:$frD), (ins F8RC:$frB), 666 "fctidz $frD, $frB", FPGeneral, 667 [(set F8RC:$frD, (PPCfctidz F8RC:$frB))]>, isPPC64; 668} 669 670 671//===----------------------------------------------------------------------===// 672// Instruction Patterns 673// 674 675// Extensions and truncates to/from 32-bit regs. 676def : Pat<(i64 (zext GPRC:$in)), 677 (RLDICL (OR4To8 GPRC:$in, GPRC:$in), 0, 32)>; 678def : Pat<(i64 (anyext GPRC:$in)), 679 (OR4To8 GPRC:$in, GPRC:$in)>; 680def : Pat<(i32 (trunc G8RC:$in)), 681 (OR8To4 G8RC:$in, G8RC:$in)>; 682 683// Extending loads with i64 targets. 684def : Pat<(zextloadi1 iaddr:$src), 685 (LBZ8 iaddr:$src)>; 686def : Pat<(zextloadi1 xaddr:$src), 687 (LBZX8 xaddr:$src)>; 688def : Pat<(extloadi1 iaddr:$src), 689 (LBZ8 iaddr:$src)>; 690def : Pat<(extloadi1 xaddr:$src), 691 (LBZX8 xaddr:$src)>; 692def : Pat<(extloadi8 iaddr:$src), 693 (LBZ8 iaddr:$src)>; 694def : Pat<(extloadi8 xaddr:$src), 695 (LBZX8 xaddr:$src)>; 696def : Pat<(extloadi16 iaddr:$src), 697 (LHZ8 iaddr:$src)>; 698def : Pat<(extloadi16 xaddr:$src), 699 (LHZX8 xaddr:$src)>; 700def : Pat<(extloadi32 iaddr:$src), 701 (LWZ8 iaddr:$src)>; 702def : Pat<(extloadi32 xaddr:$src), 703 (LWZX8 xaddr:$src)>; 704 705// Standard shifts. These are represented separately from the real shifts above 706// so that we can distinguish between shifts that allow 6-bit and 7-bit shift 707// amounts. 708def : Pat<(sra G8RC:$rS, GPRC:$rB), 709 (SRAD G8RC:$rS, GPRC:$rB)>; 710def : Pat<(srl G8RC:$rS, GPRC:$rB), 711 (SRD G8RC:$rS, GPRC:$rB)>; 712def : Pat<(shl G8RC:$rS, GPRC:$rB), 713 (SLD G8RC:$rS, GPRC:$rB)>; 714 715// SHL/SRL 716def : Pat<(shl G8RC:$in, (i32 imm:$imm)), 717 (RLDICR G8RC:$in, imm:$imm, (SHL64 imm:$imm))>; 718def : Pat<(srl G8RC:$in, (i32 imm:$imm)), 719 (RLDICL G8RC:$in, (SRL64 imm:$imm), imm:$imm)>; 720 721// ROTL 722def : Pat<(rotl G8RC:$in, GPRC:$sh), 723 (RLDCL G8RC:$in, GPRC:$sh, 0)>; 724def : Pat<(rotl G8RC:$in, (i32 imm:$imm)), 725 (RLDICL G8RC:$in, imm:$imm, 0)>; 726 727// Hi and Lo for Darwin Global Addresses. 728def : Pat<(PPChi tglobaladdr:$in, 0), (LIS8 tglobaladdr:$in)>; 729def : Pat<(PPClo tglobaladdr:$in, 0), (LI8 tglobaladdr:$in)>; 730def : Pat<(PPChi tconstpool:$in , 0), (LIS8 tconstpool:$in)>; 731def : Pat<(PPClo tconstpool:$in , 0), (LI8 tconstpool:$in)>; 732def : Pat<(PPChi tjumptable:$in , 0), (LIS8 tjumptable:$in)>; 733def : Pat<(PPClo tjumptable:$in , 0), (LI8 tjumptable:$in)>; 734def : Pat<(PPChi tblockaddress:$in, 0), (LIS8 tblockaddress:$in)>; 735def : Pat<(PPClo tblockaddress:$in, 0), (LI8 tblockaddress:$in)>; 736def : Pat<(add G8RC:$in, (PPChi tglobaladdr:$g, 0)), 737 (ADDIS8 G8RC:$in, tglobaladdr:$g)>; 738def : Pat<(add G8RC:$in, (PPChi tconstpool:$g, 0)), 739 (ADDIS8 G8RC:$in, tconstpool:$g)>; 740def : Pat<(add G8RC:$in, (PPChi tjumptable:$g, 0)), 741 (ADDIS8 G8RC:$in, tjumptable:$g)>; 742def : Pat<(add G8RC:$in, (PPChi tblockaddress:$g, 0)), 743 (ADDIS8 G8RC:$in, tblockaddress:$g)>; 744