1//===-- MipsSubtarget.cpp - Mips Subtarget Information --------------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the Mips specific subclass of TargetSubtargetInfo. 11// 12//===----------------------------------------------------------------------===// 13 14#define DEBUG_TYPE "mips-subtarget" 15 16#include "MipsMachineFunction.h" 17#include "MipsSubtarget.h" 18#include "MipsTargetMachine.h" 19#include "Mips.h" 20#include "MipsRegisterInfo.h" 21#include "llvm/IR/Attributes.h" 22#include "llvm/IR/Function.h" 23#include "llvm/Support/CommandLine.h" 24#include "llvm/Support/Debug.h" 25#include "llvm/Support/TargetRegistry.h" 26#include "llvm/Support/raw_ostream.h" 27 28#define GET_SUBTARGETINFO_TARGET_DESC 29#define GET_SUBTARGETINFO_CTOR 30#include "MipsGenSubtargetInfo.inc" 31 32 33using namespace llvm; 34 35// FIXME: Maybe this should be on by default when Mips16 is specified 36// 37static cl::opt<bool> Mixed16_32( 38 "mips-mixed-16-32", 39 cl::init(false), 40 cl::desc("Allow for a mixture of Mips16 " 41 "and Mips32 code in a single source file"), 42 cl::Hidden); 43 44static cl::opt<bool> Mips_Os16( 45 "mips-os16", 46 cl::init(false), 47 cl::desc("Compile all functions that don' use " 48 "floating point as Mips 16"), 49 cl::Hidden); 50 51void MipsSubtarget::anchor() { } 52 53MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, 54 const std::string &FS, bool little, 55 Reloc::Model _RM, MipsTargetMachine *_TM) : 56 MipsGenSubtargetInfo(TT, CPU, FS), 57 MipsArchVersion(Mips32), MipsABI(UnknownABI), IsLittle(little), 58 IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false), 59 IsLinux(true), HasSEInReg(false), HasCondMov(false), HasSwap(false), 60 HasBitCount(false), HasFPIdx(false), 61 InMips16Mode(false), InMicroMipsMode(false), HasDSP(false), HasDSPR2(false), 62 AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), 63 RM(_RM), OverrideMode(NoOverride), TM(_TM) 64{ 65 std::string CPUName = CPU; 66 if (CPUName.empty()) 67 CPUName = "mips32"; 68 69 // Parse features string. 70 ParseSubtargetFeatures(CPUName, FS); 71 72 PreviousInMips16Mode = InMips16Mode; 73 74 // Initialize scheduling itinerary for the specified CPU. 75 InstrItins = getInstrItineraryForCPU(CPUName); 76 77 // Set MipsABI if it hasn't been set yet. 78 if (MipsABI == UnknownABI) 79 MipsABI = hasMips64() ? N64 : O32; 80 81 // Check if Architecture and ABI are compatible. 82 assert(((!hasMips64() && (isABI_O32() || isABI_EABI())) || 83 (hasMips64() && (isABI_N32() || isABI_N64()))) && 84 "Invalid Arch & ABI pair."); 85 86 // Is the target system Linux ? 87 if (TT.find("linux") == std::string::npos) 88 IsLinux = false; 89 90 // Set UseSmallSection. 91 UseSmallSection = !IsLinux && (RM == Reloc::Static); 92} 93 94bool 95MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel, 96 TargetSubtargetInfo::AntiDepBreakMode &Mode, 97 RegClassVector &CriticalPathRCs) const { 98 Mode = TargetSubtargetInfo::ANTIDEP_NONE; 99 CriticalPathRCs.clear(); 100 CriticalPathRCs.push_back(hasMips64() ? 101 &Mips::CPU64RegsRegClass : &Mips::CPURegsRegClass); 102 return OptLevel >= CodeGenOpt::Aggressive; 103} 104 105//FIXME: This logic for reseting the subtarget along with 106// the helper classes can probably be simplified but there are a lot of 107// cases so we will defer rewriting this to later. 108// 109void MipsSubtarget::resetSubtarget(MachineFunction *MF) { 110 bool ChangeToMips16 = false, ChangeToNoMips16 = false; 111 DEBUG(dbgs() << "resetSubtargetFeatures" << "\n"); 112 AttributeSet FnAttrs = MF->getFunction()->getAttributes(); 113 ChangeToMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex, 114 "mips16"); 115 ChangeToNoMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex, 116 "nomips16"); 117 assert (!(ChangeToMips16 & ChangeToNoMips16) && 118 "mips16 and nomips16 specified on the same function"); 119 if (ChangeToMips16) { 120 if (PreviousInMips16Mode) 121 return; 122 OverrideMode = Mips16Override; 123 PreviousInMips16Mode = true; 124 TM->setHelperClassesMips16(); 125 return; 126 } else if (ChangeToNoMips16) { 127 if (!PreviousInMips16Mode) 128 return; 129 OverrideMode = NoMips16Override; 130 PreviousInMips16Mode = false; 131 TM->setHelperClassesMipsSE(); 132 return; 133 } else { 134 if (OverrideMode == NoOverride) 135 return; 136 OverrideMode = NoOverride; 137 DEBUG(dbgs() << "back to default" << "\n"); 138 if (inMips16Mode() && !PreviousInMips16Mode) { 139 TM->setHelperClassesMips16(); 140 PreviousInMips16Mode = true; 141 } else if (!inMips16Mode() && PreviousInMips16Mode) { 142 TM->setHelperClassesMipsSE(); 143 PreviousInMips16Mode = false; 144 } 145 return; 146 } 147} 148 149