1169689Skan;; Predicate definitions for SPARC. 2169689Skan;; Copyright (C) 2005 Free Software Foundation, Inc. 3169689Skan;; 4169689Skan;; This file is part of GCC. 5169689Skan;; 6169689Skan;; GCC is free software; you can redistribute it and/or modify 7169689Skan;; it under the terms of the GNU General Public License as published by 8169689Skan;; the Free Software Foundation; either version 2, or (at your option) 9169689Skan;; any later version. 10169689Skan;; 11169689Skan;; GCC is distributed in the hope that it will be useful, 12169689Skan;; but WITHOUT ANY WARRANTY; without even the implied warranty of 13169689Skan;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14169689Skan;; GNU General Public License for more details. 15169689Skan;; 16169689Skan;; You should have received a copy of the GNU General Public License 17169689Skan;; along with GCC; see the file COPYING. If not, write to 18169689Skan;; the Free Software Foundation, 51 Franklin Street, Fifth Floor, 19169689Skan;; Boston, MA 02110-1301, USA. 20169689Skan 21169689Skan;; Predicates for numerical constants. 22169689Skan 23169689Skan;; Return true if OP is the zero constant for MODE. 24169689Skan(define_predicate "const_zero_operand" 25169689Skan (and (match_code "const_int,const_double,const_vector") 26169689Skan (match_test "op == CONST0_RTX (mode)"))) 27169689Skan 28169689Skan;; Return true if OP is the one constant for MODE. 29169689Skan(define_predicate "const_one_operand" 30169689Skan (and (match_code "const_int,const_double,const_vector") 31169689Skan (match_test "op == CONST1_RTX (mode)"))) 32169689Skan 33169689Skan;; Return true if OP is the integer constant 4096. 34169689Skan(define_predicate "const_4096_operand" 35169689Skan (and (match_code "const_int") 36169689Skan (match_test "INTVAL (op) == 4096"))) 37169689Skan 38169689Skan;; Return true if OP is a constant that is representable by a 13-bit 39169689Skan;; signed field. This is an acceptable immediate operand for most 40169689Skan;; 3-address instructions. 41169689Skan(define_predicate "small_int_operand" 42169689Skan (and (match_code "const_int") 43169689Skan (match_test "SPARC_SIMM13_P (INTVAL (op))"))) 44169689Skan 45169689Skan;; Return true if OP is a constant operand for the umul instruction. That 46169689Skan;; instruction sign-extends immediate values just like all other SPARC 47169689Skan;; instructions, but interprets the extended result as an unsigned number. 48169689Skan(define_predicate "uns_small_int_operand" 49169689Skan (match_code "const_int,const_double") 50169689Skan{ 51169689Skan#if HOST_BITS_PER_WIDE_INT == 32 52169689Skan return ((GET_CODE (op) == CONST_INT && (unsigned) INTVAL (op) < 0x1000) 53169689Skan || (GET_CODE (op) == CONST_DOUBLE 54169689Skan && CONST_DOUBLE_HIGH (op) == 0 55169689Skan && (unsigned) CONST_DOUBLE_LOW (op) - 0xFFFFF000 < 0x1000)); 56169689Skan#else 57169689Skan return (GET_CODE (op) == CONST_INT 58169689Skan && ((INTVAL (op) >= 0 && INTVAL (op) < 0x1000) 59169689Skan || (INTVAL (op) >= 0xFFFFF000 60169689Skan && INTVAL (op) <= 0xFFFFFFFF))); 61169689Skan#endif 62169689Skan}) 63169689Skan 64169689Skan;; Return true if OP is a constant that can be loaded by the sethi instruction. 65169689Skan;; The first test avoids emitting sethi to load zero for example. 66169689Skan(define_predicate "const_high_operand" 67169689Skan (and (match_code "const_int") 68169689Skan (and (not (match_operand 0 "small_int_operand")) 69169689Skan (match_test "SPARC_SETHI_P (INTVAL (op) & GET_MODE_MASK (mode))")))) 70169689Skan 71169689Skan;; Return true if OP is a constant whose 1's complement can be loaded by the 72169689Skan;; sethi instruction. 73169689Skan(define_predicate "const_compl_high_operand" 74169689Skan (and (match_code "const_int") 75169689Skan (and (not (match_operand 0 "small_int_operand")) 76169689Skan (match_test "SPARC_SETHI_P (~INTVAL (op) & GET_MODE_MASK (mode))")))) 77169689Skan 78169689Skan;; Return true if OP is a FP constant that needs to be loaded by the sethi/losum 79169689Skan;; pair of instructions. 80169689Skan(define_predicate "fp_const_high_losum_operand" 81169689Skan (match_operand 0 "const_double_operand") 82169689Skan{ 83169689Skan gcc_assert (mode == SFmode); 84169689Skan return fp_high_losum_p (op); 85169689Skan}) 86169689Skan 87169689Skan 88169689Skan;; Predicates for symbolic constants. 89169689Skan 90169689Skan;; Return true if OP is either a symbol reference or a sum of a symbol 91169689Skan;; reference and a constant. 92169689Skan(define_predicate "symbolic_operand" 93169689Skan (match_code "symbol_ref,label_ref,const") 94169689Skan{ 95169689Skan enum machine_mode omode = GET_MODE (op); 96169689Skan 97169689Skan if (omode != mode && omode != VOIDmode && mode != VOIDmode) 98169689Skan return false; 99169689Skan 100169689Skan switch (GET_CODE (op)) 101169689Skan { 102169689Skan case SYMBOL_REF: 103169689Skan return !SYMBOL_REF_TLS_MODEL (op); 104169689Skan 105169689Skan case LABEL_REF: 106169689Skan return true; 107169689Skan 108169689Skan case CONST: 109169689Skan op = XEXP (op, 0); 110169689Skan return (((GET_CODE (XEXP (op, 0)) == SYMBOL_REF 111169689Skan && !SYMBOL_REF_TLS_MODEL (XEXP (op, 0))) 112169689Skan || GET_CODE (XEXP (op, 0)) == LABEL_REF) 113169689Skan && GET_CODE (XEXP (op, 1)) == CONST_INT); 114169689Skan 115169689Skan default: 116169689Skan gcc_unreachable (); 117169689Skan } 118169689Skan}) 119169689Skan 120169689Skan;; Return true if OP is a symbolic operand for the TLS Global Dynamic model. 121169689Skan(define_predicate "tgd_symbolic_operand" 122169689Skan (and (match_code "symbol_ref") 123169689Skan (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_GLOBAL_DYNAMIC"))) 124169689Skan 125169689Skan;; Return true if OP is a symbolic operand for the TLS Local Dynamic model. 126169689Skan(define_predicate "tld_symbolic_operand" 127169689Skan (and (match_code "symbol_ref") 128169689Skan (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC"))) 129169689Skan 130169689Skan;; Return true if OP is a symbolic operand for the TLS Initial Exec model. 131169689Skan(define_predicate "tie_symbolic_operand" 132169689Skan (and (match_code "symbol_ref") 133169689Skan (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC"))) 134169689Skan 135169689Skan;; Return true if OP is a symbolic operand for the TLS Local Exec model. 136169689Skan(define_predicate "tle_symbolic_operand" 137169689Skan (and (match_code "symbol_ref") 138169689Skan (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC"))) 139169689Skan 140169689Skan;; Return true if the operand is an argument used in generating PIC references 141169689Skan;; in either the medium/low or embedded medium/anywhere code models on V9. 142169689Skan;; Check for (const (minus (symbol_ref:GOT) 143169689Skan;; (const (minus (label) (pc))))) 144169689Skan(define_predicate "medium_pic_operand" 145169689Skan (match_code "const") 146169689Skan{ 147169689Skan /* Check for (const (minus (symbol_ref:GOT) 148169689Skan (const (minus (label) (pc))))). */ 149169689Skan op = XEXP (op, 0); 150169689Skan return GET_CODE (op) == MINUS 151169689Skan && GET_CODE (XEXP (op, 0)) == SYMBOL_REF 152169689Skan && GET_CODE (XEXP (op, 1)) == CONST 153169689Skan && GET_CODE (XEXP (XEXP (op, 1), 0)) == MINUS; 154169689Skan}) 155169689Skan 156169689Skan;; Return true if OP is a LABEL_REF of mode MODE. 157169689Skan(define_predicate "label_ref_operand" 158169689Skan (and (match_code "label_ref") 159169689Skan (match_test "GET_MODE (op) == mode"))) 160169689Skan 161169689Skan;; Return true if OP is a data segment reference. This includes the readonly 162169689Skan;; data segment or, in other words, anything but the text segment. 163169689Skan;; This is needed in the embedded medium/anywhere code model on V9. These 164169689Skan;; values are accessed with EMBMEDANY_BASE_REG. */ 165169689Skan(define_predicate "data_segment_operand" 166169689Skan (match_code "symbol_ref,plus,const") 167169689Skan{ 168169689Skan switch (GET_CODE (op)) 169169689Skan { 170169689Skan case SYMBOL_REF : 171169689Skan return ! SYMBOL_REF_FUNCTION_P (op); 172169689Skan case PLUS : 173169689Skan /* Assume canonical format of symbol + constant. 174169689Skan Fall through. */ 175169689Skan case CONST : 176169689Skan return data_segment_operand (XEXP (op, 0), VOIDmode); 177169689Skan default : 178169689Skan gcc_unreachable (); 179169689Skan } 180169689Skan}) 181169689Skan 182169689Skan;; Return true if OP is a text segment reference. 183169689Skan;; This is needed in the embedded medium/anywhere code model on V9. 184169689Skan(define_predicate "text_segment_operand" 185169689Skan (match_code "label_ref,symbol_ref,plus,const") 186169689Skan{ 187169689Skan switch (GET_CODE (op)) 188169689Skan { 189169689Skan case LABEL_REF : 190169689Skan return true; 191169689Skan case SYMBOL_REF : 192169689Skan return SYMBOL_REF_FUNCTION_P (op); 193169689Skan case PLUS : 194169689Skan /* Assume canonical format of symbol + constant. 195169689Skan Fall through. */ 196169689Skan case CONST : 197169689Skan return text_segment_operand (XEXP (op, 0), VOIDmode); 198169689Skan default : 199169689Skan gcc_unreachable (); 200169689Skan } 201169689Skan}) 202169689Skan 203169689Skan 204169689Skan;; Predicates for registers. 205169689Skan 206169689Skan;; Return true if OP is either the zero constant or a register. 207169689Skan(define_predicate "register_or_zero_operand" 208169689Skan (ior (match_operand 0 "register_operand") 209169689Skan (match_operand 0 "const_zero_operand"))) 210169689Skan 211169689Skan;; Return true if OP is a register operand in a floating point register. 212169689Skan(define_predicate "fp_register_operand" 213169689Skan (match_operand 0 "register_operand") 214169689Skan{ 215169689Skan if (GET_CODE (op) == SUBREG) 216169689Skan op = SUBREG_REG (op); /* Possibly a MEM */ 217169689Skan return REG_P (op) && SPARC_FP_REG_P (REGNO (op)); 218169689Skan}) 219169689Skan 220169689Skan;; Return true if OP is an integer register. 221169689Skan(define_special_predicate "int_register_operand" 222169689Skan (ior (match_test "register_operand (op, SImode)") 223169689Skan (match_test "TARGET_ARCH64 && register_operand (op, DImode)"))) 224169689Skan 225169689Skan;; Return true if OP is a floating point condition code register. 226169689Skan(define_predicate "fcc_register_operand" 227169689Skan (match_code "reg") 228169689Skan{ 229169689Skan if (mode != VOIDmode && mode != GET_MODE (op)) 230169689Skan return false; 231169689Skan if (mode == VOIDmode 232169689Skan && (GET_MODE (op) != CCFPmode && GET_MODE (op) != CCFPEmode)) 233169689Skan return false; 234169689Skan 235169689Skan#if 0 /* ??? 1 when %fcc0-3 are pseudos first. See gen_compare_reg(). */ 236169689Skan if (reg_renumber == 0) 237169689Skan return REGNO (op) >= FIRST_PSEUDO_REGISTER; 238169689Skan return REGNO_OK_FOR_CCFP_P (REGNO (op)); 239169689Skan#else 240169689Skan return ((unsigned) REGNO (op) - SPARC_FIRST_V9_FCC_REG) < 4; 241169689Skan#endif 242169689Skan}) 243169689Skan 244169689Skan;; Return true if OP is the floating point condition code register fcc0. 245169689Skan(define_predicate "fcc0_register_operand" 246169689Skan (match_code "reg") 247169689Skan{ 248169689Skan if (mode != VOIDmode && mode != GET_MODE (op)) 249169689Skan return false; 250169689Skan if (mode == VOIDmode 251169689Skan && (GET_MODE (op) != CCFPmode && GET_MODE (op) != CCFPEmode)) 252169689Skan return false; 253169689Skan 254169689Skan return REGNO (op) == SPARC_FCC_REG; 255169689Skan}) 256169689Skan 257169689Skan;; Return true if OP is an integer or floating point condition code register. 258169689Skan(define_predicate "icc_or_fcc_register_operand" 259169689Skan (match_code "reg") 260169689Skan{ 261169689Skan if (REGNO (op) == SPARC_ICC_REG) 262169689Skan { 263169689Skan if (mode != VOIDmode && mode != GET_MODE (op)) 264169689Skan return false; 265169689Skan if (mode == VOIDmode 266169689Skan && GET_MODE (op) != CCmode && GET_MODE (op) != CCXmode) 267169689Skan return false; 268169689Skan 269169689Skan return true; 270169689Skan } 271169689Skan 272169689Skan return fcc_register_operand (op, mode); 273169689Skan}) 274169689Skan 275169689Skan 276169689Skan;; Predicates for arithmetic instructions. 277169689Skan 278169689Skan;; Return true if OP is a register, or is a constant that is representable 279169689Skan;; by a 13-bit signed field. This is an acceptable operand for most 280169689Skan;; 3-address instructions. 281169689Skan(define_predicate "arith_operand" 282169689Skan (ior (match_operand 0 "register_operand") 283169689Skan (match_operand 0 "small_int_operand"))) 284169689Skan 285169689Skan;; 64-bit: Same as above. 286169689Skan;; 32-bit: Return true if OP is a register, or is a constant that is 287169689Skan;; representable by a couple of 13-bit signed fields. This is an 288169689Skan;; acceptable operand for most 3-address splitters. 289169689Skan(define_predicate "arith_double_operand" 290169689Skan (match_code "const_int,const_double,reg,subreg") 291169689Skan{ 292169689Skan bool arith_simple_operand = arith_operand (op, mode); 293169689Skan HOST_WIDE_INT m1, m2; 294169689Skan 295169689Skan if (TARGET_ARCH64 || arith_simple_operand) 296169689Skan return arith_simple_operand; 297169689Skan 298169689Skan#if HOST_BITS_PER_WIDE_INT == 32 299169689Skan if (GET_CODE (op) != CONST_DOUBLE) 300169689Skan return false; 301169689Skan m1 = CONST_DOUBLE_LOW (op); 302169689Skan m2 = CONST_DOUBLE_HIGH (op); 303169689Skan#else 304169689Skan if (GET_CODE (op) != CONST_INT) 305169689Skan return false; 306169689Skan m1 = trunc_int_for_mode (INTVAL (op), SImode); 307169689Skan m2 = trunc_int_for_mode (INTVAL (op) >> 32, SImode); 308169689Skan#endif 309169689Skan 310169689Skan return SPARC_SIMM13_P (m1) && SPARC_SIMM13_P (m2); 311169689Skan}) 312169689Skan 313169689Skan;; Return true if OP is suitable as second operand for add/sub. 314169689Skan(define_predicate "arith_add_operand" 315169689Skan (ior (match_operand 0 "arith_operand") 316169689Skan (match_operand 0 "const_4096_operand"))) 317169689Skan 318169689Skan;; Return true if OP is suitable as second double operand for add/sub. 319169689Skan(define_predicate "arith_double_add_operand" 320169689Skan (match_code "const_int,const_double,reg,subreg") 321169689Skan{ 322169689Skan bool _arith_double_operand = arith_double_operand (op, mode); 323169689Skan 324169689Skan if (_arith_double_operand) 325169689Skan return true; 326169689Skan 327169689Skan return TARGET_ARCH64 && const_4096_operand (op, mode); 328169689Skan}) 329169689Skan 330169689Skan;; Return true if OP is a register, or is a CONST_INT that can fit in a 331169689Skan;; signed 10-bit immediate field. This is an acceptable SImode operand for 332169689Skan;; the movrcc instructions. 333169689Skan(define_predicate "arith10_operand" 334169689Skan (ior (match_operand 0 "register_operand") 335169689Skan (and (match_code "const_int") 336169689Skan (match_test "SPARC_SIMM10_P (INTVAL (op))")))) 337169689Skan 338169689Skan;; Return true if OP is a register, or is a CONST_INT that can fit in a 339169689Skan;; signed 11-bit immediate field. This is an acceptable SImode operand for 340169689Skan;; the movcc instructions. 341169689Skan(define_predicate "arith11_operand" 342169689Skan (ior (match_operand 0 "register_operand") 343169689Skan (and (match_code "const_int") 344169689Skan (match_test "SPARC_SIMM11_P (INTVAL (op))")))) 345169689Skan 346169689Skan;; Return true if OP is a register or a constant for the umul instruction. 347169689Skan(define_predicate "uns_arith_operand" 348169689Skan (ior (match_operand 0 "register_operand") 349169689Skan (match_operand 0 "uns_small_int_operand"))) 350169689Skan 351169689Skan 352169689Skan;; Predicates for miscellaneous instructions. 353169689Skan 354169689Skan;; Return true if OP is valid for the lhs of a comparison insn. 355169689Skan(define_predicate "compare_operand" 356169689Skan (match_code "reg,subreg,zero_extract") 357169689Skan{ 358169689Skan if (GET_CODE (op) == ZERO_EXTRACT) 359169689Skan return (register_operand (XEXP (op, 0), mode) 360169689Skan && small_int_operand (XEXP (op, 1), mode) 361169689Skan && small_int_operand (XEXP (op, 2), mode) 362169689Skan /* This matches cmp_zero_extract. */ 363169689Skan && ((mode == SImode 364169689Skan && INTVAL (XEXP (op, 2)) > 19) 365169689Skan /* This matches cmp_zero_extract_sp64. */ 366169689Skan || (TARGET_ARCH64 367169689Skan && mode == DImode 368169689Skan && INTVAL (XEXP (op, 2)) > 51))); 369169689Skan else 370169689Skan return register_operand (op, mode); 371169689Skan}) 372169689Skan 373169689Skan;; Return true if OP is a valid operand for the source of a move insn. 374169689Skan(define_predicate "input_operand" 375169689Skan (match_code "const_int,const_double,const_vector,reg,subreg,mem") 376169689Skan{ 377169689Skan enum mode_class mclass; 378169689Skan 379169689Skan /* If both modes are non-void they must be the same. */ 380169689Skan if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op)) 381169689Skan return false; 382169689Skan 383169689Skan mclass = GET_MODE_CLASS (mode); 384169689Skan 385169689Skan /* Allow any 1-instruction integer constant. */ 386169689Skan if (mclass == MODE_INT 387169689Skan && (small_int_operand (op, mode) || const_high_operand (op, mode))) 388169689Skan return true; 389169689Skan 390169689Skan /* If 32-bit mode and this is a DImode constant, allow it 391169689Skan so that the splits can be generated. */ 392169689Skan if (TARGET_ARCH32 393169689Skan && mode == DImode 394169689Skan && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT)) 395169689Skan return true; 396169689Skan 397169689Skan if ((mclass == MODE_FLOAT && GET_CODE (op) == CONST_DOUBLE) 398169689Skan || (mclass == MODE_VECTOR_INT && GET_CODE (op) == CONST_VECTOR)) 399169689Skan return true; 400169689Skan 401169689Skan if (register_operand (op, mode)) 402169689Skan return true; 403169689Skan 404169689Skan /* If this is a SUBREG, look inside so that we handle paradoxical ones. */ 405169689Skan if (GET_CODE (op) == SUBREG) 406169689Skan op = SUBREG_REG (op); 407169689Skan 408169689Skan /* Check for valid MEM forms. */ 409169689Skan if (GET_CODE (op) == MEM) 410169689Skan return memory_address_p (mode, XEXP (op, 0)); 411169689Skan 412169689Skan return false; 413169689Skan}) 414169689Skan 415169689Skan;; Return true if OP is an address suitable for a call insn. 416169689Skan;; Call insn on SPARC can take a PC-relative constant address 417169689Skan;; or any regular memory address. 418169689Skan(define_predicate "call_address_operand" 419169689Skan (ior (match_operand 0 "symbolic_operand") 420169689Skan (match_test "memory_address_p (Pmode, op)"))) 421169689Skan 422169689Skan;; Return true if OP is an operand suitable for a call insn. 423169689Skan(define_predicate "call_operand" 424169689Skan (and (match_code "mem") 425169689Skan (match_test "call_address_operand (XEXP (op, 0), mode)"))) 426169689Skan 427169689Skan 428169689Skan;; Predicates for operators. 429169689Skan 430169689Skan;; Return true if OP is a comparison operator. This allows the use of 431169689Skan;; MATCH_OPERATOR to recognize all the branch insns. 432169689Skan(define_predicate "noov_compare_operator" 433169689Skan (match_code "ne,eq,ge,gt,le,lt,geu,gtu,leu,ltu") 434169689Skan{ 435169689Skan enum rtx_code code = GET_CODE (op); 436169689Skan if (GET_MODE (XEXP (op, 0)) == CC_NOOVmode 437169689Skan || GET_MODE (XEXP (op, 0)) == CCX_NOOVmode) 438169689Skan /* These are the only branches which work with CC_NOOVmode. */ 439169689Skan return (code == EQ || code == NE || code == GE || code == LT); 440169689Skan return true; 441169689Skan}) 442169689Skan 443169689Skan;; Return true if OP is a 64-bit comparison operator. This allows the use of 444169689Skan;; MATCH_OPERATOR to recognize all the branch insns. 445169689Skan(define_predicate "noov_compare64_operator" 446169689Skan (and (match_code "ne,eq,ge,gt,le,lt,geu,gtu,leu,ltu") 447169689Skan (match_test "TARGET_V9")) 448169689Skan{ 449169689Skan enum rtx_code code = GET_CODE (op); 450169689Skan if (GET_MODE (XEXP (op, 0)) == CCX_NOOVmode) 451169689Skan /* These are the only branches which work with CCX_NOOVmode. */ 452169689Skan return (code == EQ || code == NE || code == GE || code == LT); 453169689Skan return (GET_MODE (XEXP (op, 0)) == CCXmode); 454169689Skan}) 455169689Skan 456169689Skan;; Return true if OP is a comparison operator suitable for use in V9 457169689Skan;; conditional move or branch on register contents instructions. 458169689Skan(define_predicate "v9_register_compare_operator" 459169689Skan (match_code "eq,ne,ge,lt,le,gt")) 460169689Skan 461169689Skan;; Return true if OP is an operator which can set the condition codes 462169689Skan;; explicitly. We do not include PLUS and MINUS because these 463169689Skan;; require CC_NOOVmode, which we handle explicitly. 464169689Skan(define_predicate "cc_arith_operator" 465169689Skan (match_code "and,ior,xor")) 466169689Skan 467169689Skan;; Return true if OP is an operator which can bitwise complement its 468169689Skan;; second operand and set the condition codes explicitly. 469169689Skan;; XOR is not here because combine canonicalizes (xor (not ...) ...) 470169689Skan;; and (xor ... (not ...)) to (not (xor ...)). */ 471169689Skan(define_predicate "cc_arith_not_operator" 472169689Skan (match_code "and,ior")) 473169689Skan 474169689Skan;; Return true if OP is memory operand with just [%reg] addressing mode. 475169689Skan(define_predicate "memory_reg_operand" 476169689Skan (and (match_code "mem") 477169689Skan (and (match_operand 0 "memory_operand") 478169689Skan (match_test "REG_P (XEXP (op, 0))")))) 479