1117395Skan;; Scheduling description for HyperSPARC.
2117395Skan;;   Copyright (C) 2002 Free Software Foundation, Inc.
3117395Skan;;
4132718Skan;; This file is part of GCC.
5117395Skan;;
6132718Skan;; GCC is free software; you can redistribute it and/or modify
7117395Skan;; it under the terms of the GNU General Public License as published by
8117395Skan;; the Free Software Foundation; either version 2, or (at your option)
9117395Skan;; any later version.
10117395Skan;;
11132718Skan;; GCC is distributed in the hope that it will be useful,
12117395Skan;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13117395Skan;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14117395Skan;; GNU General Public License for more details.
15117395Skan;;
16117395Skan;; You should have received a copy of the GNU General Public License
17132718Skan;; along with GCC; see the file COPYING.  If not, write to
18169689Skan;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
19169689Skan;; Boston, MA 02110-1301, USA.
20117395Skan
21117395Skan;; The HyperSPARC is a dual-issue processor.  It is not all that fancy.
22117395Skan
23117395Skan;; ??? There are some things not modelled.  For example, sethi+or
24117395Skan;; ??? coming right after each other are specifically identified and
25117395Skan;; ??? dual-issued by the processor.  Similarly for sethi+ld[reg+lo].
26117395Skan;; ??? Actually, to be more precise that rule is sort of modelled now.
27117395Skan
28117395Skan(define_automaton "hypersparc_0,hypersparc_1")
29117395Skan
30117395Skan;; HyperSPARC/sparclite86x scheduling
31117395Skan
32117395Skan(define_cpu_unit "hs_memory,hs_branch,hs_shift,hs_fpalu" "hypersparc_0")
33117395Skan(define_cpu_unit "hs_fpmds" "hypersparc_1")
34117395Skan
35117395Skan(define_insn_reservation "hs_load" 1
36117395Skan  (and (ior (eq_attr "cpu" "hypersparc") (eq_attr "cpu" "sparclite86x"))
37117395Skan    (eq_attr "type" "load,sload,fpload"))
38117395Skan  "hs_memory")
39117395Skan
40117395Skan(define_insn_reservation "hs_store" 2
41117395Skan  (and (ior (eq_attr "cpu" "hypersparc") (eq_attr "cpu" "sparclite86x"))
42117395Skan    (eq_attr "type" "store,fpstore"))
43117395Skan  "hs_memory, nothing")
44117395Skan
45117395Skan(define_insn_reservation "hs_slbranch" 1
46117395Skan  (and (eq_attr "cpu" "sparclite86x")
47117395Skan    (eq_attr "type" "branch"))
48117395Skan  "hs_branch")
49117395Skan
50117395Skan(define_insn_reservation "hs_slshift" 1
51117395Skan  (and (eq_attr "cpu" "sparclite86x")
52117395Skan    (eq_attr "type" "shift"))
53117395Skan  "hs_shift")
54117395Skan
55117395Skan(define_insn_reservation "hs_fp_alu" 1
56117395Skan  (and (ior (eq_attr "cpu" "hypersparc") (eq_attr "cpu" "sparclite86x"))
57117395Skan    (eq_attr "type" "fp,fpmove,fpcmp"))
58117395Skan  "hs_fpalu")
59117395Skan
60117395Skan(define_insn_reservation "hs_fp_mult" 1
61117395Skan  (and (ior (eq_attr "cpu" "hypersparc") (eq_attr "cpu" "sparclite86x"))
62117395Skan    (eq_attr "type" "fpmul"))
63117395Skan  "hs_fpmds")
64117395Skan
65117395Skan(define_insn_reservation "hs_fp_divs" 8
66117395Skan  (and (ior (eq_attr "cpu" "hypersparc") (eq_attr "cpu" "sparclite86x"))
67117395Skan    (eq_attr "type" "fpdivs"))
68117395Skan  "hs_fpmds*6, nothing*2")
69117395Skan
70117395Skan(define_insn_reservation "hs_fp_divd" 12
71117395Skan  (and (ior (eq_attr "cpu" "hypersparc") (eq_attr "cpu" "sparclite86x"))
72117395Skan    (eq_attr "type" "fpdivd"))
73117395Skan  "hs_fpmds*10, nothing*2")
74117395Skan
75117395Skan(define_insn_reservation "hs_fp_sqrt" 17
76117395Skan  (and (ior (eq_attr "cpu" "hypersparc") (eq_attr "cpu" "sparclite86x"))
77117395Skan    (eq_attr "type" "fpsqrts,fpsqrtd"))
78117395Skan  "hs_fpmds*15, nothing*2")
79117395Skan
80117395Skan(define_insn_reservation "hs_imul" 17
81117395Skan  (and (ior (eq_attr "cpu" "hypersparc") (eq_attr "cpu" "sparclite86x"))
82117395Skan    (eq_attr "type" "imul"))
83117395Skan  "hs_fpmds*15, nothing*2")
84