machdep.c revision 203924
1176771Sraj/*- 2176771Sraj * Copyright (C) 2006 Semihalf, Marian Balakowicz <m8@semihalf.com> 3176771Sraj * All rights reserved. 4176771Sraj * 5176771Sraj * Redistribution and use in source and binary forms, with or without 6176771Sraj * modification, are permitted provided that the following conditions 7176771Sraj * are met: 8176771Sraj * 1. Redistributions of source code must retain the above copyright 9176771Sraj * notice, this list of conditions and the following disclaimer. 10176771Sraj * 2. Redistributions in binary form must reproduce the above copyright 11176771Sraj * notice, this list of conditions and the following disclaimer in the 12176771Sraj * documentation and/or other materials provided with the distribution. 13176771Sraj * 14176771Sraj * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15176771Sraj * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16176771Sraj * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 17176771Sraj * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18176771Sraj * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 19176771Sraj * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 20176771Sraj * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 21176771Sraj * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 22176771Sraj * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 23176771Sraj * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24176771Sraj */ 25176771Sraj/*- 26176771Sraj * Copyright (C) 2001 Benno Rice 27176771Sraj * All rights reserved. 28176771Sraj * 29176771Sraj * Redistribution and use in source and binary forms, with or without 30176771Sraj * modification, are permitted provided that the following conditions 31176771Sraj * are met: 32176771Sraj * 1. Redistributions of source code must retain the above copyright 33176771Sraj * notice, this list of conditions and the following disclaimer. 34176771Sraj * 2. Redistributions in binary form must reproduce the above copyright 35176771Sraj * notice, this list of conditions and the following disclaimer in the 36176771Sraj * documentation and/or other materials provided with the distribution. 37176771Sraj * 38176771Sraj * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 39176771Sraj * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 40176771Sraj * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 41176771Sraj * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 42176771Sraj * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 43176771Sraj * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 44176771Sraj * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 45176771Sraj * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 46176771Sraj * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 47176771Sraj * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 48176771Sraj * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $ 49176771Sraj */ 50176771Sraj/*- 51176771Sraj * Copyright (C) 1995, 1996 Wolfgang Solfrank. 52176771Sraj * Copyright (C) 1995, 1996 TooLs GmbH. 53176771Sraj * All rights reserved. 54176771Sraj * 55176771Sraj * Redistribution and use in source and binary forms, with or without 56176771Sraj * modification, are permitted provided that the following conditions 57176771Sraj * are met: 58176771Sraj * 1. Redistributions of source code must retain the above copyright 59176771Sraj * notice, this list of conditions and the following disclaimer. 60176771Sraj * 2. Redistributions in binary form must reproduce the above copyright 61176771Sraj * notice, this list of conditions and the following disclaimer in the 62176771Sraj * documentation and/or other materials provided with the distribution. 63176771Sraj * 3. All advertising materials mentioning features or use of this software 64176771Sraj * must display the following acknowledgement: 65176771Sraj * This product includes software developed by TooLs GmbH. 66176771Sraj * 4. The name of TooLs GmbH may not be used to endorse or promote products 67176771Sraj * derived from this software without specific prior written permission. 68176771Sraj * 69176771Sraj * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 70176771Sraj * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 71176771Sraj * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 72176771Sraj * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 73176771Sraj * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 74176771Sraj * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 75176771Sraj * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 76176771Sraj * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 77176771Sraj * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 78176771Sraj * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 79176771Sraj */ 80176771Sraj 81176771Sraj#include <sys/cdefs.h> 82176771Sraj__FBSDID("$FreeBSD: head/sys/powerpc/booke/machdep.c 203924 2010-02-15 14:38:30Z raj $"); 83176771Sraj 84176771Sraj#include "opt_compat.h" 85191362Smarcel#include "opt_ddb.h" 86176771Sraj#include "opt_kstack_pages.h" 87191362Smarcel#include "opt_msgbuf.h" 88176771Sraj 89176771Sraj#include <sys/cdefs.h> 90176771Sraj#include <sys/types.h> 91176771Sraj#include <sys/param.h> 92176771Sraj#include <sys/proc.h> 93176771Sraj#include <sys/systm.h> 94176771Sraj#include <sys/time.h> 95176771Sraj#include <sys/bio.h> 96176771Sraj#include <sys/buf.h> 97176771Sraj#include <sys/bus.h> 98176771Sraj#include <sys/cons.h> 99176771Sraj#include <sys/cpu.h> 100176771Sraj#include <sys/kdb.h> 101176771Sraj#include <sys/kernel.h> 102176771Sraj#include <sys/lock.h> 103176771Sraj#include <sys/mutex.h> 104176771Sraj#include <sys/sysctl.h> 105176771Sraj#include <sys/exec.h> 106176771Sraj#include <sys/ktr.h> 107176771Sraj#include <sys/sysproto.h> 108176771Sraj#include <sys/signalvar.h> 109176771Sraj#include <sys/sysent.h> 110176771Sraj#include <sys/imgact.h> 111176771Sraj#include <sys/msgbuf.h> 112176771Sraj#include <sys/ptrace.h> 113176771Sraj 114176771Sraj#include <vm/vm.h> 115176771Sraj#include <vm/pmap.h> 116176771Sraj#include <vm/vm_page.h> 117176771Sraj#include <vm/vm_object.h> 118176771Sraj#include <vm/vm_pager.h> 119176771Sraj 120176771Sraj#include <machine/cpu.h> 121176771Sraj#include <machine/kdb.h> 122176771Sraj#include <machine/reg.h> 123176771Sraj#include <machine/vmparam.h> 124176771Sraj#include <machine/spr.h> 125176771Sraj#include <machine/hid.h> 126176771Sraj#include <machine/psl.h> 127176771Sraj#include <machine/trap.h> 128176771Sraj#include <machine/md_var.h> 129176771Sraj#include <machine/mmuvar.h> 130176771Sraj#include <machine/sigframe.h> 131176771Sraj#include <machine/metadata.h> 132176771Sraj#include <machine/bootinfo.h> 133192067Snwhitehorn#include <machine/platform.h> 134176771Sraj 135176771Sraj#include <sys/linker.h> 136176771Sraj#include <sys/reboot.h> 137176771Sraj 138186228Sraj#include <powerpc/mpc85xx/ocpbus.h> 139186228Sraj#include <powerpc/mpc85xx/mpc85xx.h> 140186228Sraj 141191362Smarcel#ifdef DDB 142191362Smarcelextern vm_offset_t ksym_start, ksym_end; 143191362Smarcel#endif 144191362Smarcel 145176771Sraj#ifdef DEBUG 146176771Sraj#define debugf(fmt, args...) printf(fmt, ##args) 147176771Sraj#else 148176771Sraj#define debugf(fmt, args...) 149176771Sraj#endif 150176771Sraj 151176771Srajextern unsigned char kernel_text[]; 152176771Srajextern unsigned char _etext[]; 153176771Srajextern unsigned char _edata[]; 154176771Srajextern unsigned char __bss_start[]; 155176771Srajextern unsigned char __sbss_start[]; 156176771Srajextern unsigned char __sbss_end[]; 157176771Srajextern unsigned char _end[]; 158176771Sraj 159176928Smarcelextern void dcache_enable(void); 160176928Smarcelextern void dcache_inval(void); 161176928Smarcelextern void icache_enable(void); 162176928Smarcelextern void icache_inval(void); 163176928Smarcel 164176771Srajstruct kva_md_info kmi; 165176771Srajstruct pcpu __pcpu[MAXCPU]; 166176771Srajstruct trapframe frame0; 167176771Srajint cold = 1; 168176771Srajlong realmem = 0; 169176771Srajlong Maxmem = 0; 170176771Sraj 171176771Srajstruct bootinfo *bootinfo; 172176771Sraj 173176771Srajchar machine[] = "powerpc"; 174176771SrajSYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, ""); 175176771Sraj 176183319Snwhitehornint cacheline_size = 32; 177183319Snwhitehorn 178176771SrajSYSCTL_INT(_machdep, CPU_CACHELINE, cacheline_size, 179183319Snwhitehorn CTLFLAG_RD, &cacheline_size, 0, ""); 180176771Sraj 181190681Snwhitehornint hw_direct_map = 0; 182190681Snwhitehorn 183176771Srajstatic void cpu_e500_startup(void *); 184177253SrwatsonSYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_e500_startup, NULL); 185176771Sraj 186176771Srajvoid print_kernel_section_addr(void); 187186228Srajvoid print_bootinfo(void); 188186228Srajvoid print_kenv(void); 189182198Sraju_int e500_init(u_int32_t, u_int32_t, void *); 190176771Sraj 191176771Srajstatic void 192176771Srajcpu_e500_startup(void *dummy) 193176771Sraj{ 194182198Sraj int indx, size; 195176771Sraj 196176771Sraj /* Initialise the decrementer-based clock. */ 197176771Sraj decr_init(); 198176771Sraj 199176771Sraj /* Good {morning,afternoon,evening,night}. */ 200176771Sraj cpu_setup(PCPU_GET(cpuid)); 201176771Sraj 202176771Sraj printf("real memory = %ld (%ld MB)\n", ptoa(physmem), 203182198Sraj ptoa(physmem) / 1048576); 204176771Sraj realmem = physmem; 205176771Sraj 206176771Sraj /* Display any holes after the first chunk of extended memory. */ 207176771Sraj if (bootverbose) { 208176771Sraj printf("Physical memory chunk(s):\n"); 209176771Sraj for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 210182198Sraj size = phys_avail[indx + 1] - phys_avail[indx]; 211186228Sraj 212176771Sraj printf("0x%08x - 0x%08x, %d bytes (%d pages)\n", 213186228Sraj phys_avail[indx], phys_avail[indx + 1] - 1, 214186228Sraj size, size / PAGE_SIZE); 215176771Sraj } 216176771Sraj } 217176771Sraj 218176771Sraj vm_ksubmap_init(&kmi); 219176771Sraj 220176771Sraj printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count), 221186228Sraj ptoa(cnt.v_free_count) / 1048576); 222176771Sraj 223176771Sraj /* Set up buffers, so they can be used to read disk labels. */ 224176771Sraj bufinit(); 225176771Sraj vm_pager_bufferinit(); 226176771Sraj} 227176771Sraj 228176771Srajstatic char * 229176771Srajkenv_next(char *cp) 230176771Sraj{ 231176771Sraj 232176771Sraj if (cp != NULL) { 233176771Sraj while (*cp != 0) 234176771Sraj cp++; 235176771Sraj cp++; 236176771Sraj if (*cp == 0) 237176771Sraj cp = NULL; 238176771Sraj } 239176771Sraj return (cp); 240176771Sraj} 241176771Sraj 242176771Srajvoid 243186228Srajprint_kenv(void) 244176771Sraj{ 245176771Sraj int len; 246176771Sraj char *cp; 247176771Sraj 248176771Sraj debugf("loader passed (static) kenv:\n"); 249176771Sraj if (kern_envp == NULL) { 250176771Sraj debugf(" no env, null ptr\n"); 251176771Sraj return; 252176771Sraj } 253176771Sraj debugf(" kern_envp = 0x%08x\n", (u_int32_t)kern_envp); 254176771Sraj 255176771Sraj len = 0; 256176771Sraj for (cp = kern_envp; cp != NULL; cp = kenv_next(cp)) 257176771Sraj debugf(" %x %s\n", (u_int32_t)cp, cp); 258176771Sraj} 259176771Sraj 260176771Srajvoid 261186228Srajprint_bootinfo(void) 262176771Sraj{ 263176771Sraj struct bi_mem_region *mr; 264176771Sraj struct bi_eth_addr *eth; 265176771Sraj int i, j; 266176771Sraj 267176771Sraj debugf("bootinfo:\n"); 268176771Sraj if (bootinfo == NULL) { 269176771Sraj debugf(" no bootinfo, null ptr\n"); 270176771Sraj return; 271176771Sraj } 272176771Sraj 273176771Sraj debugf(" version = 0x%08x\n", bootinfo->bi_version); 274176771Sraj debugf(" ccsrbar = 0x%08x\n", bootinfo->bi_bar_base); 275176771Sraj debugf(" cpu_clk = 0x%08x\n", bootinfo->bi_cpu_clk); 276176771Sraj debugf(" bus_clk = 0x%08x\n", bootinfo->bi_bus_clk); 277176771Sraj 278176771Sraj debugf(" mem regions:\n"); 279176771Sraj mr = (struct bi_mem_region *)bootinfo->bi_data; 280176771Sraj for (i = 0; i < bootinfo->bi_mem_reg_no; i++, mr++) 281176771Sraj debugf(" #%d, base = 0x%08x, size = 0x%08x\n", i, 282176771Sraj mr->mem_base, mr->mem_size); 283176771Sraj 284176771Sraj debugf(" eth addresses:\n"); 285176771Sraj eth = (struct bi_eth_addr *)mr; 286176771Sraj for (i = 0; i < bootinfo->bi_eth_addr_no; i++, eth++) { 287176771Sraj debugf(" #%d, addr = ", i); 288176771Sraj for (j = 0; j < 6; j++) 289176771Sraj debugf("%02x ", eth->mac_addr[j]); 290176771Sraj debugf("\n"); 291176771Sraj } 292176771Sraj} 293176771Sraj 294176771Srajvoid 295176771Srajprint_kernel_section_addr(void) 296176771Sraj{ 297176771Sraj 298176771Sraj debugf("kernel image addresses:\n"); 299186228Sraj debugf(" kernel_text = 0x%08x\n", (uint32_t)kernel_text); 300186228Sraj debugf(" _etext (sdata) = 0x%08x\n", (uint32_t)_etext); 301186228Sraj debugf(" _edata = 0x%08x\n", (uint32_t)_edata); 302186228Sraj debugf(" __sbss_start = 0x%08x\n", (uint32_t)__sbss_start); 303186228Sraj debugf(" __sbss_end = 0x%08x\n", (uint32_t)__sbss_end); 304186228Sraj debugf(" __sbss_start = 0x%08x\n", (uint32_t)__bss_start); 305186228Sraj debugf(" _end = 0x%08x\n", (uint32_t)_end); 306176771Sraj} 307176771Sraj 308177110Srajstruct bi_mem_region * 309177110Srajbootinfo_mr(void) 310177110Sraj{ 311177110Sraj 312186228Sraj return ((struct bi_mem_region *)bootinfo->bi_data); 313177110Sraj} 314177110Sraj 315177110Srajstruct bi_eth_addr * 316177110Srajbootinfo_eth(void) 317177110Sraj{ 318177110Sraj struct bi_mem_region *mr; 319177110Sraj struct bi_eth_addr *eth; 320177110Sraj int i; 321177110Sraj 322177110Sraj /* Advance to the eth section */ 323177110Sraj mr = bootinfo_mr(); 324177110Sraj for (i = 0; i < bootinfo->bi_mem_reg_no; i++, mr++) 325177110Sraj ; 326177110Sraj 327177110Sraj eth = (struct bi_eth_addr *)mr; 328177110Sraj return (eth); 329177110Sraj} 330177110Sraj 331182198Sraju_int 332176771Sraje500_init(u_int32_t startkernel, u_int32_t endkernel, void *mdp) 333176771Sraj{ 334176771Sraj struct pcpu *pc; 335176771Sraj void *kmdp; 336176771Sraj vm_offset_t end; 337176928Smarcel uint32_t csr; 338176771Sraj 339176771Sraj kmdp = NULL; 340176771Sraj 341176771Sraj end = endkernel; 342176771Sraj 343176771Sraj /* 344176771Sraj * Parse metadata and fetch parameters. This must be done as the first 345176771Sraj * step as we need bootinfo data to at least init the console 346176771Sraj */ 347176771Sraj if (mdp != NULL) { 348176771Sraj preload_metadata = mdp; 349176771Sraj kmdp = preload_search_by_type("elf kernel"); 350176771Sraj if (kmdp != NULL) { 351176771Sraj bootinfo = (struct bootinfo *)preload_search_info(kmdp, 352186228Sraj MODINFO_METADATA | MODINFOMD_BOOTINFO); 353176771Sraj 354176771Sraj boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 355176771Sraj kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *); 356176771Sraj end = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t); 357191362Smarcel#ifdef DDB 358191362Smarcel ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 359191362Smarcel ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 360191362Smarcel#endif 361176771Sraj } 362176771Sraj } else { 363176771Sraj /* 364176771Sraj * We should scream but how? - without CCSR bar (in bootinfo) 365176771Sraj * cannot even output anything... 366176771Sraj */ 367176771Sraj 368176771Sraj /* 369176771Sraj * FIXME add return value and handle in the locore so we can 370176771Sraj * return to the loader maybe? (this seems not very easy to 371176771Sraj * restore everything as the TLB have all been reprogrammed 372176771Sraj * in the locore etc...) 373176771Sraj */ 374176771Sraj while(1); 375176771Sraj } 376176771Sraj 377176771Sraj /* Initialize TLB1 handling */ 378176771Sraj tlb1_init(bootinfo->bi_bar_base); 379176771Sraj 380192532Sraj /* Reset Time Base */ 381192532Sraj mttb(0); 382192532Sraj 383176771Sraj /* Init params/tunables that can be overridden by the loader. */ 384176771Sraj init_param1(); 385176771Sraj 386176771Sraj /* Start initializing proc0 and thread0. */ 387203924Sraj proc_linkup0(&proc0, &thread0); 388176771Sraj thread0.td_frame = &frame0; 389176771Sraj 390176771Sraj /* Set up per-cpu data and store the pointer in SPR general 0. */ 391176771Sraj pc = &__pcpu[0]; 392176771Sraj pcpu_init(pc, 0, sizeof(struct pcpu)); 393176771Sraj pc->pc_curthread = &thread0; 394176771Sraj __asm __volatile("mtsprg 0, %0" :: "r"(pc)); 395176771Sraj 396176771Sraj /* Initialize system mutexes. */ 397176771Sraj mutex_init(); 398176771Sraj 399176771Sraj /* Initialize the console before printing anything. */ 400176771Sraj cninit(); 401176771Sraj 402176771Sraj /* Print out some debug info... */ 403176771Sraj debugf("e500_init: console initialized\n"); 404176771Sraj debugf(" arg1 startkernel = 0x%08x\n", startkernel); 405176771Sraj debugf(" arg2 endkernel = 0x%08x\n", endkernel); 406186228Sraj debugf(" arg3 mdp = 0x%08x\n", (u_int32_t)mdp); 407176771Sraj debugf(" end = 0x%08x\n", (u_int32_t)end); 408176771Sraj debugf(" boothowto = 0x%08x\n", boothowto); 409176771Sraj debugf(" kernel ccsrbar = 0x%08x\n", CCSRBAR_VA); 410176771Sraj debugf(" MSR = 0x%08x\n", mfmsr()); 411186228Sraj debugf(" HID0 = 0x%08x\n", mfspr(SPR_HID0)); 412186228Sraj debugf(" HID1 = 0x%08x\n", mfspr(SPR_HID1)); 413192532Sraj debugf(" BUCSR = 0x%08x\n", mfspr(SPR_BUCSR)); 414186228Sraj 415192532Sraj __asm __volatile("msync; isync"); 416192532Sraj csr = ccsr_read4(OCP85XX_L2CTL); 417192532Sraj debugf(" L2CTL = 0x%08x\n", csr); 418192532Sraj 419186228Sraj print_bootinfo(); 420176771Sraj print_kernel_section_addr(); 421186228Sraj print_kenv(); 422176771Sraj //tlb1_print_entries(); 423176771Sraj //tlb1_print_tlbentries(); 424176771Sraj 425176771Sraj kdb_init(); 426176771Sraj 427176771Sraj#ifdef KDB 428176771Sraj if (boothowto & RB_KDB) 429176771Sraj kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); 430176771Sraj#endif 431176771Sraj 432192067Snwhitehorn /* Initialise platform module */ 433192067Snwhitehorn platform_probe_and_attach(); 434192067Snwhitehorn 435176771Sraj /* Initialise virtual memory. */ 436176771Sraj pmap_mmu_install(MMU_TYPE_BOOKE, 0); 437176771Sraj pmap_bootstrap(startkernel, end); 438176771Sraj debugf("MSR = 0x%08x\n", mfmsr()); 439176771Sraj //tlb1_print_entries(); 440176771Sraj //tlb1_print_tlbentries(); 441176771Sraj 442176771Sraj /* Initialize params/tunables that are derived from memsize. */ 443176771Sraj init_param2(physmem); 444176771Sraj 445176771Sraj /* Finish setting up thread0. */ 446176771Sraj thread0.td_pcb = (struct pcb *) 447182198Sraj ((thread0.td_kstack + thread0.td_kstack_pages * PAGE_SIZE - 448182198Sraj sizeof(struct pcb)) & ~15); 449176771Sraj bzero((void *)thread0.td_pcb, sizeof(struct pcb)); 450176771Sraj pc->pc_curpcb = thread0.td_pcb; 451176771Sraj 452176771Sraj /* Initialise the message buffer. */ 453176771Sraj msgbufinit(msgbufp, MSGBUF_SIZE); 454176771Sraj 455176771Sraj /* Enable Machine Check interrupt. */ 456176771Sraj mtmsr(mfmsr() | PSL_ME); 457176771Sraj isync(); 458176771Sraj 459176928Smarcel /* Enable D-cache if applicable */ 460176928Smarcel csr = mfspr(SPR_L1CSR0); 461176928Smarcel if ((csr & L1CSR0_DCE) == 0) { 462176928Smarcel dcache_inval(); 463176928Smarcel dcache_enable(); 464176928Smarcel } 465186228Sraj 466176928Smarcel csr = mfspr(SPR_L1CSR0); 467176928Smarcel if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR0_DCE) == 0) 468176928Smarcel printf("L1 D-cache %sabled\n", 469176928Smarcel (csr & L1CSR0_DCE) ? "en" : "dis"); 470176928Smarcel 471176928Smarcel /* Enable L1 I-cache if applicable. */ 472176928Smarcel csr = mfspr(SPR_L1CSR1); 473176928Smarcel if ((csr & L1CSR1_ICE) == 0) { 474176928Smarcel icache_inval(); 475176928Smarcel icache_enable(); 476176928Smarcel } 477186228Sraj 478176928Smarcel csr = mfspr(SPR_L1CSR1); 479176928Smarcel if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR1_ICE) == 0) 480176928Smarcel printf("L1 I-cache %sabled\n", 481176928Smarcel (csr & L1CSR1_ICE) ? "en" : "dis"); 482176928Smarcel 483182198Sraj debugf("e500_init: SP = 0x%08x\n", ((uintptr_t)thread0.td_pcb - 16) & ~15); 484176771Sraj debugf("e500_init: e\n"); 485182198Sraj 486182198Sraj return (((uintptr_t)thread0.td_pcb - 16) & ~15); 487176771Sraj} 488176771Sraj 489192532Sraj#define RES_GRANULE 32 490192532Srajextern uint32_t tlb0_miss_locks[]; 491192532Sraj 492176771Sraj/* Initialise a struct pcpu. */ 493176771Srajvoid 494176771Srajcpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz) 495176771Sraj{ 496176771Sraj 497187149Sraj pcpu->pc_tid_next = TID_MIN; 498192532Sraj 499192532Sraj#ifdef SMP 500192532Sraj uint32_t *ptr; 501192532Sraj int words_per_gran = RES_GRANULE / sizeof(uint32_t); 502192532Sraj 503192532Sraj ptr = &tlb0_miss_locks[cpuid * words_per_gran]; 504192532Sraj pcpu->pc_booke_tlb_lock = ptr; 505192532Sraj *ptr = MTX_UNOWNED; 506192532Sraj *(ptr + 1) = 0; /* recurse counter */ 507192532Sraj#endif 508176771Sraj} 509176771Sraj 510176771Sraj/* Set set up registers on exec. */ 511176771Srajvoid 512176771Srajexec_setregs(struct thread *td, u_long entry, u_long stack, u_long ps_strings) 513176771Sraj{ 514176771Sraj struct trapframe *tf; 515176771Sraj struct ps_strings arginfo; 516176771Sraj 517176771Sraj tf = trapframe(td); 518176771Sraj bzero(tf, sizeof *tf); 519176771Sraj tf->fixreg[1] = -roundup(-stack + 8, 16); 520176771Sraj 521176771Sraj /* 522176771Sraj * XXX Machine-independent code has already copied arguments and 523176771Sraj * XXX environment to userland. Get them back here. 524176771Sraj */ 525176771Sraj (void)copyin((char *)PS_STRINGS, &arginfo, sizeof(arginfo)); 526176771Sraj 527176771Sraj /* 528176771Sraj * Set up arguments for _start(): 529176771Sraj * _start(argc, argv, envp, obj, cleanup, ps_strings); 530176771Sraj * 531176771Sraj * Notes: 532176771Sraj * - obj and cleanup are the auxilliary and termination 533176771Sraj * vectors. They are fixed up by ld.elf_so. 534176771Sraj * - ps_strings is a NetBSD extention, and will be 535176771Sraj * ignored by executables which are strictly 536176771Sraj * compliant with the SVR4 ABI. 537176771Sraj * 538176771Sraj * XXX We have to set both regs and retval here due to different 539176771Sraj * XXX calling convention in trap.c and init_main.c. 540176771Sraj */ 541176771Sraj /* 542176771Sraj * XXX PG: these get overwritten in the syscall return code. 543176771Sraj * execve() should return EJUSTRETURN, like it does on NetBSD. 544176771Sraj * Emulate by setting the syscall return value cells. The 545176771Sraj * registers still have to be set for init's fork trampoline. 546176771Sraj */ 547176771Sraj td->td_retval[0] = arginfo.ps_nargvstr; 548176771Sraj td->td_retval[1] = (register_t)arginfo.ps_argvstr; 549176771Sraj tf->fixreg[3] = arginfo.ps_nargvstr; 550176771Sraj tf->fixreg[4] = (register_t)arginfo.ps_argvstr; 551176771Sraj tf->fixreg[5] = (register_t)arginfo.ps_envstr; 552176771Sraj tf->fixreg[6] = 0; /* auxillary vector */ 553176771Sraj tf->fixreg[7] = 0; /* termination vector */ 554176771Sraj tf->fixreg[8] = (register_t)PS_STRINGS; /* NetBSD extension */ 555176771Sraj 556176771Sraj tf->srr0 = entry; 557176771Sraj tf->srr1 = PSL_USERSET; 558176771Sraj td->td_pcb->pcb_flags = 0; 559176771Sraj} 560176771Sraj 561176771Srajint 562176771Srajfill_regs(struct thread *td, struct reg *regs) 563176771Sraj{ 564176771Sraj struct trapframe *tf; 565176771Sraj 566176771Sraj tf = td->td_frame; 567176771Sraj memcpy(regs, tf, sizeof(struct reg)); 568176771Sraj 569176771Sraj return (0); 570176771Sraj} 571176771Sraj 572176771Srajint 573176771Srajfill_fpregs(struct thread *td, struct fpreg *fpregs) 574176771Sraj{ 575176771Sraj 576176771Sraj return (0); 577176771Sraj} 578176771Sraj 579192323Smarcel/* 580192323Smarcel * Flush the D-cache for non-DMA I/O so that the I-cache can 581192323Smarcel * be made coherent later. 582192323Smarcel */ 583192323Smarcelvoid 584192323Smarcelcpu_flush_dcache(void *ptr, size_t len) 585192323Smarcel{ 586192323Smarcel /* TBD */ 587192323Smarcel} 588192323Smarcel 589176771Sraj/* 590176771Sraj * Construct a PCB from a trapframe. This is called from kdb_trap() where 591176771Sraj * we want to start a backtrace from the function that caused us to enter 592176771Sraj * the debugger. We have the context in the trapframe, but base the trace 593176771Sraj * on the PCB. The PCB doesn't have to be perfect, as long as it contains 594176771Sraj * enough for a backtrace. 595176771Sraj */ 596176771Srajvoid 597176771Srajmakectx(struct trapframe *tf, struct pcb *pcb) 598176771Sraj{ 599176771Sraj 600176771Sraj pcb->pcb_lr = tf->srr0; 601176771Sraj pcb->pcb_sp = tf->fixreg[1]; 602176771Sraj} 603176771Sraj 604176771Sraj/* 605176771Sraj * get_mcontext/sendsig helper routine that doesn't touch the 606176771Sraj * proc lock. 607176771Sraj */ 608176771Srajstatic int 609176771Srajgrab_mcontext(struct thread *td, mcontext_t *mcp, int flags) 610176771Sraj{ 611176771Sraj struct pcb *pcb; 612176771Sraj 613176771Sraj pcb = td->td_pcb; 614176771Sraj memset(mcp, 0, sizeof(mcontext_t)); 615176771Sraj 616176771Sraj mcp->mc_vers = _MC_VERSION; 617176771Sraj mcp->mc_flags = 0; 618176771Sraj memcpy(&mcp->mc_frame, td->td_frame, sizeof(struct trapframe)); 619176771Sraj if (flags & GET_MC_CLEAR_RET) { 620176771Sraj mcp->mc_gpr[3] = 0; 621176771Sraj mcp->mc_gpr[4] = 0; 622176771Sraj } 623176771Sraj 624176771Sraj /* XXX Altivec context ? */ 625176771Sraj 626176771Sraj mcp->mc_len = sizeof(*mcp); 627176771Sraj return (0); 628176771Sraj} 629176771Sraj 630176771Srajint 631176771Srajget_mcontext(struct thread *td, mcontext_t *mcp, int flags) 632176771Sraj{ 633176771Sraj int error; 634176771Sraj 635176771Sraj error = grab_mcontext(td, mcp, flags); 636176771Sraj if (error == 0) { 637176771Sraj PROC_LOCK(curthread->td_proc); 638176771Sraj mcp->mc_onstack = sigonstack(td->td_frame->fixreg[1]); 639176771Sraj PROC_UNLOCK(curthread->td_proc); 640176771Sraj } 641176771Sraj 642176771Sraj return (error); 643176771Sraj} 644176771Sraj 645176771Srajint 646176771Srajset_mcontext(struct thread *td, const mcontext_t *mcp) 647176771Sraj{ 648176771Sraj struct pcb *pcb; 649176771Sraj struct trapframe *tf; 650176771Sraj 651176771Sraj pcb = td->td_pcb; 652176771Sraj tf = td->td_frame; 653176771Sraj 654176771Sraj if (mcp->mc_vers != _MC_VERSION || mcp->mc_len != sizeof(*mcp)) 655176771Sraj return (EINVAL); 656176771Sraj 657176771Sraj memcpy(tf, mcp->mc_frame, sizeof(mcp->mc_frame)); 658176771Sraj 659176771Sraj /* XXX Altivec context? */ 660176771Sraj 661176771Sraj return (0); 662176771Sraj} 663176771Sraj 664176771Srajint 665176771Srajsigreturn(struct thread *td, struct sigreturn_args *uap) 666176771Sraj{ 667176771Sraj ucontext_t uc; 668176771Sraj int error; 669176771Sraj 670176771Sraj CTR2(KTR_SIG, "sigreturn: td=%p ucp=%p", td, uap->sigcntxp); 671176771Sraj 672176771Sraj if (copyin(uap->sigcntxp, &uc, sizeof(uc)) != 0) { 673176771Sraj CTR1(KTR_SIG, "sigreturn: efault td=%p", td); 674176771Sraj return (EFAULT); 675176771Sraj } 676176771Sraj 677176771Sraj error = set_mcontext(td, &uc.uc_mcontext); 678176771Sraj if (error != 0) 679176771Sraj return (error); 680176771Sraj 681198507Skib kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 682176771Sraj 683176771Sraj CTR3(KTR_SIG, "sigreturn: return td=%p pc=%#x sp=%#x", 684176771Sraj td, uc.uc_mcontext.mc_srr0, uc.uc_mcontext.mc_gpr[1]); 685176771Sraj 686176771Sraj return (EJUSTRETURN); 687176771Sraj} 688176771Sraj 689176771Sraj#ifdef COMPAT_FREEBSD4 690176771Srajint 691176771Srajfreebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 692176771Sraj{ 693176771Sraj 694176771Sraj return sigreturn(td, (struct sigreturn_args *)uap); 695176771Sraj} 696176771Sraj#endif 697176771Sraj 698176771Sraj/* 699176771Sraj * cpu_idle 700176771Sraj * 701176771Sraj * Set Wait state enable. 702176771Sraj */ 703176771Srajvoid 704178471Sjeffcpu_idle (int busy) 705176771Sraj{ 706176771Sraj register_t msr; 707176771Sraj 708176771Sraj msr = mfmsr(); 709176771Sraj#ifdef INVARIANTS 710176771Sraj if ((msr & PSL_EE) != PSL_EE) { 711176771Sraj struct thread *td = curthread; 712176771Sraj printf("td msr %x\n", td->td_md.md_saved_msr); 713176771Sraj panic("ints disabled in idleproc!"); 714176771Sraj } 715176771Sraj#endif 716176771Sraj#if 0 717176771Sraj /* 718176771Sraj * Freescale E500 core RM section 6.4.1 719176771Sraj */ 720176771Sraj msr = msr | PSL_WE; 721176771Sraj 722176771Sraj __asm__(" msync;" 723176771Sraj " mtmsr %0;" 724176771Sraj " isync;" 725176771Sraj "loop: b loop" : 726176771Sraj /* no output */ : 727176771Sraj "r" (msr)); 728176771Sraj#endif 729176771Sraj} 730176771Sraj 731178471Sjeffint 732178471Sjeffcpu_idle_wakeup(int cpu) 733178471Sjeff{ 734178471Sjeff 735178471Sjeff return (0); 736178471Sjeff} 737178471Sjeff 738176771Srajvoid 739176771Srajspinlock_enter(void) 740176771Sraj{ 741176771Sraj struct thread *td; 742176771Sraj 743176771Sraj td = curthread; 744176771Sraj if (td->td_md.md_spinlock_count == 0) 745176771Sraj td->td_md.md_saved_msr = intr_disable(); 746176771Sraj td->td_md.md_spinlock_count++; 747176771Sraj critical_enter(); 748176771Sraj} 749176771Sraj 750176771Srajvoid 751176771Srajspinlock_exit(void) 752176771Sraj{ 753176771Sraj struct thread *td; 754176771Sraj 755176771Sraj td = curthread; 756176771Sraj critical_exit(); 757176771Sraj td->td_md.md_spinlock_count--; 758176771Sraj if (td->td_md.md_spinlock_count == 0) 759176771Sraj intr_restore(td->td_md.md_saved_msr); 760176771Sraj} 761176771Sraj 762176771Sraj/* Shutdown the CPU as much as possible. */ 763176771Srajvoid 764176771Srajcpu_halt(void) 765176771Sraj{ 766176771Sraj 767176771Sraj mtmsr(mfmsr() & ~(PSL_CE | PSL_EE | PSL_ME | PSL_DE)); 768176771Sraj while (1); 769176771Sraj} 770176771Sraj 771176771Srajint 772176771Srajset_regs(struct thread *td, struct reg *regs) 773176771Sraj{ 774176771Sraj struct trapframe *tf; 775176771Sraj 776176771Sraj tf = td->td_frame; 777176771Sraj memcpy(tf, regs, sizeof(struct reg)); 778176771Sraj return (0); 779176771Sraj} 780176771Sraj 781176771Srajint 782176771Srajfill_dbregs(struct thread *td, struct dbreg *dbregs) 783176771Sraj{ 784176771Sraj 785176771Sraj /* No debug registers on PowerPC */ 786176771Sraj return (ENOSYS); 787176771Sraj} 788176771Sraj 789176771Srajint 790176771Srajset_dbregs(struct thread *td, struct dbreg *dbregs) 791176771Sraj{ 792176771Sraj 793176771Sraj /* No debug registers on PowerPC */ 794176771Sraj return (ENOSYS); 795176771Sraj} 796176771Sraj 797176771Srajint 798176771Srajset_fpregs(struct thread *td, struct fpreg *fpregs) 799176771Sraj{ 800176771Sraj 801176771Sraj return (0); 802176771Sraj} 803176771Sraj 804176771Srajint 805176771Srajptrace_set_pc(struct thread *td, unsigned long addr) 806176771Sraj{ 807176771Sraj struct trapframe *tf; 808176771Sraj 809176771Sraj tf = td->td_frame; 810176771Sraj tf->srr0 = (register_t)addr; 811176771Sraj 812176771Sraj return (0); 813176771Sraj} 814176771Sraj 815176771Srajint 816176771Srajptrace_single_step(struct thread *td) 817176771Sraj{ 818176771Sraj struct trapframe *tf; 819176771Sraj 820176771Sraj tf = td->td_frame; 821176771Sraj tf->srr1 |= PSL_DE; 822189100Sraj tf->cpu.booke.dbcr0 |= (DBCR0_IDM | DBCR0_IC); 823176771Sraj return (0); 824176771Sraj} 825176771Sraj 826176771Srajint 827176771Srajptrace_clear_single_step(struct thread *td) 828176771Sraj{ 829176771Sraj struct trapframe *tf; 830176771Sraj 831176771Sraj tf = td->td_frame; 832176771Sraj tf->srr1 &= ~PSL_DE; 833189100Sraj tf->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC); 834176771Sraj return (0); 835176771Sraj} 836176771Sraj 837176771Srajvoid 838176771Srajkdb_cpu_clear_singlestep(void) 839176771Sraj{ 840176771Sraj register_t r; 841176771Sraj 842176771Sraj r = mfspr(SPR_DBCR0); 843176771Sraj mtspr(SPR_DBCR0, r & ~DBCR0_IC); 844176771Sraj kdb_frame->srr1 &= ~PSL_DE; 845176771Sraj} 846176771Sraj 847176771Srajvoid 848176771Srajkdb_cpu_set_singlestep(void) 849176771Sraj{ 850176771Sraj register_t r; 851176771Sraj 852176771Sraj r = mfspr(SPR_DBCR0); 853176771Sraj mtspr(SPR_DBCR0, r | DBCR0_IC | DBCR0_IDM); 854176771Sraj kdb_frame->srr1 |= PSL_DE; 855176771Sraj} 856176771Sraj 857176771Srajvoid 858176771Srajsendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 859176771Sraj{ 860176771Sraj struct trapframe *tf; 861176771Sraj struct sigframe *sfp; 862176771Sraj struct sigacts *psp; 863176771Sraj struct sigframe sf; 864176771Sraj struct thread *td; 865176771Sraj struct proc *p; 866176771Sraj int oonstack, rndfsize; 867176771Sraj int sig, code; 868176771Sraj 869176771Sraj td = curthread; 870176771Sraj p = td->td_proc; 871176771Sraj PROC_LOCK_ASSERT(p, MA_OWNED); 872176771Sraj sig = ksi->ksi_signo; 873176771Sraj code = ksi->ksi_code; 874176771Sraj psp = p->p_sigacts; 875176771Sraj mtx_assert(&psp->ps_mtx, MA_OWNED); 876176771Sraj tf = td->td_frame; 877176771Sraj oonstack = sigonstack(tf->fixreg[1]); 878176771Sraj 879176771Sraj rndfsize = ((sizeof(sf) + 15) / 16) * 16; 880176771Sraj 881176771Sraj CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 882176771Sraj catcher, sig); 883176771Sraj 884176771Sraj /* 885176771Sraj * Save user context 886176771Sraj */ 887176771Sraj memset(&sf, 0, sizeof(sf)); 888176771Sraj grab_mcontext(td, &sf.sf_uc.uc_mcontext, 0); 889176771Sraj sf.sf_uc.uc_sigmask = *mask; 890176771Sraj sf.sf_uc.uc_stack = td->td_sigstk; 891176771Sraj sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 892176771Sraj ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 893176771Sraj 894176771Sraj sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 895176771Sraj 896176771Sraj /* 897176771Sraj * Allocate and validate space for the signal handler context. 898176771Sraj */ 899176771Sraj if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 900176771Sraj SIGISMEMBER(psp->ps_sigonstack, sig)) { 901176771Sraj sfp = (struct sigframe *)((caddr_t)td->td_sigstk.ss_sp + 902176771Sraj td->td_sigstk.ss_size - rndfsize); 903176771Sraj } else { 904176771Sraj sfp = (struct sigframe *)(tf->fixreg[1] - rndfsize); 905176771Sraj } 906176771Sraj 907176771Sraj /* 908176771Sraj * Translate the signal if appropriate (Linux emu ?) 909176771Sraj */ 910176771Sraj if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 911176771Sraj sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 912176771Sraj 913176771Sraj /* 914176771Sraj * Save the floating-point state, if necessary, then copy it. 915176771Sraj */ 916176771Sraj /* XXX */ 917176771Sraj 918176771Sraj /* 919176771Sraj * Set up the registers to return to sigcode. 920176771Sraj * 921176771Sraj * r1/sp - sigframe ptr 922176771Sraj * lr - sig function, dispatched to by blrl in trampoline 923176771Sraj * r3 - sig number 924176771Sraj * r4 - SIGINFO ? &siginfo : exception code 925176771Sraj * r5 - user context 926176771Sraj * srr0 - trampoline function addr 927176771Sraj */ 928176771Sraj tf->lr = (register_t)catcher; 929176771Sraj tf->fixreg[1] = (register_t)sfp; 930176771Sraj tf->fixreg[FIRSTARG] = sig; 931176771Sraj tf->fixreg[FIRSTARG+2] = (register_t)&sfp->sf_uc; 932176771Sraj if (SIGISMEMBER(psp->ps_siginfo, sig)) { 933176771Sraj /* 934176771Sraj * Signal handler installed with SA_SIGINFO. 935176771Sraj */ 936176771Sraj tf->fixreg[FIRSTARG+1] = (register_t)&sfp->sf_si; 937176771Sraj 938176771Sraj /* 939176771Sraj * Fill siginfo structure. 940176771Sraj */ 941176771Sraj sf.sf_si = ksi->ksi_info; 942176771Sraj sf.sf_si.si_signo = sig; 943176771Sraj sf.sf_si.si_addr = (void *) ((tf->exc == EXC_DSI) ? 944176771Sraj tf->cpu.booke.dear : tf->srr0); 945176771Sraj } else { 946176771Sraj /* Old FreeBSD-style arguments. */ 947176771Sraj tf->fixreg[FIRSTARG+1] = code; 948176771Sraj tf->fixreg[FIRSTARG+3] = (tf->exc == EXC_DSI) ? 949176771Sraj tf->cpu.booke.dear : tf->srr0; 950176771Sraj } 951176771Sraj mtx_unlock(&psp->ps_mtx); 952176771Sraj PROC_UNLOCK(p); 953176771Sraj 954176771Sraj tf->srr0 = (register_t)(PS_STRINGS - *(p->p_sysent->sv_szsigcode)); 955176771Sraj 956176771Sraj /* 957176771Sraj * copy the frame out to userland. 958176771Sraj */ 959176771Sraj if (copyout((caddr_t)&sf, (caddr_t)sfp, sizeof(sf)) != 0) { 960176771Sraj /* 961176771Sraj * Process has trashed its stack. Kill it. 962176771Sraj */ 963176771Sraj CTR2(KTR_SIG, "sendsig: sigexit td=%p sfp=%p", td, sfp); 964176771Sraj PROC_LOCK(p); 965176771Sraj sigexit(td, SIGILL); 966176771Sraj } 967176771Sraj 968176771Sraj CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, 969176771Sraj tf->srr0, tf->fixreg[1]); 970176771Sraj 971176771Sraj PROC_LOCK(p); 972176771Sraj mtx_lock(&psp->ps_mtx); 973176771Sraj} 974176771Sraj 975176771Srajvoid 976176771Srajbzero(void *buf, size_t len) 977176771Sraj{ 978176771Sraj caddr_t p; 979176771Sraj 980176771Sraj p = buf; 981176771Sraj 982176771Sraj while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) { 983176771Sraj *p++ = 0; 984176771Sraj len--; 985176771Sraj } 986176771Sraj 987176771Sraj while (len >= sizeof(u_long) * 8) { 988176771Sraj *(u_long*) p = 0; 989176771Sraj *((u_long*) p + 1) = 0; 990176771Sraj *((u_long*) p + 2) = 0; 991176771Sraj *((u_long*) p + 3) = 0; 992176771Sraj len -= sizeof(u_long) * 8; 993176771Sraj *((u_long*) p + 4) = 0; 994176771Sraj *((u_long*) p + 5) = 0; 995176771Sraj *((u_long*) p + 6) = 0; 996176771Sraj *((u_long*) p + 7) = 0; 997176771Sraj p += sizeof(u_long) * 8; 998176771Sraj } 999176771Sraj 1000176771Sraj while (len >= sizeof(u_long)) { 1001176771Sraj *(u_long*) p = 0; 1002176771Sraj len -= sizeof(u_long); 1003176771Sraj p += sizeof(u_long); 1004176771Sraj } 1005176771Sraj 1006176771Sraj while (len) { 1007176771Sraj *p++ = 0; 1008176771Sraj len--; 1009176771Sraj } 1010176771Sraj} 1011176771Sraj 1012176771Sraj/* 1013176771Sraj * XXX what is the better/proper place for this routine? 1014176771Sraj */ 1015176771Srajint 1016176771Srajmem_valid(vm_offset_t addr, int len) 1017176771Sraj{ 1018176771Sraj 1019176771Sraj return (1); 1020176771Sraj} 1021