machdep.c revision 203924
1/*-
2 * Copyright (C) 2006 Semihalf, Marian Balakowicz <m8@semihalf.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
19 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
20 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
21 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
22 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
23 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25/*-
26 * Copyright (C) 2001 Benno Rice
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 * 1. Redistributions of source code must retain the above copyright
33 *    notice, this list of conditions and the following disclaimer.
34 * 2. Redistributions in binary form must reproduce the above copyright
35 *    notice, this list of conditions and the following disclaimer in the
36 *    documentation and/or other materials provided with the distribution.
37 *
38 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
39 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
40 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
41 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
43 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
44 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
45 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
46 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
47 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $
49 */
50/*-
51 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
52 * Copyright (C) 1995, 1996 TooLs GmbH.
53 * All rights reserved.
54 *
55 * Redistribution and use in source and binary forms, with or without
56 * modification, are permitted provided that the following conditions
57 * are met:
58 * 1. Redistributions of source code must retain the above copyright
59 *    notice, this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright
61 *    notice, this list of conditions and the following disclaimer in the
62 *    documentation and/or other materials provided with the distribution.
63 * 3. All advertising materials mentioning features or use of this software
64 *    must display the following acknowledgement:
65 *      This product includes software developed by TooLs GmbH.
66 * 4. The name of TooLs GmbH may not be used to endorse or promote products
67 *    derived from this software without specific prior written permission.
68 *
69 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
70 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
71 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
72 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
73 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
74 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
75 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
76 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
77 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
78 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
79 */
80
81#include <sys/cdefs.h>
82__FBSDID("$FreeBSD: head/sys/powerpc/booke/machdep.c 203924 2010-02-15 14:38:30Z raj $");
83
84#include "opt_compat.h"
85#include "opt_ddb.h"
86#include "opt_kstack_pages.h"
87#include "opt_msgbuf.h"
88
89#include <sys/cdefs.h>
90#include <sys/types.h>
91#include <sys/param.h>
92#include <sys/proc.h>
93#include <sys/systm.h>
94#include <sys/time.h>
95#include <sys/bio.h>
96#include <sys/buf.h>
97#include <sys/bus.h>
98#include <sys/cons.h>
99#include <sys/cpu.h>
100#include <sys/kdb.h>
101#include <sys/kernel.h>
102#include <sys/lock.h>
103#include <sys/mutex.h>
104#include <sys/sysctl.h>
105#include <sys/exec.h>
106#include <sys/ktr.h>
107#include <sys/sysproto.h>
108#include <sys/signalvar.h>
109#include <sys/sysent.h>
110#include <sys/imgact.h>
111#include <sys/msgbuf.h>
112#include <sys/ptrace.h>
113
114#include <vm/vm.h>
115#include <vm/pmap.h>
116#include <vm/vm_page.h>
117#include <vm/vm_object.h>
118#include <vm/vm_pager.h>
119
120#include <machine/cpu.h>
121#include <machine/kdb.h>
122#include <machine/reg.h>
123#include <machine/vmparam.h>
124#include <machine/spr.h>
125#include <machine/hid.h>
126#include <machine/psl.h>
127#include <machine/trap.h>
128#include <machine/md_var.h>
129#include <machine/mmuvar.h>
130#include <machine/sigframe.h>
131#include <machine/metadata.h>
132#include <machine/bootinfo.h>
133#include <machine/platform.h>
134
135#include <sys/linker.h>
136#include <sys/reboot.h>
137
138#include <powerpc/mpc85xx/ocpbus.h>
139#include <powerpc/mpc85xx/mpc85xx.h>
140
141#ifdef DDB
142extern vm_offset_t ksym_start, ksym_end;
143#endif
144
145#ifdef  DEBUG
146#define debugf(fmt, args...) printf(fmt, ##args)
147#else
148#define debugf(fmt, args...)
149#endif
150
151extern unsigned char kernel_text[];
152extern unsigned char _etext[];
153extern unsigned char _edata[];
154extern unsigned char __bss_start[];
155extern unsigned char __sbss_start[];
156extern unsigned char __sbss_end[];
157extern unsigned char _end[];
158
159extern void dcache_enable(void);
160extern void dcache_inval(void);
161extern void icache_enable(void);
162extern void icache_inval(void);
163
164struct kva_md_info kmi;
165struct pcpu __pcpu[MAXCPU];
166struct trapframe frame0;
167int cold = 1;
168long realmem = 0;
169long Maxmem = 0;
170
171struct bootinfo *bootinfo;
172
173char machine[] = "powerpc";
174SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "");
175
176int cacheline_size = 32;
177
178SYSCTL_INT(_machdep, CPU_CACHELINE, cacheline_size,
179	   CTLFLAG_RD, &cacheline_size, 0, "");
180
181int hw_direct_map = 0;
182
183static void cpu_e500_startup(void *);
184SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_e500_startup, NULL);
185
186void print_kernel_section_addr(void);
187void print_bootinfo(void);
188void print_kenv(void);
189u_int e500_init(u_int32_t, u_int32_t, void *);
190
191static void
192cpu_e500_startup(void *dummy)
193{
194	int indx, size;
195
196	/* Initialise the decrementer-based clock. */
197	decr_init();
198
199	/* Good {morning,afternoon,evening,night}. */
200	cpu_setup(PCPU_GET(cpuid));
201
202	printf("real memory  = %ld (%ld MB)\n", ptoa(physmem),
203	    ptoa(physmem) / 1048576);
204	realmem = physmem;
205
206	/* Display any holes after the first chunk of extended memory. */
207	if (bootverbose) {
208		printf("Physical memory chunk(s):\n");
209		for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
210			size = phys_avail[indx + 1] - phys_avail[indx];
211
212			printf("0x%08x - 0x%08x, %d bytes (%d pages)\n",
213			    phys_avail[indx], phys_avail[indx + 1] - 1,
214			    size, size / PAGE_SIZE);
215		}
216	}
217
218	vm_ksubmap_init(&kmi);
219
220	printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count),
221	    ptoa(cnt.v_free_count) / 1048576);
222
223	/* Set up buffers, so they can be used to read disk labels. */
224	bufinit();
225	vm_pager_bufferinit();
226}
227
228static char *
229kenv_next(char *cp)
230{
231
232	if (cp != NULL) {
233		while (*cp != 0)
234			cp++;
235		cp++;
236		if (*cp == 0)
237			cp = NULL;
238	}
239	return (cp);
240}
241
242void
243print_kenv(void)
244{
245	int len;
246	char *cp;
247
248	debugf("loader passed (static) kenv:\n");
249	if (kern_envp == NULL) {
250		debugf(" no env, null ptr\n");
251		return;
252	}
253	debugf(" kern_envp = 0x%08x\n", (u_int32_t)kern_envp);
254
255	len = 0;
256	for (cp = kern_envp; cp != NULL; cp = kenv_next(cp))
257		debugf(" %x %s\n", (u_int32_t)cp, cp);
258}
259
260void
261print_bootinfo(void)
262{
263	struct bi_mem_region *mr;
264	struct bi_eth_addr *eth;
265	int i, j;
266
267	debugf("bootinfo:\n");
268	if (bootinfo == NULL) {
269		debugf(" no bootinfo, null ptr\n");
270		return;
271	}
272
273	debugf(" version = 0x%08x\n", bootinfo->bi_version);
274	debugf(" ccsrbar = 0x%08x\n", bootinfo->bi_bar_base);
275	debugf(" cpu_clk = 0x%08x\n", bootinfo->bi_cpu_clk);
276	debugf(" bus_clk = 0x%08x\n", bootinfo->bi_bus_clk);
277
278	debugf(" mem regions:\n");
279	mr = (struct bi_mem_region *)bootinfo->bi_data;
280	for (i = 0; i < bootinfo->bi_mem_reg_no; i++, mr++)
281		debugf("    #%d, base = 0x%08x, size = 0x%08x\n", i,
282		    mr->mem_base, mr->mem_size);
283
284	debugf(" eth addresses:\n");
285	eth = (struct bi_eth_addr *)mr;
286	for (i = 0; i < bootinfo->bi_eth_addr_no; i++, eth++) {
287		debugf("    #%d, addr = ", i);
288		for (j = 0; j < 6; j++)
289			debugf("%02x ", eth->mac_addr[j]);
290		debugf("\n");
291	}
292}
293
294void
295print_kernel_section_addr(void)
296{
297
298	debugf("kernel image addresses:\n");
299	debugf(" kernel_text    = 0x%08x\n", (uint32_t)kernel_text);
300	debugf(" _etext (sdata) = 0x%08x\n", (uint32_t)_etext);
301	debugf(" _edata         = 0x%08x\n", (uint32_t)_edata);
302	debugf(" __sbss_start   = 0x%08x\n", (uint32_t)__sbss_start);
303	debugf(" __sbss_end     = 0x%08x\n", (uint32_t)__sbss_end);
304	debugf(" __sbss_start   = 0x%08x\n", (uint32_t)__bss_start);
305	debugf(" _end           = 0x%08x\n", (uint32_t)_end);
306}
307
308struct bi_mem_region *
309bootinfo_mr(void)
310{
311
312	return ((struct bi_mem_region *)bootinfo->bi_data);
313}
314
315struct bi_eth_addr *
316bootinfo_eth(void)
317{
318	struct bi_mem_region *mr;
319	struct bi_eth_addr *eth;
320	int i;
321
322	/* Advance to the eth section */
323	mr = bootinfo_mr();
324	for (i = 0; i < bootinfo->bi_mem_reg_no; i++, mr++)
325		;
326
327	eth = (struct bi_eth_addr *)mr;
328	return (eth);
329}
330
331u_int
332e500_init(u_int32_t startkernel, u_int32_t endkernel, void *mdp)
333{
334	struct pcpu *pc;
335	void *kmdp;
336	vm_offset_t end;
337	uint32_t csr;
338
339	kmdp = NULL;
340
341	end = endkernel;
342
343	/*
344	 * Parse metadata and fetch parameters. This must be done as the first
345	 * step as we need bootinfo data to at least init the console
346	 */
347	if (mdp != NULL) {
348		preload_metadata = mdp;
349		kmdp = preload_search_by_type("elf kernel");
350		if (kmdp != NULL) {
351			bootinfo = (struct bootinfo *)preload_search_info(kmdp,
352			    MODINFO_METADATA | MODINFOMD_BOOTINFO);
353
354			boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
355			kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
356			end = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t);
357#ifdef DDB
358			ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
359			ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
360#endif
361		}
362	} else {
363		/*
364		 * We should scream but how? - without CCSR bar (in bootinfo)
365		 * cannot even output anything...
366		 */
367
368		 /*
369		  * FIXME add return value and handle in the locore so we can
370		  * return to the loader maybe? (this seems not very easy to
371		  * restore everything as the TLB have all been reprogrammed
372		  * in the locore etc...)
373		  */
374		while(1);
375	}
376
377	/* Initialize TLB1 handling */
378	tlb1_init(bootinfo->bi_bar_base);
379
380	/* Reset Time Base */
381	mttb(0);
382
383	/* Init params/tunables that can be overridden by the loader. */
384	init_param1();
385
386	/* Start initializing proc0 and thread0. */
387	proc_linkup0(&proc0, &thread0);
388	thread0.td_frame = &frame0;
389
390	/* Set up per-cpu data and store the pointer in SPR general 0. */
391	pc = &__pcpu[0];
392	pcpu_init(pc, 0, sizeof(struct pcpu));
393	pc->pc_curthread = &thread0;
394	__asm __volatile("mtsprg 0, %0" :: "r"(pc));
395
396	/* Initialize system mutexes. */
397	mutex_init();
398
399	/* Initialize the console before printing anything. */
400	cninit();
401
402	/* Print out some debug info... */
403	debugf("e500_init: console initialized\n");
404	debugf(" arg1 startkernel = 0x%08x\n", startkernel);
405	debugf(" arg2 endkernel = 0x%08x\n", endkernel);
406	debugf(" arg3 mdp = 0x%08x\n", (u_int32_t)mdp);
407	debugf(" end = 0x%08x\n", (u_int32_t)end);
408	debugf(" boothowto = 0x%08x\n", boothowto);
409	debugf(" kernel ccsrbar = 0x%08x\n", CCSRBAR_VA);
410	debugf(" MSR = 0x%08x\n", mfmsr());
411	debugf(" HID0 = 0x%08x\n", mfspr(SPR_HID0));
412	debugf(" HID1 = 0x%08x\n", mfspr(SPR_HID1));
413	debugf(" BUCSR = 0x%08x\n", mfspr(SPR_BUCSR));
414
415	__asm __volatile("msync; isync");
416	csr = ccsr_read4(OCP85XX_L2CTL);
417	debugf(" L2CTL = 0x%08x\n", csr);
418
419	print_bootinfo();
420	print_kernel_section_addr();
421	print_kenv();
422	//tlb1_print_entries();
423	//tlb1_print_tlbentries();
424
425	kdb_init();
426
427#ifdef KDB
428	if (boothowto & RB_KDB)
429		kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
430#endif
431
432	/* Initialise platform module */
433	platform_probe_and_attach();
434
435	/* Initialise virtual memory. */
436	pmap_mmu_install(MMU_TYPE_BOOKE, 0);
437	pmap_bootstrap(startkernel, end);
438	debugf("MSR = 0x%08x\n", mfmsr());
439	//tlb1_print_entries();
440	//tlb1_print_tlbentries();
441
442	/* Initialize params/tunables that are derived from memsize. */
443	init_param2(physmem);
444
445	/* Finish setting up thread0. */
446	thread0.td_pcb = (struct pcb *)
447	    ((thread0.td_kstack + thread0.td_kstack_pages * PAGE_SIZE -
448	    sizeof(struct pcb)) & ~15);
449	bzero((void *)thread0.td_pcb, sizeof(struct pcb));
450	pc->pc_curpcb = thread0.td_pcb;
451
452	/* Initialise the message buffer. */
453	msgbufinit(msgbufp, MSGBUF_SIZE);
454
455	/* Enable Machine Check interrupt. */
456	mtmsr(mfmsr() | PSL_ME);
457	isync();
458
459	/* Enable D-cache if applicable */
460	csr = mfspr(SPR_L1CSR0);
461	if ((csr & L1CSR0_DCE) == 0) {
462		dcache_inval();
463		dcache_enable();
464	}
465
466	csr = mfspr(SPR_L1CSR0);
467	if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR0_DCE) == 0)
468		printf("L1 D-cache %sabled\n",
469		    (csr & L1CSR0_DCE) ? "en" : "dis");
470
471	/* Enable L1 I-cache if applicable. */
472	csr = mfspr(SPR_L1CSR1);
473	if ((csr & L1CSR1_ICE) == 0) {
474		icache_inval();
475		icache_enable();
476	}
477
478	csr = mfspr(SPR_L1CSR1);
479	if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR1_ICE) == 0)
480		printf("L1 I-cache %sabled\n",
481		    (csr & L1CSR1_ICE) ? "en" : "dis");
482
483	debugf("e500_init: SP = 0x%08x\n", ((uintptr_t)thread0.td_pcb - 16) & ~15);
484	debugf("e500_init: e\n");
485
486	return (((uintptr_t)thread0.td_pcb - 16) & ~15);
487}
488
489#define RES_GRANULE 32
490extern uint32_t tlb0_miss_locks[];
491
492/* Initialise a struct pcpu. */
493void
494cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz)
495{
496
497	pcpu->pc_tid_next = TID_MIN;
498
499#ifdef SMP
500	uint32_t *ptr;
501	int words_per_gran = RES_GRANULE / sizeof(uint32_t);
502
503	ptr = &tlb0_miss_locks[cpuid * words_per_gran];
504	pcpu->pc_booke_tlb_lock = ptr;
505	*ptr = MTX_UNOWNED;
506	*(ptr + 1) = 0;		/* recurse counter */
507#endif
508}
509
510/* Set set up registers on exec. */
511void
512exec_setregs(struct thread *td, u_long entry, u_long stack, u_long ps_strings)
513{
514	struct trapframe *tf;
515	struct ps_strings arginfo;
516
517	tf = trapframe(td);
518	bzero(tf, sizeof *tf);
519	tf->fixreg[1] = -roundup(-stack + 8, 16);
520
521	/*
522	 * XXX Machine-independent code has already copied arguments and
523	 * XXX environment to userland.  Get them back here.
524	 */
525	(void)copyin((char *)PS_STRINGS, &arginfo, sizeof(arginfo));
526
527	/*
528	 * Set up arguments for _start():
529	 *	_start(argc, argv, envp, obj, cleanup, ps_strings);
530	 *
531	 * Notes:
532	 *	- obj and cleanup are the auxilliary and termination
533	 *	  vectors.  They are fixed up by ld.elf_so.
534	 *	- ps_strings is a NetBSD extention, and will be
535	 * 	  ignored by executables which are strictly
536	 *	  compliant with the SVR4 ABI.
537	 *
538	 * XXX We have to set both regs and retval here due to different
539	 * XXX calling convention in trap.c and init_main.c.
540	 */
541	/*
542	 * XXX PG: these get overwritten in the syscall return code.
543	 * execve() should return EJUSTRETURN, like it does on NetBSD.
544	 * Emulate by setting the syscall return value cells. The
545	 * registers still have to be set for init's fork trampoline.
546	 */
547	td->td_retval[0] = arginfo.ps_nargvstr;
548	td->td_retval[1] = (register_t)arginfo.ps_argvstr;
549	tf->fixreg[3] = arginfo.ps_nargvstr;
550	tf->fixreg[4] = (register_t)arginfo.ps_argvstr;
551	tf->fixreg[5] = (register_t)arginfo.ps_envstr;
552	tf->fixreg[6] = 0;			/* auxillary vector */
553	tf->fixreg[7] = 0;			/* termination vector */
554	tf->fixreg[8] = (register_t)PS_STRINGS;	/* NetBSD extension */
555
556	tf->srr0 = entry;
557	tf->srr1 = PSL_USERSET;
558	td->td_pcb->pcb_flags = 0;
559}
560
561int
562fill_regs(struct thread *td, struct reg *regs)
563{
564	struct trapframe *tf;
565
566	tf = td->td_frame;
567	memcpy(regs, tf, sizeof(struct reg));
568
569	return (0);
570}
571
572int
573fill_fpregs(struct thread *td, struct fpreg *fpregs)
574{
575
576	return (0);
577}
578
579/*
580 * Flush the D-cache for non-DMA I/O so that the I-cache can
581 * be made coherent later.
582 */
583void
584cpu_flush_dcache(void *ptr, size_t len)
585{
586	/* TBD */
587}
588
589/*
590 * Construct a PCB from a trapframe. This is called from kdb_trap() where
591 * we want to start a backtrace from the function that caused us to enter
592 * the debugger. We have the context in the trapframe, but base the trace
593 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
594 * enough for a backtrace.
595 */
596void
597makectx(struct trapframe *tf, struct pcb *pcb)
598{
599
600	pcb->pcb_lr = tf->srr0;
601	pcb->pcb_sp = tf->fixreg[1];
602}
603
604/*
605 * get_mcontext/sendsig helper routine that doesn't touch the
606 * proc lock.
607 */
608static int
609grab_mcontext(struct thread *td, mcontext_t *mcp, int flags)
610{
611	struct pcb *pcb;
612
613	pcb = td->td_pcb;
614	memset(mcp, 0, sizeof(mcontext_t));
615
616	mcp->mc_vers = _MC_VERSION;
617	mcp->mc_flags = 0;
618	memcpy(&mcp->mc_frame, td->td_frame, sizeof(struct trapframe));
619	if (flags & GET_MC_CLEAR_RET) {
620		mcp->mc_gpr[3] = 0;
621		mcp->mc_gpr[4] = 0;
622	}
623
624	/* XXX Altivec context ? */
625
626	mcp->mc_len = sizeof(*mcp);
627	return (0);
628}
629
630int
631get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
632{
633	int error;
634
635	error = grab_mcontext(td, mcp, flags);
636	if (error == 0) {
637		PROC_LOCK(curthread->td_proc);
638		mcp->mc_onstack = sigonstack(td->td_frame->fixreg[1]);
639		PROC_UNLOCK(curthread->td_proc);
640	}
641
642	return (error);
643}
644
645int
646set_mcontext(struct thread *td, const mcontext_t *mcp)
647{
648	struct pcb *pcb;
649	struct trapframe *tf;
650
651	pcb = td->td_pcb;
652	tf = td->td_frame;
653
654	if (mcp->mc_vers != _MC_VERSION || mcp->mc_len != sizeof(*mcp))
655		return (EINVAL);
656
657	memcpy(tf, mcp->mc_frame, sizeof(mcp->mc_frame));
658
659	/* XXX Altivec context? */
660
661	return (0);
662}
663
664int
665sigreturn(struct thread *td, struct sigreturn_args *uap)
666{
667	ucontext_t uc;
668	int error;
669
670	CTR2(KTR_SIG, "sigreturn: td=%p ucp=%p", td, uap->sigcntxp);
671
672	if (copyin(uap->sigcntxp, &uc, sizeof(uc)) != 0) {
673		CTR1(KTR_SIG, "sigreturn: efault td=%p", td);
674		return (EFAULT);
675	}
676
677	error = set_mcontext(td, &uc.uc_mcontext);
678	if (error != 0)
679		return (error);
680
681	kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
682
683	CTR3(KTR_SIG, "sigreturn: return td=%p pc=%#x sp=%#x",
684	    td, uc.uc_mcontext.mc_srr0, uc.uc_mcontext.mc_gpr[1]);
685
686	return (EJUSTRETURN);
687}
688
689#ifdef COMPAT_FREEBSD4
690int
691freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
692{
693
694	return sigreturn(td, (struct sigreturn_args *)uap);
695}
696#endif
697
698/*
699 * cpu_idle
700 *
701 * Set Wait state enable.
702 */
703void
704cpu_idle (int busy)
705{
706	register_t msr;
707
708	msr = mfmsr();
709#ifdef INVARIANTS
710	if ((msr & PSL_EE) != PSL_EE) {
711		struct thread *td = curthread;
712		printf("td msr %x\n", td->td_md.md_saved_msr);
713		panic("ints disabled in idleproc!");
714	}
715#endif
716#if 0
717	/*
718	 * Freescale E500 core RM section 6.4.1
719	 */
720	msr = msr | PSL_WE;
721
722	__asm__("	msync;"
723		"	mtmsr	%0;"
724		"	isync;"
725		"loop:	b	loop" :
726		/* no output */	:
727		"r" (msr));
728#endif
729}
730
731int
732cpu_idle_wakeup(int cpu)
733{
734
735	return (0);
736}
737
738void
739spinlock_enter(void)
740{
741	struct thread *td;
742
743	td = curthread;
744	if (td->td_md.md_spinlock_count == 0)
745		td->td_md.md_saved_msr = intr_disable();
746	td->td_md.md_spinlock_count++;
747	critical_enter();
748}
749
750void
751spinlock_exit(void)
752{
753	struct thread *td;
754
755	td = curthread;
756	critical_exit();
757	td->td_md.md_spinlock_count--;
758	if (td->td_md.md_spinlock_count == 0)
759		intr_restore(td->td_md.md_saved_msr);
760}
761
762/* Shutdown the CPU as much as possible. */
763void
764cpu_halt(void)
765{
766
767	mtmsr(mfmsr() & ~(PSL_CE | PSL_EE | PSL_ME | PSL_DE));
768	while (1);
769}
770
771int
772set_regs(struct thread *td, struct reg *regs)
773{
774	struct trapframe *tf;
775
776	tf = td->td_frame;
777	memcpy(tf, regs, sizeof(struct reg));
778	return (0);
779}
780
781int
782fill_dbregs(struct thread *td, struct dbreg *dbregs)
783{
784
785	/* No debug registers on PowerPC */
786	return (ENOSYS);
787}
788
789int
790set_dbregs(struct thread *td, struct dbreg *dbregs)
791{
792
793	/* No debug registers on PowerPC */
794	return (ENOSYS);
795}
796
797int
798set_fpregs(struct thread *td, struct fpreg *fpregs)
799{
800
801	return (0);
802}
803
804int
805ptrace_set_pc(struct thread *td, unsigned long addr)
806{
807	struct trapframe *tf;
808
809	tf = td->td_frame;
810	tf->srr0 = (register_t)addr;
811
812	return (0);
813}
814
815int
816ptrace_single_step(struct thread *td)
817{
818	struct trapframe *tf;
819
820	tf = td->td_frame;
821	tf->srr1 |= PSL_DE;
822	tf->cpu.booke.dbcr0 |= (DBCR0_IDM | DBCR0_IC);
823	return (0);
824}
825
826int
827ptrace_clear_single_step(struct thread *td)
828{
829	struct trapframe *tf;
830
831	tf = td->td_frame;
832	tf->srr1 &= ~PSL_DE;
833	tf->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
834	return (0);
835}
836
837void
838kdb_cpu_clear_singlestep(void)
839{
840	register_t r;
841
842	r = mfspr(SPR_DBCR0);
843	mtspr(SPR_DBCR0, r & ~DBCR0_IC);
844	kdb_frame->srr1 &= ~PSL_DE;
845}
846
847void
848kdb_cpu_set_singlestep(void)
849{
850	register_t r;
851
852	r = mfspr(SPR_DBCR0);
853	mtspr(SPR_DBCR0, r | DBCR0_IC | DBCR0_IDM);
854	kdb_frame->srr1 |= PSL_DE;
855}
856
857void
858sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
859{
860	struct trapframe *tf;
861	struct sigframe *sfp;
862	struct sigacts *psp;
863	struct sigframe sf;
864	struct thread *td;
865	struct proc *p;
866	int oonstack, rndfsize;
867	int sig, code;
868
869	td = curthread;
870	p = td->td_proc;
871	PROC_LOCK_ASSERT(p, MA_OWNED);
872	sig = ksi->ksi_signo;
873	code = ksi->ksi_code;
874	psp = p->p_sigacts;
875	mtx_assert(&psp->ps_mtx, MA_OWNED);
876	tf = td->td_frame;
877	oonstack = sigonstack(tf->fixreg[1]);
878
879	rndfsize = ((sizeof(sf) + 15) / 16) * 16;
880
881	CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
882	    catcher, sig);
883
884	/*
885	 * Save user context
886	 */
887	memset(&sf, 0, sizeof(sf));
888	grab_mcontext(td, &sf.sf_uc.uc_mcontext, 0);
889	sf.sf_uc.uc_sigmask = *mask;
890	sf.sf_uc.uc_stack = td->td_sigstk;
891	sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
892		? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
893
894	sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
895
896	/*
897	 * Allocate and validate space for the signal handler context.
898	 */
899	if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
900	    SIGISMEMBER(psp->ps_sigonstack, sig)) {
901		sfp = (struct sigframe *)((caddr_t)td->td_sigstk.ss_sp +
902		    td->td_sigstk.ss_size - rndfsize);
903	} else {
904		sfp = (struct sigframe *)(tf->fixreg[1] - rndfsize);
905	}
906
907	/*
908	 * Translate the signal if appropriate (Linux emu ?)
909	 */
910	if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
911		sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
912
913	/*
914	 * Save the floating-point state, if necessary, then copy it.
915	 */
916	/* XXX */
917
918	/*
919	 * Set up the registers to return to sigcode.
920	 *
921	 *   r1/sp - sigframe ptr
922	 *   lr    - sig function, dispatched to by blrl in trampoline
923	 *   r3    - sig number
924	 *   r4    - SIGINFO ? &siginfo : exception code
925	 *   r5    - user context
926	 *   srr0  - trampoline function addr
927	 */
928	tf->lr = (register_t)catcher;
929	tf->fixreg[1] = (register_t)sfp;
930	tf->fixreg[FIRSTARG] = sig;
931	tf->fixreg[FIRSTARG+2] = (register_t)&sfp->sf_uc;
932	if (SIGISMEMBER(psp->ps_siginfo, sig)) {
933		/*
934		 * Signal handler installed with SA_SIGINFO.
935		 */
936		tf->fixreg[FIRSTARG+1] = (register_t)&sfp->sf_si;
937
938		/*
939		 * Fill siginfo structure.
940		 */
941		sf.sf_si = ksi->ksi_info;
942		sf.sf_si.si_signo = sig;
943		sf.sf_si.si_addr = (void *) ((tf->exc == EXC_DSI) ?
944		    tf->cpu.booke.dear : tf->srr0);
945	} else {
946		/* Old FreeBSD-style arguments. */
947		tf->fixreg[FIRSTARG+1] = code;
948		tf->fixreg[FIRSTARG+3] = (tf->exc == EXC_DSI) ?
949		    tf->cpu.booke.dear : tf->srr0;
950	}
951	mtx_unlock(&psp->ps_mtx);
952	PROC_UNLOCK(p);
953
954	tf->srr0 = (register_t)(PS_STRINGS - *(p->p_sysent->sv_szsigcode));
955
956	/*
957	 * copy the frame out to userland.
958	 */
959	if (copyout((caddr_t)&sf, (caddr_t)sfp, sizeof(sf)) != 0) {
960		/*
961		 * Process has trashed its stack. Kill it.
962		 */
963		CTR2(KTR_SIG, "sendsig: sigexit td=%p sfp=%p", td, sfp);
964		PROC_LOCK(p);
965		sigexit(td, SIGILL);
966	}
967
968	CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td,
969	    tf->srr0, tf->fixreg[1]);
970
971	PROC_LOCK(p);
972	mtx_lock(&psp->ps_mtx);
973}
974
975void
976bzero(void *buf, size_t len)
977{
978	caddr_t p;
979
980	p = buf;
981
982	while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) {
983		*p++ = 0;
984		len--;
985	}
986
987	while (len >= sizeof(u_long) * 8) {
988		*(u_long*) p = 0;
989		*((u_long*) p + 1) = 0;
990		*((u_long*) p + 2) = 0;
991		*((u_long*) p + 3) = 0;
992		len -= sizeof(u_long) * 8;
993		*((u_long*) p + 4) = 0;
994		*((u_long*) p + 5) = 0;
995		*((u_long*) p + 6) = 0;
996		*((u_long*) p + 7) = 0;
997		p += sizeof(u_long) * 8;
998	}
999
1000	while (len >= sizeof(u_long)) {
1001		*(u_long*) p = 0;
1002		len -= sizeof(u_long);
1003		p += sizeof(u_long);
1004	}
1005
1006	while (len) {
1007		*p++ = 0;
1008		len--;
1009	}
1010}
1011
1012/*
1013 * XXX what is the better/proper place for this routine?
1014 */
1015int
1016mem_valid(vm_offset_t addr, int len)
1017{
1018
1019	return (1);
1020}
1021