1/*- 2 * Copyright (c) 2008 Sam Leffler. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 */ 24 25/* 26 * AR71XX attachment driver for the USB Enhanced Host Controller. 27 */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: stable/10/sys/mips/atheros/ar71xx_ehci.c 308402 2016-11-07 09:19:04Z hselasky $"); 31 32#include "opt_bus.h" 33 34#include <sys/param.h> 35#include <sys/systm.h> 36#include <sys/bus.h> 37#include <sys/rman.h> 38#include <sys/condvar.h> 39#include <sys/kernel.h> 40#include <sys/module.h> 41 42#include <machine/bus.h> 43 44#include <dev/usb/usb.h> 45#include <dev/usb/usbdi.h> 46 47#include <dev/usb/usb_core.h> 48#include <dev/usb/usb_busdma.h> 49#include <dev/usb/usb_process.h> 50#include <dev/usb/usb_util.h> 51 52#include <dev/usb/usb_controller.h> 53#include <dev/usb/usb_bus.h> 54#include <dev/usb/controller/ehci.h> 55#include <dev/usb/controller/ehcireg.h> 56 57#include <mips/atheros/ar71xx_setup.h> 58#include <mips/atheros/ar71xx_bus_space_reversed.h> 59 60#define EHCI_HC_DEVSTR "AR71XX Integrated USB 2.0 controller" 61 62struct ar71xx_ehci_softc { 63 ehci_softc_t base; /* storage for EHCI code */ 64}; 65 66static device_attach_t ar71xx_ehci_attach; 67static device_detach_t ar71xx_ehci_detach; 68 69bs_r_1_proto(reversed); 70bs_w_1_proto(reversed); 71 72static int 73ar71xx_ehci_probe(device_t self) 74{ 75 76 device_set_desc(self, EHCI_HC_DEVSTR); 77 78 return (BUS_PROBE_NOWILDCARD); 79} 80 81static int 82ar71xx_ehci_attach(device_t self) 83{ 84 struct ar71xx_ehci_softc *isc = device_get_softc(self); 85 ehci_softc_t *sc = &isc->base; 86 int err; 87 int rid; 88 89 /* initialise some bus fields */ 90 sc->sc_bus.parent = self; 91 sc->sc_bus.devices = sc->sc_devices; 92 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 93 sc->sc_bus.dma_bits = 32; 94 95 /* get all DMA memory */ 96 if (usb_bus_mem_alloc_all(&sc->sc_bus, 97 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) { 98 return (ENOMEM); 99 } 100 101 sc->sc_bus.usbrev = USB_REV_2_0; 102 103 /* NB: hints fix the memory location and irq */ 104 105 rid = 0; 106 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE); 107 if (!sc->sc_io_res) { 108 device_printf(self, "Could not map memory\n"); 109 goto error; 110 } 111 112 /* 113 * Craft special resource for bus space ops that handle 114 * byte-alignment of non-word addresses. 115 */ 116 sc->sc_io_tag = ar71xx_bus_space_reversed; 117 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 118 sc->sc_io_size = rman_get_size(sc->sc_io_res); 119 120 rid = 0; 121 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 122 RF_ACTIVE); 123 if (sc->sc_irq_res == NULL) { 124 device_printf(self, "Could not allocate irq\n"); 125 goto error; 126 } 127 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 128 if (!sc->sc_bus.bdev) { 129 device_printf(self, "Could not add USB device\n"); 130 goto error; 131 } 132 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 133 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR); 134 135 sprintf(sc->sc_vendor, "Atheros"); 136 137 138 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 139 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); 140 if (err) { 141 device_printf(self, "Could not setup irq, %d\n", err); 142 sc->sc_intr_hdl = NULL; 143 goto error; 144 } 145 146 /* 147 * Arrange to force Host mode, select big-endian byte alignment, 148 * and arrange to not terminate reset operations (the adapter 149 * will ignore it if we do but might as well save a reg write). 150 * Also, the controller has an embedded Transaction Translator 151 * which means port speed must be read from the Port Status 152 * register following a port enable. 153 */ 154 sc->sc_flags = EHCI_SCFLG_SETMODE; 155 156 switch (ar71xx_soc) { 157 case AR71XX_SOC_AR7241: 158 case AR71XX_SOC_AR7242: 159 case AR71XX_SOC_AR9130: 160 case AR71XX_SOC_AR9132: 161 case AR71XX_SOC_AR9330: 162 case AR71XX_SOC_AR9331: 163 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM; 164 break; 165 default: 166 /* fallthrough */ 167 break; 168 } 169 170 /* 171 * ehci_reset() needs the correct offset to access the host controller 172 * registers. The AR724x/AR913x offsets aren't 0. 173 */ 174 sc->sc_offs = EHCI_CAPLENGTH(EREAD4(sc, EHCI_CAPLEN_HCIVERSION)); 175 176 177 (void) ehci_reset(sc); 178 179 err = ehci_init(sc); 180 if (!err) { 181 err = device_probe_and_attach(sc->sc_bus.bdev); 182 } 183 if (err) { 184 device_printf(self, "USB init failed err=%d\n", err); 185 goto error; 186 } 187 return (0); 188 189error: 190 ar71xx_ehci_detach(self); 191 return (ENXIO); 192} 193 194static int 195ar71xx_ehci_detach(device_t self) 196{ 197 struct ar71xx_ehci_softc *isc = device_get_softc(self); 198 ehci_softc_t *sc = &isc->base; 199 int err; 200 201 /* during module unload there are lots of children leftover */ 202 device_delete_children(self); 203 204 if (sc->sc_irq_res && sc->sc_intr_hdl) { 205 /* 206 * only call ehci_detach() after ehci_init() 207 */ 208 ehci_detach(sc); 209 210 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 211 212 if (err) 213 /* XXX or should we panic? */ 214 device_printf(self, "Could not tear down irq, %d\n", 215 err); 216 sc->sc_intr_hdl = NULL; 217 } 218 219 if (sc->sc_irq_res) { 220 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res); 221 sc->sc_irq_res = NULL; 222 } 223 if (sc->sc_io_res) { 224 bus_release_resource(self, SYS_RES_MEMORY, 0, 225 sc->sc_io_res); 226 sc->sc_io_res = NULL; 227 } 228 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); 229 230 return (0); 231} 232 233static device_method_t ehci_methods[] = { 234 /* Device interface */ 235 DEVMETHOD(device_probe, ar71xx_ehci_probe), 236 DEVMETHOD(device_attach, ar71xx_ehci_attach), 237 DEVMETHOD(device_detach, ar71xx_ehci_detach), 238 DEVMETHOD(device_suspend, bus_generic_suspend), 239 DEVMETHOD(device_resume, bus_generic_resume), 240 DEVMETHOD(device_shutdown, bus_generic_shutdown), 241 242 DEVMETHOD_END 243}; 244 245static driver_t ehci_driver = { 246 .name = "ehci", 247 .methods = ehci_methods, 248 .size = sizeof(struct ar71xx_ehci_softc), 249}; 250 251static devclass_t ehci_devclass; 252 253DRIVER_MODULE(ehci, nexus, ehci_driver, ehci_devclass, 0, 0); 254MODULE_DEPEND(ehci, usb, 1, 1, 1); 255