1/*- 2 * Copyright (c) 2000-2006 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29#ifndef _DISASM_H_ 30#define _DISASM_H_ 31 32#ifndef _DISASM_INT_H_ 33#define ASM_ADDITIONAL_OPCODES ASM_OP_NUMBER_OF_OPCODES 34#endif 35 36/* Application registers. */ 37#define AR_K0 0 38#define AR_K1 1 39#define AR_K2 2 40#define AR_K3 3 41#define AR_K4 4 42#define AR_K5 5 43#define AR_K6 6 44#define AR_K7 7 45#define AR_RSC 16 46#define AR_BSP 17 47#define AR_BSPSTORE 18 48#define AR_RNAT 19 49#define AR_FCR 21 50#define AR_EFLAG 24 51#define AR_CSD 25 52#define AR_SSD 26 53#define AR_CFLG 27 54#define AR_FSR 28 55#define AR_FIR 29 56#define AR_FDR 30 57#define AR_CCV 32 58#define AR_UNAT 36 59#define AR_FPSR 40 60#define AR_ITC 44 61#define AR_PFS 64 62#define AR_LC 65 63#define AR_EC 66 64 65/* Control registers. */ 66#define CR_DCR 0 67#define CR_ITM 1 68#define CR_IVA 2 69#define CR_PTA 8 70#define CR_IPSR 16 71#define CR_ISR 17 72#define CR_IIP 19 73#define CR_IFA 20 74#define CR_ITIR 21 75#define CR_IIPA 22 76#define CR_IFS 23 77#define CR_IIM 24 78#define CR_IHA 25 79#define CR_LID 64 80#define CR_IVR 65 81#define CR_TPR 66 82#define CR_EOI 67 83#define CR_IRR0 68 84#define CR_IRR1 69 85#define CR_IRR2 70 86#define CR_IRR3 71 87#define CR_ITV 72 88#define CR_PMV 73 89#define CR_CMCV 74 90#define CR_LRR0 80 91#define CR_LRR1 81 92 93enum asm_cmpltr_class { 94 ASM_CC_NONE, 95 ASM_CC_ACLR, 96 ASM_CC_BSW, ASM_CC_BTYPE, ASM_CC_BWH, 97 ASM_CC_CHK, ASM_CC_CLRRRB, ASM_CC_CREL, ASM_CC_CTYPE, 98 ASM_CC_DEP, ASM_CC_DH, 99 ASM_CC_FC, ASM_CC_FCREL, ASM_CC_FCTYPE, ASM_CC_FCVT, ASM_CC_FLDTYPE, 100 ASM_CC_FMERGE, ASM_CC_FREL, ASM_CC_FSWAP, 101 ASM_CC_GETF, 102 ASM_CC_IH, ASM_CC_INVALA, ASM_CC_IPWH, ASM_CC_ITC, ASM_CC_ITR, 103 ASM_CC_LDHINT, ASM_CC_LDTYPE, ASM_CC_LFETCH, ASM_CC_LFHINT, 104 ASM_CC_LFTYPE, ASM_CC_LR, 105 ASM_CC_MF, ASM_CC_MOV, ASM_CC_MWH, 106 ASM_CC_PAVG, ASM_CC_PC, ASM_CC_PH, ASM_CC_PREL, ASM_CC_PRTYPE, 107 ASM_CC_PTC, ASM_CC_PTR, ASM_CC_PVEC, 108 ASM_CC_SAT, ASM_CC_SEM, ASM_CC_SETF, ASM_CC_SF, ASM_CC_SRLZ, 109 ASM_CC_STHINT, ASM_CC_STTYPE, ASM_CC_SYNC, 110 ASM_CC_RW, 111 ASM_CC_TREL, ASM_CC_TRUNC, 112 ASM_CC_UNIT, ASM_CC_UNPACK, ASM_CC_UNS, 113 ASM_CC_VMSW, 114 ASM_CC_XMA 115}; 116 117enum asm_cmpltr_type { 118 ASM_CT_NONE, 119 ASM_CT_COND = ASM_CT_NONE, 120 121 ASM_CT_0, ASM_CT_1, 122 ASM_CT_A, ASM_CT_ACQ, ASM_CT_AND, 123 ASM_CT_B, ASM_CT_BIAS, 124 ASM_CT_C_CLR, ASM_CT_C_CLR_ACQ, ASM_CT_C_NC, ASM_CT_CALL, 125 ASM_CT_CEXIT, ASM_CT_CLOOP, ASM_CT_CLR, ASM_CT_CTOP, 126 ASM_CT_D, ASM_CT_DC_DC, ASM_CT_DC_NT, ASM_CT_DPNT, ASM_CT_DPTK, 127 ASM_CT_E, ASM_CT_EQ, ASM_CT_EXCL, ASM_CT_EXIT, ASM_CT_EXP, 128 ASM_CT_F, ASM_CT_FAULT, ASM_CT_FEW, ASM_CT_FILL, ASM_CT_FX, ASM_CT_FXU, 129 ASM_CT_G, ASM_CT_GA, ASM_CT_GE, ASM_CT_GT, 130 ASM_CT_H, ASM_CT_HU, 131 ASM_CT_I, ASM_CT_IA, ASM_CT_IMP, 132 ASM_CT_L, ASM_CT_LE, ASM_CT_LOOP, ASM_CT_LR, ASM_CT_LT, ASM_CT_LTU, 133 ASM_CT_M, ASM_CT_MANY, 134 ASM_CT_NC, ASM_CT_NE, ASM_CT_NEQ, ASM_CT_NL, ASM_CT_NLE, ASM_CT_NLT, 135 ASM_CT_NM, ASM_CT_NR, ASM_CT_NS, ASM_CT_NT_DC, ASM_CT_NT_NT, 136 ASM_CT_NT_TK, ASM_CT_NT1, ASM_CT_NT2, ASM_CT_NTA, ASM_CT_NZ, 137 ASM_CT_OR, ASM_CT_OR_ANDCM, ASM_CT_ORD, 138 ASM_CT_PR, 139 ASM_CT_R, ASM_CT_RAZ, ASM_CT_REL, ASM_CT_RET, ASM_CT_RW, 140 ASM_CT_S, ASM_CT_S0, ASM_CT_S1, ASM_CT_S2, ASM_CT_S3, ASM_CT_SA, 141 ASM_CT_SE, ASM_CT_SIG, ASM_CT_SPILL, ASM_CT_SPNT, ASM_CT_SPTK, 142 ASM_CT_SSS, 143 ASM_CT_TK_DC, ASM_CT_TK_NT, ASM_CT_TK_TK, ASM_CT_TRUNC, 144 ASM_CT_U, ASM_CT_UNC, ASM_CT_UNORD, ASM_CT_USS, ASM_CT_UUS, ASM_CT_UUU, 145 ASM_CT_W, ASM_CT_WEXIT, ASM_CT_WTOP, 146 ASM_CT_X, ASM_CT_XF, 147 ASM_CT_Z, 148}; 149 150/* Completer. */ 151struct asm_cmpltr { 152 enum asm_cmpltr_class c_class; 153 enum asm_cmpltr_type c_type; 154}; 155 156/* Operand types. */ 157enum asm_oper_type { 158 ASM_OPER_NONE, 159 ASM_OPER_AREG, /* = ar# */ 160 ASM_OPER_BREG, /* = b# */ 161 ASM_OPER_CPUID, /* = cpuid[r#] */ 162 ASM_OPER_CREG, /* = cr# */ 163 ASM_OPER_DBR, /* = dbr[r#] */ 164 ASM_OPER_DISP, /* IP relative displacement. */ 165 ASM_OPER_DTR, /* = dtr[r#] */ 166 ASM_OPER_FREG, /* = f# */ 167 ASM_OPER_GREG, /* = r# */ 168 ASM_OPER_IBR, /* = ibr[r#] */ 169 ASM_OPER_IMM, /* Immediate */ 170 ASM_OPER_IP, /* = ip */ 171 ASM_OPER_ITR, /* = itr[r#] */ 172 ASM_OPER_MEM, /* = [r#] */ 173 ASM_OPER_MSR, /* = msr[r#] */ 174 ASM_OPER_PKR, /* = pkr[r#] */ 175 ASM_OPER_PMC, /* = pmc[r#] */ 176 ASM_OPER_PMD, /* = pmd[r#] */ 177 ASM_OPER_PR, /* = pr */ 178 ASM_OPER_PR_ROT, /* = pr.rot */ 179 ASM_OPER_PREG, /* = p# */ 180 ASM_OPER_PSR, /* = psr */ 181 ASM_OPER_PSR_L, /* = psr.l */ 182 ASM_OPER_PSR_UM, /* = psr.um */ 183 ASM_OPER_RR /* = rr[r#] */ 184}; 185 186/* Operand */ 187struct asm_oper { 188 enum asm_oper_type o_type; 189 uint64_t o_value; 190}; 191 192/* Instruction formats. */ 193enum asm_fmt { 194 ASM_FMT_NONE, 195 ASM_FMT_A = 0x0100, 196 ASM_FMT_A1, ASM_FMT_A2, ASM_FMT_A3, ASM_FMT_A4, 197 ASM_FMT_A5, ASM_FMT_A6, ASM_FMT_A7, ASM_FMT_A8, 198 ASM_FMT_A9, ASM_FMT_A10, 199 ASM_FMT_B = 0x0200, 200 ASM_FMT_B1, ASM_FMT_B2, ASM_FMT_B3, ASM_FMT_B4, 201 ASM_FMT_B5, ASM_FMT_B6, ASM_FMT_B7, ASM_FMT_B8, 202 ASM_FMT_B9, 203 ASM_FMT_F = 0x0300, 204 ASM_FMT_F1, ASM_FMT_F2, ASM_FMT_F3, ASM_FMT_F4, 205 ASM_FMT_F5, ASM_FMT_F6, ASM_FMT_F7, ASM_FMT_F8, 206 ASM_FMT_F9, ASM_FMT_F10, ASM_FMT_F11, ASM_FMT_F12, 207 ASM_FMT_F13, ASM_FMT_F14, ASM_FMT_F15, ASM_FMT_F16, 208 ASM_FMT_I = 0x0400, 209 ASM_FMT_I1, ASM_FMT_I2, ASM_FMT_I3, ASM_FMT_I4, 210 ASM_FMT_I5, ASM_FMT_I6, ASM_FMT_I7, ASM_FMT_I8, 211 ASM_FMT_I9, ASM_FMT_I10, ASM_FMT_I11, ASM_FMT_I12, 212 ASM_FMT_I13, ASM_FMT_I14, ASM_FMT_I15, ASM_FMT_I16, 213 ASM_FMT_I17, ASM_FMT_I18, ASM_FMT_I19, ASM_FMT_I20, 214 ASM_FMT_I21, ASM_FMT_I22, ASM_FMT_I23, ASM_FMT_I24, 215 ASM_FMT_I25, ASM_FMT_I26, ASM_FMT_I27, ASM_FMT_I28, 216 ASM_FMT_I29, ASM_FMT_I30, 217 ASM_FMT_M = 0x0500, 218 ASM_FMT_M1, ASM_FMT_M2, ASM_FMT_M3, ASM_FMT_M4, 219 ASM_FMT_M5, ASM_FMT_M6, ASM_FMT_M7, ASM_FMT_M8, 220 ASM_FMT_M9, ASM_FMT_M10, ASM_FMT_M11, ASM_FMT_M12, 221 ASM_FMT_M13, ASM_FMT_M14, ASM_FMT_M15, ASM_FMT_M16, 222 ASM_FMT_M17, ASM_FMT_M18, ASM_FMT_M19, ASM_FMT_M20, 223 ASM_FMT_M21, ASM_FMT_M22, ASM_FMT_M23, ASM_FMT_M24, 224 ASM_FMT_M25, ASM_FMT_M26, ASM_FMT_M27, ASM_FMT_M28, 225 ASM_FMT_M29, ASM_FMT_M30, ASM_FMT_M31, ASM_FMT_M32, 226 ASM_FMT_M33, ASM_FMT_M34, ASM_FMT_M35, ASM_FMT_M36, 227 ASM_FMT_M37, ASM_FMT_M38, ASM_FMT_M39, ASM_FMT_M40, 228 ASM_FMT_M41, ASM_FMT_M42, ASM_FMT_M43, ASM_FMT_M44, 229 ASM_FMT_M45, ASM_FMT_M46, ASM_FMT_M47, ASM_FMT_M48, 230 ASM_FMT_X = 0x0600, 231 ASM_FMT_X1, ASM_FMT_X2, ASM_FMT_X3, ASM_FMT_X4, 232 ASM_FMT_X5 233}; 234 235/* Instruction opcodes. */ 236enum asm_op { 237 ASM_OP_NONE, 238 ASM_OP_ADD, ASM_OP_ADDL, ASM_OP_ADDP4, ASM_OP_ADDS, ASM_OP_ALLOC, 239 ASM_OP_AND, ASM_OP_ANDCM, 240 ASM_OP_BR, ASM_OP_BREAK, ASM_OP_BRL, ASM_OP_BRP, ASM_OP_BSW, 241 ASM_OP_CHK, ASM_OP_CLRRRB, ASM_OP_CMP, ASM_OP_CMP4, ASM_OP_CMP8XCHG16, 242 ASM_OP_CMPXCHG1, ASM_OP_CMPXCHG2, ASM_OP_CMPXCHG4, ASM_OP_CMPXCHG8, 243 ASM_OP_COVER, ASM_OP_CZX1, ASM_OP_CZX2, 244 ASM_OP_DEP, 245 ASM_OP_EPC, ASM_OP_EXTR, 246 ASM_OP_FAMAX, ASM_OP_FAMIN, ASM_OP_FAND, ASM_OP_FANDCM, ASM_OP_FC, 247 ASM_OP_FCHKF, ASM_OP_FCLASS, ASM_OP_FCLRF, ASM_OP_FCMP, ASM_OP_FCVT, 248 ASM_OP_FETCHADD4, ASM_OP_FETCHADD8, ASM_OP_FLUSHRS, ASM_OP_FMA, 249 ASM_OP_FMAX, ASM_OP_FMERGE, ASM_OP_FMIN, ASM_OP_FMIX, ASM_OP_FMS, 250 ASM_OP_FNMA, ASM_OP_FOR, ASM_OP_FPACK, ASM_OP_FPAMAX, ASM_OP_FPAMIN, 251 ASM_OP_FPCMP, ASM_OP_FPCVT, ASM_OP_FPMA, ASM_OP_FPMAX, ASM_OP_FPMERGE, 252 ASM_OP_FPMIN, ASM_OP_FPMS, ASM_OP_FPNMA, ASM_OP_FPRCPA, 253 ASM_OP_FPRSQRTA, ASM_OP_FRCPA, ASM_OP_FRSQRTA, ASM_OP_FSELECT, 254 ASM_OP_FSETC, ASM_OP_FSWAP, ASM_OP_FSXT, ASM_OP_FWB, ASM_OP_FXOR, 255 ASM_OP_GETF, 256 ASM_OP_HINT, 257 ASM_OP_INVALA, ASM_OP_ITC, ASM_OP_ITR, 258 ASM_OP_LD1, ASM_OP_LD16, ASM_OP_LD2, ASM_OP_LD4, ASM_OP_LD8, 259 ASM_OP_LDF, ASM_OP_LDF8, ASM_OP_LDFD, ASM_OP_LDFE, ASM_OP_LDFP8, 260 ASM_OP_LDFPD, ASM_OP_LDFPS, ASM_OP_LDFS, ASM_OP_LFETCH, ASM_OP_LOADRS, 261 ASM_OP_MF, ASM_OP_MIX1, ASM_OP_MIX2, ASM_OP_MIX4, ASM_OP_MOV, 262 ASM_OP_MOVL, ASM_OP_MUX1, ASM_OP_MUX2, 263 ASM_OP_NOP, 264 ASM_OP_OR, 265 ASM_OP_PACK2, ASM_OP_PACK4, ASM_OP_PADD1, ASM_OP_PADD2, ASM_OP_PADD4, 266 ASM_OP_PAVG1, ASM_OP_PAVG2, ASM_OP_PAVGSUB1, ASM_OP_PAVGSUB2, 267 ASM_OP_PCMP1, ASM_OP_PCMP2, ASM_OP_PCMP4, ASM_OP_PMAX1, ASM_OP_PMAX2, 268 ASM_OP_PMIN1, ASM_OP_PMIN2, ASM_OP_PMPY2, ASM_OP_PMPYSHR2, 269 ASM_OP_POPCNT, ASM_OP_PROBE, ASM_OP_PSAD1, ASM_OP_PSHL2, ASM_OP_PSHL4, 270 ASM_OP_PSHLADD2, ASM_OP_PSHR2, ASM_OP_PSHR4, ASM_OP_PSHRADD2, 271 ASM_OP_PSUB1, ASM_OP_PSUB2, ASM_OP_PSUB4, ASM_OP_PTC, ASM_OP_PTR, 272 ASM_OP_RFI, ASM_OP_RSM, ASM_OP_RUM, 273 ASM_OP_SETF, ASM_OP_SHL, ASM_OP_SHLADD, ASM_OP_SHLADDP4, ASM_OP_SHR, 274 ASM_OP_SHRP, ASM_OP_SRLZ, ASM_OP_SSM, ASM_OP_ST1, ASM_OP_ST16, 275 ASM_OP_ST2, ASM_OP_ST4, ASM_OP_ST8, ASM_OP_STF, ASM_OP_STF8, 276 ASM_OP_STFD, ASM_OP_STFE, ASM_OP_STFS, ASM_OP_SUB, ASM_OP_SUM, 277 ASM_OP_SXT1, ASM_OP_SXT2, ASM_OP_SXT4, ASM_OP_SYNC, 278 ASM_OP_TAK, ASM_OP_TBIT, ASM_OP_TF, ASM_OP_THASH, ASM_OP_TNAT, 279 ASM_OP_TPA, ASM_OP_TTAG, 280 ASM_OP_UNPACK1, ASM_OP_UNPACK2, ASM_OP_UNPACK4, 281 ASM_OP_VMSW, 282 ASM_OP_XCHG1, ASM_OP_XCHG2, ASM_OP_XCHG4, ASM_OP_XCHG8, ASM_OP_XMA, 283 ASM_OP_XOR, 284 ASM_OP_ZXT1, ASM_OP_ZXT2, ASM_OP_ZXT4, 285 /* Additional opcodes used only internally. */ 286 ASM_ADDITIONAL_OPCODES 287}; 288 289/* Instruction. */ 290struct asm_inst { 291 uint64_t i_bits; 292 struct asm_oper i_oper[7]; 293 struct asm_cmpltr i_cmpltr[5]; 294 enum asm_fmt i_format; 295 enum asm_op i_op; 296 int i_ncmpltrs; 297 int i_srcidx; 298}; 299 300struct asm_bundle { 301 const char *b_templ; 302 struct asm_inst b_inst[3]; 303}; 304 305/* Functional units. */ 306enum asm_unit { 307 ASM_UNIT_NONE, 308 ASM_UNIT_A = 0x0100, /* A unit. */ 309 ASM_UNIT_B = 0x0200, /* B unit. */ 310 ASM_UNIT_F = 0x0300, /* F unit. */ 311 ASM_UNIT_I = 0x0400, /* I unit. */ 312 ASM_UNIT_M = 0x0500, /* M unit. */ 313 ASM_UNIT_X = 0x0600 /* X unit. */ 314}; 315 316#ifdef _DISASM_INT_H_ 317int asm_extract(enum asm_op, enum asm_fmt, uint64_t, struct asm_bundle *, int); 318#endif 319 320int asm_decode(uint64_t, struct asm_bundle *); 321 322void asm_completer(const struct asm_cmpltr *, char *); 323void asm_mnemonic(const enum asm_op, char *); 324void asm_operand(const struct asm_oper *, char *, uint64_t); 325void asm_print_bundle(const struct asm_bundle *, uint64_t); 326void asm_print_inst(const struct asm_bundle *, int, uint64_t); 327 328#endif /* _DISASM_H_ */ 329