1/*- 2 * Copyright (c) 1982, 1986 The Regents of the University of California. 3 * Copyright (c) 1989, 1990 William Jolitz 4 * Copyright (c) 1994 John Dyson 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department, and William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91 40 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$ 41 */ 42 43#include <sys/cdefs.h> 44__FBSDID("$FreeBSD: stable/10/sys/i386/i386/vm_machdep.c 332759 2018-04-19 06:20:53Z avg $"); 45 46#include "opt_isa.h" 47#include "opt_npx.h" 48#include "opt_reset.h" 49#include "opt_cpu.h" 50#include "opt_xbox.h" 51 52#include <sys/param.h> 53#include <sys/systm.h> 54#include <sys/bio.h> 55#include <sys/buf.h> 56#include <sys/kernel.h> 57#include <sys/ktr.h> 58#include <sys/lock.h> 59#include <sys/malloc.h> 60#include <sys/mbuf.h> 61#include <sys/mutex.h> 62#include <sys/pioctl.h> 63#include <sys/proc.h> 64#include <sys/sysent.h> 65#include <sys/sf_buf.h> 66#include <sys/smp.h> 67#include <sys/sched.h> 68#include <sys/sysctl.h> 69#include <sys/unistd.h> 70#include <sys/vnode.h> 71#include <sys/vmmeter.h> 72 73#include <machine/cpu.h> 74#include <machine/cputypes.h> 75#include <machine/md_var.h> 76#include <machine/pcb.h> 77#include <machine/pcb_ext.h> 78#include <machine/smp.h> 79#include <machine/vm86.h> 80 81#ifdef CPU_ELAN 82#include <machine/elan_mmcr.h> 83#endif 84 85#include <vm/vm.h> 86#include <vm/vm_extern.h> 87#include <vm/vm_kern.h> 88#include <vm/vm_page.h> 89#include <vm/vm_map.h> 90#include <vm/vm_param.h> 91 92#ifdef XEN 93#include <xen/hypervisor.h> 94#endif 95#ifdef PC98 96#include <pc98/cbus/cbus.h> 97#else 98#include <x86/isa/isa.h> 99#endif 100 101#ifdef XBOX 102#include <machine/xbox.h> 103#endif 104 105#ifndef NSFBUFS 106#define NSFBUFS (512 + maxusers * 16) 107#endif 108 109#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 110#define CPU_ENABLE_SSE 111#endif 112 113_Static_assert(OFFSETOF_CURTHREAD == offsetof(struct pcpu, pc_curthread), 114 "OFFSETOF_CURTHREAD does not correspond with offset of pc_curthread."); 115_Static_assert(OFFSETOF_CURPCB == offsetof(struct pcpu, pc_curpcb), 116 "OFFSETOF_CURPCB does not correspond with offset of pc_curpcb."); 117 118static void cpu_reset_real(void); 119#ifdef SMP 120static void cpu_reset_proxy(void); 121static u_int cpu_reset_proxyid; 122static volatile u_int cpu_reset_proxy_active; 123#endif 124 125static int nsfbufs; 126static int nsfbufspeak; 127static int nsfbufsused; 128 129SYSCTL_INT(_kern_ipc, OID_AUTO, nsfbufs, CTLFLAG_RDTUN, &nsfbufs, 0, 130 "Maximum number of sendfile(2) sf_bufs available"); 131SYSCTL_INT(_kern_ipc, OID_AUTO, nsfbufspeak, CTLFLAG_RD, &nsfbufspeak, 0, 132 "Number of sendfile(2) sf_bufs at peak usage"); 133SYSCTL_INT(_kern_ipc, OID_AUTO, nsfbufsused, CTLFLAG_RD, &nsfbufsused, 0, 134 "Number of sendfile(2) sf_bufs in use"); 135 136static void sf_buf_init(void *arg); 137SYSINIT(sock_sf, SI_SUB_MBUF, SI_ORDER_ANY, sf_buf_init, NULL); 138 139LIST_HEAD(sf_head, sf_buf); 140 141/* 142 * A hash table of active sendfile(2) buffers 143 */ 144static struct sf_head *sf_buf_active; 145static u_long sf_buf_hashmask; 146 147#define SF_BUF_HASH(m) (((m) - vm_page_array) & sf_buf_hashmask) 148 149static TAILQ_HEAD(, sf_buf) sf_buf_freelist; 150static u_int sf_buf_alloc_want; 151 152/* 153 * A lock used to synchronize access to the hash table and free list 154 */ 155static struct mtx sf_buf_lock; 156 157union savefpu * 158get_pcb_user_save_td(struct thread *td) 159{ 160 vm_offset_t p; 161 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE - 162 roundup2(cpu_max_ext_state_size, XSAVE_AREA_ALIGN); 163 KASSERT((p % XSAVE_AREA_ALIGN) == 0, ("Unaligned pcb_user_save area")); 164 return ((union savefpu *)p); 165} 166 167union savefpu * 168get_pcb_user_save_pcb(struct pcb *pcb) 169{ 170 vm_offset_t p; 171 172 p = (vm_offset_t)(pcb + 1); 173 return ((union savefpu *)p); 174} 175 176struct pcb * 177get_pcb_td(struct thread *td) 178{ 179 vm_offset_t p; 180 181 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE - 182 roundup2(cpu_max_ext_state_size, XSAVE_AREA_ALIGN) - 183 sizeof(struct pcb); 184 return ((struct pcb *)p); 185} 186 187void * 188alloc_fpusave(int flags) 189{ 190 void *res; 191#ifdef CPU_ENABLE_SSE 192 struct savefpu_ymm *sf; 193#endif 194 195 res = malloc(cpu_max_ext_state_size, M_DEVBUF, flags); 196#ifdef CPU_ENABLE_SSE 197 if (use_xsave) { 198 sf = (struct savefpu_ymm *)res; 199 bzero(&sf->sv_xstate.sx_hd, sizeof(sf->sv_xstate.sx_hd)); 200 sf->sv_xstate.sx_hd.xstate_bv = xsave_mask; 201 } 202#endif 203 return (res); 204} 205 206/* 207 * Finish a fork operation, with process p2 nearly set up. 208 * Copy and update the pcb, set up the stack so that the child 209 * ready to run and return to user mode. 210 */ 211void 212cpu_fork(struct thread *td1, struct proc *p2, struct thread *td2, int flags) 213{ 214 register struct proc *p1; 215 struct pcb *pcb2; 216 struct mdproc *mdp2; 217 218 p1 = td1->td_proc; 219 if ((flags & RFPROC) == 0) { 220 if ((flags & RFMEM) == 0) { 221 /* unshare user LDT */ 222 struct mdproc *mdp1 = &p1->p_md; 223 struct proc_ldt *pldt, *pldt1; 224 225 mtx_lock_spin(&dt_lock); 226 if ((pldt1 = mdp1->md_ldt) != NULL && 227 pldt1->ldt_refcnt > 1) { 228 pldt = user_ldt_alloc(mdp1, pldt1->ldt_len); 229 if (pldt == NULL) 230 panic("could not copy LDT"); 231 mdp1->md_ldt = pldt; 232 set_user_ldt(mdp1); 233 user_ldt_deref(pldt1); 234 } else 235 mtx_unlock_spin(&dt_lock); 236 } 237 return; 238 } 239 240 /* Ensure that td1's pcb is up to date. */ 241 if (td1 == curthread) 242 td1->td_pcb->pcb_gs = rgs(); 243#ifdef DEV_NPX 244 critical_enter(); 245 if (PCPU_GET(fpcurthread) == td1) 246 npxsave(td1->td_pcb->pcb_save); 247 critical_exit(); 248#endif 249 250 /* Point the pcb to the top of the stack */ 251 pcb2 = get_pcb_td(td2); 252 td2->td_pcb = pcb2; 253 254 /* Copy td1's pcb */ 255 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2)); 256 257 /* Properly initialize pcb_save */ 258 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2); 259 bcopy(get_pcb_user_save_td(td1), get_pcb_user_save_pcb(pcb2), 260 cpu_max_ext_state_size); 261 262 /* Point mdproc and then copy over td1's contents */ 263 mdp2 = &p2->p_md; 264 bcopy(&p1->p_md, mdp2, sizeof(*mdp2)); 265 266 /* 267 * Create a new fresh stack for the new process. 268 * Copy the trap frame for the return to user mode as if from a 269 * syscall. This copies most of the user mode register values. 270 * The -16 is so we can expand the trapframe if we go to vm86. 271 */ 272 td2->td_frame = (struct trapframe *)((caddr_t)td2->td_pcb - 16) - 1; 273 bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe)); 274 275 td2->td_frame->tf_eax = 0; /* Child returns zero */ 276 td2->td_frame->tf_eflags &= ~PSL_C; /* success */ 277 td2->td_frame->tf_edx = 1; 278 279 /* 280 * If the parent process has the trap bit set (i.e. a debugger had 281 * single stepped the process to the system call), we need to clear 282 * the trap flag from the new frame unless the debugger had set PF_FORK 283 * on the parent. Otherwise, the child will receive a (likely 284 * unexpected) SIGTRAP when it executes the first instruction after 285 * returning to userland. 286 */ 287 if ((p1->p_pfsflags & PF_FORK) == 0) 288 td2->td_frame->tf_eflags &= ~PSL_T; 289 290 /* 291 * Set registers for trampoline to user mode. Leave space for the 292 * return address on stack. These are the kernel mode register values. 293 */ 294#if defined(PAE) || defined(PAE_TABLES) 295 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdpt); 296#else 297 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdir); 298#endif 299 pcb2->pcb_edi = 0; 300 pcb2->pcb_esi = (int)fork_return; /* fork_trampoline argument */ 301 pcb2->pcb_ebp = 0; 302 pcb2->pcb_esp = (int)td2->td_frame - sizeof(void *); 303 pcb2->pcb_ebx = (int)td2; /* fork_trampoline argument */ 304 pcb2->pcb_eip = (int)fork_trampoline; 305 pcb2->pcb_psl = PSL_KERNEL; /* ints disabled */ 306 /*- 307 * pcb2->pcb_dr*: cloned above. 308 * pcb2->pcb_savefpu: cloned above. 309 * pcb2->pcb_flags: cloned above. 310 * pcb2->pcb_onfault: cloned above (always NULL here?). 311 * pcb2->pcb_gs: cloned above. 312 * pcb2->pcb_ext: cleared below. 313 */ 314 315 /* 316 * XXX don't copy the i/o pages. this should probably be fixed. 317 */ 318 pcb2->pcb_ext = 0; 319 320 /* Copy the LDT, if necessary. */ 321 mtx_lock_spin(&dt_lock); 322 if (mdp2->md_ldt != NULL) { 323 if (flags & RFMEM) { 324 mdp2->md_ldt->ldt_refcnt++; 325 } else { 326 mdp2->md_ldt = user_ldt_alloc(mdp2, 327 mdp2->md_ldt->ldt_len); 328 if (mdp2->md_ldt == NULL) 329 panic("could not copy LDT"); 330 } 331 } 332 mtx_unlock_spin(&dt_lock); 333 334 /* Setup to release spin count in fork_exit(). */ 335 td2->td_md.md_spinlock_count = 1; 336 /* 337 * XXX XEN need to check on PSL_USER is handled 338 */ 339 td2->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 340 /* 341 * Now, cpu_switch() can schedule the new process. 342 * pcb_esp is loaded pointing to the cpu_switch() stack frame 343 * containing the return address when exiting cpu_switch. 344 * This will normally be to fork_trampoline(), which will have 345 * %ebx loaded with the new proc's pointer. fork_trampoline() 346 * will set up a stack to call fork_return(p, frame); to complete 347 * the return to user-mode. 348 */ 349} 350 351/* 352 * Intercept the return address from a freshly forked process that has NOT 353 * been scheduled yet. 354 * 355 * This is needed to make kernel threads stay in kernel mode. 356 */ 357void 358cpu_set_fork_handler(td, func, arg) 359 struct thread *td; 360 void (*func)(void *); 361 void *arg; 362{ 363 /* 364 * Note that the trap frame follows the args, so the function 365 * is really called like this: func(arg, frame); 366 */ 367 td->td_pcb->pcb_esi = (int) func; /* function */ 368 td->td_pcb->pcb_ebx = (int) arg; /* first arg */ 369} 370 371void 372cpu_exit(struct thread *td) 373{ 374 375 /* 376 * If this process has a custom LDT, release it. Reset pc->pcb_gs 377 * and %gs before we free it in case they refer to an LDT entry. 378 */ 379 mtx_lock_spin(&dt_lock); 380 if (td->td_proc->p_md.md_ldt) { 381 td->td_pcb->pcb_gs = _udatasel; 382 load_gs(_udatasel); 383 user_ldt_free(td); 384 } else 385 mtx_unlock_spin(&dt_lock); 386} 387 388void 389cpu_thread_exit(struct thread *td) 390{ 391 392#ifdef DEV_NPX 393 critical_enter(); 394 if (td == PCPU_GET(fpcurthread)) 395 npxdrop(); 396 critical_exit(); 397#endif 398 399 /* Disable any hardware breakpoints. */ 400 if (td->td_pcb->pcb_flags & PCB_DBREGS) { 401 reset_dbregs(); 402 td->td_pcb->pcb_flags &= ~PCB_DBREGS; 403 } 404} 405 406void 407cpu_thread_clean(struct thread *td) 408{ 409 struct pcb *pcb; 410 411 pcb = td->td_pcb; 412 if (pcb->pcb_ext != NULL) { 413 /* if (pcb->pcb_ext->ext_refcount-- == 1) ?? */ 414 /* 415 * XXX do we need to move the TSS off the allocated pages 416 * before freeing them? (not done here) 417 */ 418 kmem_free(kernel_arena, (vm_offset_t)pcb->pcb_ext, 419 ctob(IOPAGES + 1)); 420 pcb->pcb_ext = NULL; 421 } 422} 423 424void 425cpu_thread_swapin(struct thread *td) 426{ 427} 428 429void 430cpu_thread_swapout(struct thread *td) 431{ 432} 433 434void 435cpu_thread_alloc(struct thread *td) 436{ 437 struct pcb *pcb; 438#ifdef CPU_ENABLE_SSE 439 struct xstate_hdr *xhdr; 440#endif 441 442 td->td_pcb = pcb = get_pcb_td(td); 443 td->td_frame = (struct trapframe *)((caddr_t)pcb - 16) - 1; 444 pcb->pcb_ext = NULL; 445 pcb->pcb_save = get_pcb_user_save_pcb(pcb); 446#ifdef CPU_ENABLE_SSE 447 if (use_xsave) { 448 xhdr = (struct xstate_hdr *)(pcb->pcb_save + 1); 449 bzero(xhdr, sizeof(*xhdr)); 450 xhdr->xstate_bv = xsave_mask; 451 } 452#endif 453} 454 455void 456cpu_thread_free(struct thread *td) 457{ 458 459 cpu_thread_clean(td); 460} 461 462void 463cpu_set_syscall_retval(struct thread *td, int error) 464{ 465 466 switch (error) { 467 case 0: 468 td->td_frame->tf_eax = td->td_retval[0]; 469 td->td_frame->tf_edx = td->td_retval[1]; 470 td->td_frame->tf_eflags &= ~PSL_C; 471 break; 472 473 case ERESTART: 474 /* 475 * Reconstruct pc, assuming lcall $X,y is 7 bytes, int 476 * 0x80 is 2 bytes. We saved this in tf_err. 477 */ 478 td->td_frame->tf_eip -= td->td_frame->tf_err; 479 break; 480 481 case EJUSTRETURN: 482 break; 483 484 default: 485 td->td_frame->tf_eax = SV_ABI_ERRNO(td->td_proc, error); 486 td->td_frame->tf_eflags |= PSL_C; 487 break; 488 } 489} 490 491/* 492 * Initialize machine state (pcb and trap frame) for a new thread about to 493 * upcall. Put enough state in the new thread's PCB to get it to go back 494 * userret(), where we can intercept it again to set the return (upcall) 495 * Address and stack, along with those from upcals that are from other sources 496 * such as those generated in thread_userret() itself. 497 */ 498void 499cpu_set_upcall(struct thread *td, struct thread *td0) 500{ 501 struct pcb *pcb2; 502 503 /* Point the pcb to the top of the stack. */ 504 pcb2 = td->td_pcb; 505 506 /* 507 * Copy the upcall pcb. This loads kernel regs. 508 * Those not loaded individually below get their default 509 * values here. 510 */ 511 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2)); 512 pcb2->pcb_flags &= ~(PCB_NPXINITDONE | PCB_NPXUSERINITDONE | 513 PCB_KERNNPX); 514 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2); 515 bcopy(get_pcb_user_save_td(td0), pcb2->pcb_save, 516 cpu_max_ext_state_size); 517 518 /* 519 * Create a new fresh stack for the new thread. 520 */ 521 bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe)); 522 523 /* If the current thread has the trap bit set (i.e. a debugger had 524 * single stepped the process to the system call), we need to clear 525 * the trap flag from the new frame. Otherwise, the new thread will 526 * receive a (likely unexpected) SIGTRAP when it executes the first 527 * instruction after returning to userland. 528 */ 529 td->td_frame->tf_eflags &= ~PSL_T; 530 531 /* 532 * Set registers for trampoline to user mode. Leave space for the 533 * return address on stack. These are the kernel mode register values. 534 */ 535 pcb2->pcb_edi = 0; 536 pcb2->pcb_esi = (int)fork_return; /* trampoline arg */ 537 pcb2->pcb_ebp = 0; 538 pcb2->pcb_esp = (int)td->td_frame - sizeof(void *); /* trampoline arg */ 539 pcb2->pcb_ebx = (int)td; /* trampoline arg */ 540 pcb2->pcb_eip = (int)fork_trampoline; 541 pcb2->pcb_psl &= ~(PSL_I); /* interrupts must be disabled */ 542 pcb2->pcb_gs = rgs(); 543 /* 544 * If we didn't copy the pcb, we'd need to do the following registers: 545 * pcb2->pcb_cr3: cloned above. 546 * pcb2->pcb_dr*: cloned above. 547 * pcb2->pcb_savefpu: cloned above. 548 * pcb2->pcb_flags: cloned above. 549 * pcb2->pcb_onfault: cloned above (always NULL here?). 550 * pcb2->pcb_gs: cloned above. 551 * pcb2->pcb_ext: cleared below. 552 */ 553 pcb2->pcb_ext = NULL; 554 555 /* Setup to release spin count in fork_exit(). */ 556 td->td_md.md_spinlock_count = 1; 557 td->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 558} 559 560/* 561 * Set that machine state for performing an upcall that has to 562 * be done in thread_userret() so that those upcalls generated 563 * in thread_userret() itself can be done as well. 564 */ 565void 566cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg, 567 stack_t *stack) 568{ 569 570 /* 571 * Do any extra cleaning that needs to be done. 572 * The thread may have optional components 573 * that are not present in a fresh thread. 574 * This may be a recycled thread so make it look 575 * as though it's newly allocated. 576 */ 577 cpu_thread_clean(td); 578 579 /* 580 * Set the trap frame to point at the beginning of the uts 581 * function. 582 */ 583 td->td_frame->tf_ebp = 0; 584 td->td_frame->tf_esp = 585 (((int)stack->ss_sp + stack->ss_size - 4) & ~0x0f) - 4; 586 td->td_frame->tf_eip = (int)entry; 587 588 /* 589 * Pass the address of the mailbox for this kse to the uts 590 * function as a parameter on the stack. 591 */ 592 suword((void *)(td->td_frame->tf_esp + sizeof(void *)), 593 (int)arg); 594} 595 596int 597cpu_set_user_tls(struct thread *td, void *tls_base) 598{ 599 struct segment_descriptor sd; 600 uint32_t base; 601 602 /* 603 * Construct a descriptor and store it in the pcb for 604 * the next context switch. Also store it in the gdt 605 * so that the load of tf_fs into %fs will activate it 606 * at return to userland. 607 */ 608 base = (uint32_t)tls_base; 609 sd.sd_lobase = base & 0xffffff; 610 sd.sd_hibase = (base >> 24) & 0xff; 611 sd.sd_lolimit = 0xffff; /* 4GB limit, wraps around */ 612 sd.sd_hilimit = 0xf; 613 sd.sd_type = SDT_MEMRWA; 614 sd.sd_dpl = SEL_UPL; 615 sd.sd_p = 1; 616 sd.sd_xx = 0; 617 sd.sd_def32 = 1; 618 sd.sd_gran = 1; 619 critical_enter(); 620 /* set %gs */ 621 td->td_pcb->pcb_gsd = sd; 622 if (td == curthread) { 623 PCPU_GET(fsgs_gdt)[1] = sd; 624 load_gs(GSEL(GUGS_SEL, SEL_UPL)); 625 } 626 critical_exit(); 627 return (0); 628} 629 630/* 631 * Convert kernel VA to physical address 632 */ 633vm_paddr_t 634kvtop(void *addr) 635{ 636 vm_paddr_t pa; 637 638 pa = pmap_kextract((vm_offset_t)addr); 639 if (pa == 0) 640 panic("kvtop: zero page frame"); 641 return (pa); 642} 643 644#ifdef SMP 645static void 646cpu_reset_proxy() 647{ 648 649 cpu_reset_proxy_active = 1; 650 while (cpu_reset_proxy_active == 1) 651 ia32_pause(); /* Wait for other cpu to see that we've started */ 652 653 printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid); 654 DELAY(1000000); 655 cpu_reset_real(); 656} 657#endif 658 659void 660cpu_reset() 661{ 662#ifdef XBOX 663 if (arch_i386_is_xbox) { 664 /* Kick the PIC16L, it can reboot the box */ 665 pic16l_reboot(); 666 for (;;); 667 } 668#endif 669 670#ifdef SMP 671 cpuset_t map; 672 u_int cnt; 673 674 if (smp_started) { 675 map = all_cpus; 676 CPU_CLR(PCPU_GET(cpuid), &map); 677 CPU_NAND(&map, &stopped_cpus); 678 if (!CPU_EMPTY(&map)) { 679 printf("cpu_reset: Stopping other CPUs\n"); 680 stop_cpus(map); 681 } 682 683 if (PCPU_GET(cpuid) != 0) { 684 cpu_reset_proxyid = PCPU_GET(cpuid); 685 cpustop_restartfunc = cpu_reset_proxy; 686 cpu_reset_proxy_active = 0; 687 printf("cpu_reset: Restarting BSP\n"); 688 689 /* Restart CPU #0. */ 690 CPU_SETOF(0, &started_cpus); 691 wmb(); 692 693 cnt = 0; 694 while (cpu_reset_proxy_active == 0 && cnt < 10000000) { 695 ia32_pause(); 696 cnt++; /* Wait for BSP to announce restart */ 697 } 698 if (cpu_reset_proxy_active == 0) { 699 printf("cpu_reset: Failed to restart BSP\n"); 700 } else { 701 cpu_reset_proxy_active = 2; 702 while (1) 703 ia32_pause(); 704 /* NOTREACHED */ 705 } 706 } 707 708 DELAY(1000000); 709 } 710#endif 711 cpu_reset_real(); 712 /* NOTREACHED */ 713} 714 715static void 716cpu_reset_real() 717{ 718 struct region_descriptor null_idt; 719#ifndef PC98 720 int b; 721#endif 722 723 disable_intr(); 724#ifdef XEN 725 if (smp_processor_id() == 0) 726 HYPERVISOR_shutdown(SHUTDOWN_reboot); 727 else 728 HYPERVISOR_shutdown(SHUTDOWN_poweroff); 729#endif 730#ifdef CPU_ELAN 731 if (elan_mmcr != NULL) 732 elan_mmcr->RESCFG = 1; 733#endif 734 735 if (cpu == CPU_GEODE1100) { 736 /* Attempt Geode's own reset */ 737 outl(0xcf8, 0x80009044ul); 738 outl(0xcfc, 0xf); 739 } 740 741#ifdef PC98 742 /* 743 * Attempt to do a CPU reset via CPU reset port. 744 */ 745 if ((inb(0x35) & 0xa0) != 0xa0) { 746 outb(0x37, 0x0f); /* SHUT0 = 0. */ 747 outb(0x37, 0x0b); /* SHUT1 = 0. */ 748 } 749 outb(0xf0, 0x00); /* Reset. */ 750#else 751#if !defined(BROKEN_KEYBOARD_RESET) 752 /* 753 * Attempt to do a CPU reset via the keyboard controller, 754 * do not turn off GateA20, as any machine that fails 755 * to do the reset here would then end up in no man's land. 756 */ 757 outb(IO_KBD + 4, 0xFE); 758 DELAY(500000); /* wait 0.5 sec to see if that did it */ 759#endif 760 761 /* 762 * Attempt to force a reset via the Reset Control register at 763 * I/O port 0xcf9. Bit 2 forces a system reset when it 764 * transitions from 0 to 1. Bit 1 selects the type of reset 765 * to attempt: 0 selects a "soft" reset, and 1 selects a 766 * "hard" reset. We try a "hard" reset. The first write sets 767 * bit 1 to select a "hard" reset and clears bit 2. The 768 * second write forces a 0 -> 1 transition in bit 2 to trigger 769 * a reset. 770 */ 771 outb(0xcf9, 0x2); 772 outb(0xcf9, 0x6); 773 DELAY(500000); /* wait 0.5 sec to see if that did it */ 774 775 /* 776 * Attempt to force a reset via the Fast A20 and Init register 777 * at I/O port 0x92. Bit 1 serves as an alternate A20 gate. 778 * Bit 0 asserts INIT# when set to 1. We are careful to only 779 * preserve bit 1 while setting bit 0. We also must clear bit 780 * 0 before setting it if it isn't already clear. 781 */ 782 b = inb(0x92); 783 if (b != 0xff) { 784 if ((b & 0x1) != 0) 785 outb(0x92, b & 0xfe); 786 outb(0x92, b | 0x1); 787 DELAY(500000); /* wait 0.5 sec to see if that did it */ 788 } 789#endif /* PC98 */ 790 791 printf("No known reset method worked, attempting CPU shutdown\n"); 792 DELAY(1000000); /* wait 1 sec for printf to complete */ 793 794 /* Wipe the IDT. */ 795 null_idt.rd_limit = 0; 796 null_idt.rd_base = 0; 797 lidt(&null_idt); 798 799 /* "good night, sweet prince .... <THUNK!>" */ 800 breakpoint(); 801 802 /* NOTREACHED */ 803 while(1); 804} 805 806/* 807 * Allocate a pool of sf_bufs (sendfile(2) or "super-fast" if you prefer. :-)) 808 */ 809static void 810sf_buf_init(void *arg) 811{ 812 struct sf_buf *sf_bufs; 813 vm_offset_t sf_base; 814 int i; 815 816 nsfbufs = NSFBUFS; 817 TUNABLE_INT_FETCH("kern.ipc.nsfbufs", &nsfbufs); 818 819 sf_buf_active = hashinit(nsfbufs, M_TEMP, &sf_buf_hashmask); 820 TAILQ_INIT(&sf_buf_freelist); 821 sf_base = kva_alloc(nsfbufs * PAGE_SIZE); 822 sf_bufs = malloc(nsfbufs * sizeof(struct sf_buf), M_TEMP, 823 M_NOWAIT | M_ZERO); 824 for (i = 0; i < nsfbufs; i++) { 825 sf_bufs[i].kva = sf_base + i * PAGE_SIZE; 826 TAILQ_INSERT_TAIL(&sf_buf_freelist, &sf_bufs[i], free_entry); 827 } 828 sf_buf_alloc_want = 0; 829 mtx_init(&sf_buf_lock, "sf_buf", NULL, MTX_DEF); 830} 831 832/* 833 * Invalidate the cache lines that may belong to the page, if 834 * (possibly old) mapping of the page by sf buffer exists. Returns 835 * TRUE when mapping was found and cache invalidated. 836 */ 837boolean_t 838sf_buf_invalidate_cache(vm_page_t m) 839{ 840 struct sf_head *hash_list; 841 struct sf_buf *sf; 842 boolean_t ret; 843 844 hash_list = &sf_buf_active[SF_BUF_HASH(m)]; 845 ret = FALSE; 846 mtx_lock(&sf_buf_lock); 847 LIST_FOREACH(sf, hash_list, list_entry) { 848 if (sf->m == m) { 849 /* 850 * Use pmap_qenter to update the pte for 851 * existing mapping, in particular, the PAT 852 * settings are recalculated. 853 */ 854 pmap_qenter(sf->kva, &m, 1); 855 pmap_invalidate_cache_range(sf->kva, sf->kva + 856 PAGE_SIZE, FALSE); 857 ret = TRUE; 858 break; 859 } 860 } 861 mtx_unlock(&sf_buf_lock); 862 return (ret); 863} 864 865/* 866 * Get an sf_buf from the freelist. May block if none are available. 867 */ 868struct sf_buf * 869sf_buf_alloc(struct vm_page *m, int flags) 870{ 871 pt_entry_t opte, *ptep; 872 struct sf_head *hash_list; 873 struct sf_buf *sf; 874#ifdef SMP 875 cpuset_t other_cpus; 876 u_int cpuid; 877#endif 878 int error; 879 880 KASSERT(curthread->td_pinned > 0 || (flags & SFB_CPUPRIVATE) == 0, 881 ("sf_buf_alloc(SFB_CPUPRIVATE): curthread not pinned")); 882 hash_list = &sf_buf_active[SF_BUF_HASH(m)]; 883 mtx_lock(&sf_buf_lock); 884 LIST_FOREACH(sf, hash_list, list_entry) { 885 if (sf->m == m) { 886 sf->ref_count++; 887 if (sf->ref_count == 1) { 888 TAILQ_REMOVE(&sf_buf_freelist, sf, free_entry); 889 nsfbufsused++; 890 nsfbufspeak = imax(nsfbufspeak, nsfbufsused); 891 } 892#ifdef SMP 893 goto shootdown; 894#else 895 goto done; 896#endif 897 } 898 } 899 while ((sf = TAILQ_FIRST(&sf_buf_freelist)) == NULL) { 900 if (flags & SFB_NOWAIT) 901 goto done; 902 sf_buf_alloc_want++; 903 SFSTAT_INC(sf_allocwait); 904 error = msleep(&sf_buf_freelist, &sf_buf_lock, 905 (flags & SFB_CATCH) ? PCATCH | PVM : PVM, "sfbufa", 0); 906 sf_buf_alloc_want--; 907 908 /* 909 * If we got a signal, don't risk going back to sleep. 910 */ 911 if (error) 912 goto done; 913 } 914 TAILQ_REMOVE(&sf_buf_freelist, sf, free_entry); 915 if (sf->m != NULL) 916 LIST_REMOVE(sf, list_entry); 917 LIST_INSERT_HEAD(hash_list, sf, list_entry); 918 sf->ref_count = 1; 919 sf->m = m; 920 nsfbufsused++; 921 nsfbufspeak = imax(nsfbufspeak, nsfbufsused); 922 923 /* 924 * Update the sf_buf's virtual-to-physical mapping, flushing the 925 * virtual address from the TLB. Since the reference count for 926 * the sf_buf's old mapping was zero, that mapping is not 927 * currently in use. Consequently, there is no need to exchange 928 * the old and new PTEs atomically, even under PAE. 929 */ 930 ptep = vtopte(sf->kva); 931 opte = *ptep; 932#ifdef XEN 933 PT_SET_MA(sf->kva, xpmap_ptom(VM_PAGE_TO_PHYS(m)) | pgeflag 934 | PG_RW | PG_V | pmap_cache_bits(m->md.pat_mode, 0)); 935#else 936 *ptep = VM_PAGE_TO_PHYS(m) | pgeflag | PG_RW | PG_V | 937 pmap_cache_bits(m->md.pat_mode, 0); 938#endif 939 940 /* 941 * Avoid unnecessary TLB invalidations: If the sf_buf's old 942 * virtual-to-physical mapping was not used, then any processor 943 * that has invalidated the sf_buf's virtual address from its TLB 944 * since the last used mapping need not invalidate again. 945 */ 946#ifdef SMP 947 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 948 CPU_ZERO(&sf->cpumask); 949shootdown: 950 sched_pin(); 951 cpuid = PCPU_GET(cpuid); 952 if (!CPU_ISSET(cpuid, &sf->cpumask)) { 953 CPU_SET(cpuid, &sf->cpumask); 954 invlpg(sf->kva); 955 } 956 if ((flags & SFB_CPUPRIVATE) == 0) { 957 other_cpus = all_cpus; 958 CPU_CLR(cpuid, &other_cpus); 959 CPU_NAND(&other_cpus, &sf->cpumask); 960 if (!CPU_EMPTY(&other_cpus)) { 961 CPU_OR(&sf->cpumask, &other_cpus); 962 smp_masked_invlpg(other_cpus, sf->kva); 963 } 964 } 965 sched_unpin(); 966#else 967 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 968 pmap_invalidate_page(kernel_pmap, sf->kva); 969#endif 970done: 971 mtx_unlock(&sf_buf_lock); 972 return (sf); 973} 974 975/* 976 * Remove a reference from the given sf_buf, adding it to the free 977 * list when its reference count reaches zero. A freed sf_buf still, 978 * however, retains its virtual-to-physical mapping until it is 979 * recycled or reactivated by sf_buf_alloc(9). 980 */ 981void 982sf_buf_free(struct sf_buf *sf) 983{ 984 985 mtx_lock(&sf_buf_lock); 986 sf->ref_count--; 987 if (sf->ref_count == 0) { 988 TAILQ_INSERT_TAIL(&sf_buf_freelist, sf, free_entry); 989 nsfbufsused--; 990#ifdef XEN 991/* 992 * Xen doesn't like having dangling R/W mappings 993 */ 994 pmap_qremove(sf->kva, 1); 995 sf->m = NULL; 996 LIST_REMOVE(sf, list_entry); 997#endif 998 if (sf_buf_alloc_want > 0) 999 wakeup(&sf_buf_freelist); 1000 } 1001 mtx_unlock(&sf_buf_lock); 1002} 1003 1004/* 1005 * Software interrupt handler for queued VM system processing. 1006 */ 1007void 1008swi_vm(void *dummy) 1009{ 1010 if (busdma_swi_pending != 0) 1011 busdma_swi(); 1012} 1013 1014/* 1015 * Tell whether this address is in some physical memory region. 1016 * Currently used by the kernel coredump code in order to avoid 1017 * dumping the ``ISA memory hole'' which could cause indefinite hangs, 1018 * or other unpredictable behaviour. 1019 */ 1020 1021int 1022is_physical_memory(vm_paddr_t addr) 1023{ 1024 1025#ifdef DEV_ISA 1026 /* The ISA ``memory hole''. */ 1027 if (addr >= 0xa0000 && addr < 0x100000) 1028 return 0; 1029#endif 1030 1031 /* 1032 * stuff other tests for known memory-mapped devices (PCI?) 1033 * here 1034 */ 1035 1036 return 1; 1037} 1038