1/*
2 * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x
3 *
4 * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11/dts-v1/;
12
13#include "am33xx.dtsi"
14
15/ {
16	cpus {
17		cpu@0 {
18			cpu0-supply = <&vdd1_reg>;
19		};
20	};
21
22	memory {
23		device_type = "memory";
24		reg = <0x80000000 0x10000000>; /* 256 MB */
25	};
26
27	leds {
28		pinctrl-names = "default";
29		pinctrl-0 = <&leds_pins>;
30
31		compatible = "gpio-leds";
32
33		led@0 {
34			label = "com:green:user";
35			gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
36			default-state = "on";
37		};
38	};
39
40	vbat: fixedregulator@0 {
41		compatible = "regulator-fixed";
42		regulator-name = "vbat";
43		regulator-min-microvolt = <5000000>;
44		regulator-max-microvolt = <5000000>;
45		regulator-boot-on;
46	};
47
48	vmmc: fixedregulator@0 {
49		compatible = "regulator-fixed";
50		regulator-name = "vmmc";
51		regulator-min-microvolt = <3300000>;
52		regulator-max-microvolt = <3300000>;
53	};
54};
55
56&am33xx_pinmux {
57	i2c0_pins: pinmux_i2c0_pins {
58		pinctrl-single,pins = <
59			0x188 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
60			0x18c (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
61		>;
62	};
63
64	nandflash_pins: pinmux_nandflash_pins {
65		pinctrl-single,pins = <
66			0x0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
67			0x4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
68			0x8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
69			0xc (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
70			0x10 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
71			0x14 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
72			0x18 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
73			0x1c (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
74			0x70 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
75			0x74 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_wpn.gpio0_30 */
76			0x7c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_csn0.gpmc_csn0 */
77			0x90 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_advn_ale.gpmc_advn_ale */
78			0x94 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_oen_ren.gpmc_oen_ren */
79			0x98 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_wen.gpmc_wen */
80			0x9c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_be0n_cle.gpmc_be0n_cle */
81		>;
82	};
83
84	uart0_pins: pinmux_uart0_pins {
85		pinctrl-single,pins = <
86			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
87			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
88		>;
89	};
90
91	leds_pins: pinmux_leds_pins {
92		pinctrl-single,pins = <
93			0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a7.gpio1_23 */
94		>;
95	};
96};
97
98&mac {
99	status = "okay";
100};
101
102&davinci_mdio {
103	status = "okay";
104};
105
106&cpsw_emac0 {
107	phy_id = <&davinci_mdio>, <0>;
108	phy-mode = "rmii";
109};
110
111&cpsw_emac1 {
112	phy_id = <&davinci_mdio>, <1>;
113	phy-mode = "rmii";
114};
115
116&phy_sel {
117	rmii-clock-ext;
118};
119
120&elm {
121	status = "okay";
122};
123
124&gpmc {
125	status = "okay";
126	pinctrl-names = "default";
127	pinctrl-0 = <&nandflash_pins>;
128
129	ranges = <0 0 0x08000000 0x1000000>;	/* CS0: 16MB for NAND */
130
131	nand@0,0 {
132		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
133		nand-bus-width = <8>;
134		ti,nand-ecc-opt = "bch8";
135		gpmc,device-width = <1>;
136		gpmc,sync-clk-ps = <0>;
137		gpmc,cs-on-ns = <0>;
138		gpmc,cs-rd-off-ns = <44>;
139		gpmc,cs-wr-off-ns = <44>;
140		gpmc,adv-on-ns = <6>;
141		gpmc,adv-rd-off-ns = <34>;
142		gpmc,adv-wr-off-ns = <44>;
143		gpmc,we-on-ns = <0>;
144		gpmc,we-off-ns = <40>;
145		gpmc,oe-on-ns = <0>;
146		gpmc,oe-off-ns = <54>;
147		gpmc,access-ns = <64>;
148		gpmc,rd-cycle-ns = <82>;
149		gpmc,wr-cycle-ns = <82>;
150		gpmc,wait-on-read = "true";
151		gpmc,wait-on-write = "true";
152		gpmc,bus-turnaround-ns = <0>;
153		gpmc,cycle2cycle-delay-ns = <0>;
154		gpmc,clk-activation-ns = <0>;
155		gpmc,wait-monitoring-ns = <0>;
156		gpmc,wr-access-ns = <40>;
157		gpmc,wr-data-mux-bus-ns = <0>;
158
159		#address-cells = <1>;
160		#size-cells = <1>;
161		elm_id = <&elm>;
162
163		/* MTD partition table */
164		partition@0 {
165			label = "SPL";
166			reg = <0x00000000 0x000080000>;
167		};
168
169		partition@1 {
170			label = "U-boot";
171			reg = <0x00080000 0x001e0000>;
172		};
173
174		partition@2 {
175			label = "U-Boot Env";
176			reg = <0x00260000 0x00020000>;
177		};
178
179		partition@3 {
180			label = "Kernel";
181			reg = <0x00280000 0x00500000>;
182		};
183
184		partition@4 {
185			label = "File System";
186			reg = <0x00780000 0x007880000>;
187		};
188	};
189};
190
191&i2c0 {
192	status = "okay";
193	pinctrl-names = "default";
194	pinctrl-0 = <&i2c0_pins>;
195
196	clock-frequency = <400000>;
197
198	tps: tps@2d {
199		reg = <0x2d>;
200	};
201};
202
203&mmc1 {
204	status = "okay";
205	vmmc-supply = <&vmmc>;
206	bus-width = <4>;
207};
208
209&uart0 {
210	status = "okay";
211	pinctrl-names = "default";
212	pinctrl-0 = <&uart0_pins>;
213};
214
215&usb {
216	status = "okay";
217};
218
219&usb_ctrl_mod {
220	status = "okay";
221};
222
223&usb0_phy {
224	status = "okay";
225};
226
227&usb1_phy {
228	status = "okay";
229};
230
231&usb0 {
232	status = "okay";
233};
234
235&usb1 {
236	status = "okay";
237	dr_mode = "host";
238};
239
240&cppi41dma  {
241	status = "okay";
242};
243
244#include "tps65910.dtsi"
245
246&tps {
247	vcc1-supply = <&vbat>;
248	vcc2-supply = <&vbat>;
249	vcc3-supply = <&vbat>;
250	vcc4-supply = <&vbat>;
251	vcc5-supply = <&vbat>;
252	vcc6-supply = <&vbat>;
253	vcc7-supply = <&vbat>;
254	vccio-supply = <&vbat>;
255
256	regulators {
257		vrtc_reg: regulator@0 {
258			regulator-always-on;
259		};
260
261		vio_reg: regulator@1 {
262			regulator-always-on;
263		};
264
265		vdd1_reg: regulator@2 {
266			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
267			regulator-name = "vdd_mpu";
268			regulator-min-microvolt = <912500>;
269			regulator-max-microvolt = <1312500>;
270			regulator-boot-on;
271			regulator-always-on;
272		};
273
274		vdd2_reg: regulator@3 {
275			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
276			regulator-name = "vdd_core";
277			regulator-min-microvolt = <912500>;
278			regulator-max-microvolt = <1150000>;
279			regulator-boot-on;
280			regulator-always-on;
281		};
282
283		vdd3_reg: regulator@4 {
284			regulator-always-on;
285		};
286
287		vdig1_reg: regulator@5 {
288			regulator-always-on;
289		};
290
291		vdig2_reg: regulator@6 {
292			regulator-always-on;
293		};
294
295		vpll_reg: regulator@7 {
296			regulator-always-on;
297		};
298
299		vdac_reg: regulator@8 {
300			regulator-always-on;
301		};
302
303		vaux1_reg: regulator@9 {
304			regulator-always-on;
305		};
306
307		vaux2_reg: regulator@10 {
308			regulator-always-on;
309		};
310
311		vaux33_reg: regulator@11 {
312			regulator-always-on;
313		};
314
315		vmmc_reg: regulator@12 {
316			regulator-always-on;
317		};
318	};
319};
320
321