1/*- 2 * Copyright (c) 2005 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Copyright (c) 2009 The FreeBSD Foundation 6 * All rights reserved. 7 * 8 * Portions of this software were developed by Ed Schouten 9 * under sponsorship from the FreeBSD Foundation. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33#include <sys/cdefs.h> 34__FBSDID("$FreeBSD: stable/10/sys/dev/vt/hw/vga/vt_vga.c 332644 2018-04-17 12:52:30Z emaste $"); 35 36#include <sys/param.h> 37#include <sys/kernel.h> 38#include <sys/systm.h> 39 40#include <dev/vt/vt.h> 41#include <dev/vt/hw/vga/vt_vga_reg.h> 42 43#include <machine/bus.h> 44 45struct vga_softc { 46 bus_space_tag_t vga_fb_tag; 47 bus_space_handle_t vga_fb_handle; 48 bus_space_tag_t vga_reg_tag; 49 bus_space_handle_t vga_reg_handle; 50 int vga_wmode; 51 term_color_t vga_curfg, vga_curbg; 52}; 53 54/* Convenience macros. */ 55#define MEM_READ1(sc, ofs) \ 56 bus_space_read_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs) 57#define MEM_WRITE1(sc, ofs, val) \ 58 bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 59#define REG_READ1(sc, reg) \ 60 bus_space_read_1(sc->vga_reg_tag, sc->vga_reg_handle, reg) 61#define REG_WRITE1(sc, reg, val) \ 62 bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val) 63 64#define VT_VGA_WIDTH 640 65#define VT_VGA_HEIGHT 480 66#define VT_VGA_MEMSIZE (VT_VGA_WIDTH * VT_VGA_HEIGHT / 8) 67 68/* 69 * VGA is designed to handle 8 pixels at a time (8 pixels in one byte of 70 * memory). 71 */ 72#define VT_VGA_PIXELS_BLOCK 8 73 74/* 75 * We use an off-screen addresses to: 76 * o store the background color; 77 * o store pixels pattern. 78 * Those addresses are then loaded in the latches once. 79 */ 80#define VT_VGA_BGCOLOR_OFFSET VT_VGA_MEMSIZE 81 82static vd_probe_t vga_probe; 83static vd_init_t vga_init; 84static vd_blank_t vga_blank; 85static vd_bitblt_text_t vga_bitblt_text; 86static vd_bitblt_bmp_t vga_bitblt_bitmap; 87static vd_drawrect_t vga_drawrect; 88static vd_setpixel_t vga_setpixel; 89static vd_postswitch_t vga_postswitch; 90 91static const struct vt_driver vt_vga_driver = { 92 .vd_name = "vga", 93 .vd_probe = vga_probe, 94 .vd_init = vga_init, 95 .vd_blank = vga_blank, 96 .vd_bitblt_text = vga_bitblt_text, 97 .vd_bitblt_bmp = vga_bitblt_bitmap, 98 .vd_drawrect = vga_drawrect, 99 .vd_setpixel = vga_setpixel, 100 .vd_postswitch = vga_postswitch, 101 .vd_priority = VD_PRIORITY_GENERIC, 102}; 103 104/* 105 * Driver supports both text mode and graphics mode. Make sure the 106 * buffer is always big enough to support both. 107 */ 108static struct vga_softc vga_conssoftc; 109VT_DRIVER_DECLARE(vt_vga, vt_vga_driver); 110 111static inline void 112vga_setwmode(struct vt_device *vd, int wmode) 113{ 114 struct vga_softc *sc = vd->vd_softc; 115 116 if (sc->vga_wmode == wmode) 117 return; 118 119 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 120 REG_WRITE1(sc, VGA_GC_DATA, wmode); 121 sc->vga_wmode = wmode; 122 123 switch (wmode) { 124 case 3: 125 /* Re-enable all plans. */ 126 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 127 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 128 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 129 break; 130 } 131} 132 133static inline void 134vga_setfg(struct vt_device *vd, term_color_t color) 135{ 136 struct vga_softc *sc = vd->vd_softc; 137 138 vga_setwmode(vd, 3); 139 140 if (sc->vga_curfg == color) 141 return; 142 143 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 144 REG_WRITE1(sc, VGA_GC_DATA, color); 145 sc->vga_curfg = color; 146} 147 148static inline void 149vga_setbg(struct vt_device *vd, term_color_t color) 150{ 151 struct vga_softc *sc = vd->vd_softc; 152 153 vga_setwmode(vd, 3); 154 155 if (sc->vga_curbg == color) 156 return; 157 158 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 159 REG_WRITE1(sc, VGA_GC_DATA, color); 160 161 /* 162 * Write 8 pixels using the background color to an off-screen 163 * byte in the video memory. 164 */ 165 MEM_WRITE1(sc, VT_VGA_BGCOLOR_OFFSET, 0xff); 166 167 /* 168 * Read those 8 pixels back to load the background color in the 169 * latches register. 170 */ 171 MEM_READ1(sc, VT_VGA_BGCOLOR_OFFSET); 172 173 sc->vga_curbg = color; 174 175 /* 176 * The Set/Reset register doesn't contain the fg color anymore, 177 * store an invalid color. 178 */ 179 sc->vga_curfg = 0xff; 180} 181 182/* 183 * Binary searchable table for Unicode to CP437 conversion. 184 */ 185 186struct unicp437 { 187 uint16_t unicode_base; 188 uint8_t cp437_base; 189 uint8_t length; 190}; 191 192static const struct unicp437 cp437table[] = { 193 { 0x0020, 0x20, 0x5e }, { 0x00a0, 0x20, 0x00 }, 194 { 0x00a1, 0xad, 0x00 }, { 0x00a2, 0x9b, 0x00 }, 195 { 0x00a3, 0x9c, 0x00 }, { 0x00a5, 0x9d, 0x00 }, 196 { 0x00a7, 0x15, 0x00 }, { 0x00aa, 0xa6, 0x00 }, 197 { 0x00ab, 0xae, 0x00 }, { 0x00ac, 0xaa, 0x00 }, 198 { 0x00b0, 0xf8, 0x00 }, { 0x00b1, 0xf1, 0x00 }, 199 { 0x00b2, 0xfd, 0x00 }, { 0x00b5, 0xe6, 0x00 }, 200 { 0x00b6, 0x14, 0x00 }, { 0x00b7, 0xfa, 0x00 }, 201 { 0x00ba, 0xa7, 0x00 }, { 0x00bb, 0xaf, 0x00 }, 202 { 0x00bc, 0xac, 0x00 }, { 0x00bd, 0xab, 0x00 }, 203 { 0x00bf, 0xa8, 0x00 }, { 0x00c4, 0x8e, 0x01 }, 204 { 0x00c6, 0x92, 0x00 }, { 0x00c7, 0x80, 0x00 }, 205 { 0x00c9, 0x90, 0x00 }, { 0x00d1, 0xa5, 0x00 }, 206 { 0x00d6, 0x99, 0x00 }, { 0x00dc, 0x9a, 0x00 }, 207 { 0x00df, 0xe1, 0x00 }, { 0x00e0, 0x85, 0x00 }, 208 { 0x00e1, 0xa0, 0x00 }, { 0x00e2, 0x83, 0x00 }, 209 { 0x00e4, 0x84, 0x00 }, { 0x00e5, 0x86, 0x00 }, 210 { 0x00e6, 0x91, 0x00 }, { 0x00e7, 0x87, 0x00 }, 211 { 0x00e8, 0x8a, 0x00 }, { 0x00e9, 0x82, 0x00 }, 212 { 0x00ea, 0x88, 0x01 }, { 0x00ec, 0x8d, 0x00 }, 213 { 0x00ed, 0xa1, 0x00 }, { 0x00ee, 0x8c, 0x00 }, 214 { 0x00ef, 0x8b, 0x00 }, { 0x00f0, 0xeb, 0x00 }, 215 { 0x00f1, 0xa4, 0x00 }, { 0x00f2, 0x95, 0x00 }, 216 { 0x00f3, 0xa2, 0x00 }, { 0x00f4, 0x93, 0x00 }, 217 { 0x00f6, 0x94, 0x00 }, { 0x00f7, 0xf6, 0x00 }, 218 { 0x00f8, 0xed, 0x00 }, { 0x00f9, 0x97, 0x00 }, 219 { 0x00fa, 0xa3, 0x00 }, { 0x00fb, 0x96, 0x00 }, 220 { 0x00fc, 0x81, 0x00 }, { 0x00ff, 0x98, 0x00 }, 221 { 0x0192, 0x9f, 0x00 }, { 0x0393, 0xe2, 0x00 }, 222 { 0x0398, 0xe9, 0x00 }, { 0x03a3, 0xe4, 0x00 }, 223 { 0x03a6, 0xe8, 0x00 }, { 0x03a9, 0xea, 0x00 }, 224 { 0x03b1, 0xe0, 0x01 }, { 0x03b4, 0xeb, 0x00 }, 225 { 0x03b5, 0xee, 0x00 }, { 0x03bc, 0xe6, 0x00 }, 226 { 0x03c0, 0xe3, 0x00 }, { 0x03c3, 0xe5, 0x00 }, 227 { 0x03c4, 0xe7, 0x00 }, { 0x03c6, 0xed, 0x00 }, 228 { 0x03d5, 0xed, 0x00 }, { 0x2010, 0x2d, 0x00 }, 229 { 0x2013, 0x2d, 0x00 }, 230 { 0x2014, 0x2d, 0x00 }, { 0x2018, 0x60, 0x00 }, 231 { 0x2019, 0x27, 0x00 }, { 0x201c, 0x22, 0x00 }, 232 { 0x201d, 0x22, 0x00 }, { 0x2022, 0x07, 0x00 }, 233 { 0x203c, 0x13, 0x00 }, { 0x207f, 0xfc, 0x00 }, 234 { 0x20a7, 0x9e, 0x00 }, { 0x20ac, 0xee, 0x00 }, 235 { 0x2126, 0xea, 0x00 }, { 0x2190, 0x1b, 0x00 }, 236 { 0x2191, 0x18, 0x00 }, { 0x2192, 0x1a, 0x00 }, 237 { 0x2193, 0x19, 0x00 }, { 0x2194, 0x1d, 0x00 }, 238 { 0x2195, 0x12, 0x00 }, { 0x21a8, 0x17, 0x00 }, 239 { 0x2202, 0xeb, 0x00 }, { 0x2208, 0xee, 0x00 }, 240 { 0x2211, 0xe4, 0x00 }, { 0x2212, 0x2d, 0x00 }, 241 { 0x2219, 0xf9, 0x00 }, { 0x221a, 0xfb, 0x00 }, 242 { 0x221e, 0xec, 0x00 }, { 0x221f, 0x1c, 0x00 }, 243 { 0x2229, 0xef, 0x00 }, { 0x2248, 0xf7, 0x00 }, 244 { 0x2261, 0xf0, 0x00 }, { 0x2264, 0xf3, 0x00 }, 245 { 0x2265, 0xf2, 0x00 }, { 0x2302, 0x7f, 0x00 }, 246 { 0x2310, 0xa9, 0x00 }, { 0x2320, 0xf4, 0x00 }, 247 { 0x2321, 0xf5, 0x00 }, { 0x2500, 0xc4, 0x00 }, 248 { 0x2502, 0xb3, 0x00 }, { 0x250c, 0xda, 0x00 }, 249 { 0x2510, 0xbf, 0x00 }, { 0x2514, 0xc0, 0x00 }, 250 { 0x2518, 0xd9, 0x00 }, { 0x251c, 0xc3, 0x00 }, 251 { 0x2524, 0xb4, 0x00 }, { 0x252c, 0xc2, 0x00 }, 252 { 0x2534, 0xc1, 0x00 }, { 0x253c, 0xc5, 0x00 }, 253 { 0x2550, 0xcd, 0x00 }, { 0x2551, 0xba, 0x00 }, 254 { 0x2552, 0xd5, 0x00 }, { 0x2553, 0xd6, 0x00 }, 255 { 0x2554, 0xc9, 0x00 }, { 0x2555, 0xb8, 0x00 }, 256 { 0x2556, 0xb7, 0x00 }, { 0x2557, 0xbb, 0x00 }, 257 { 0x2558, 0xd4, 0x00 }, { 0x2559, 0xd3, 0x00 }, 258 { 0x255a, 0xc8, 0x00 }, { 0x255b, 0xbe, 0x00 }, 259 { 0x255c, 0xbd, 0x00 }, { 0x255d, 0xbc, 0x00 }, 260 { 0x255e, 0xc6, 0x01 }, { 0x2560, 0xcc, 0x00 }, 261 { 0x2561, 0xb5, 0x00 }, { 0x2562, 0xb6, 0x00 }, 262 { 0x2563, 0xb9, 0x00 }, { 0x2564, 0xd1, 0x01 }, 263 { 0x2566, 0xcb, 0x00 }, { 0x2567, 0xcf, 0x00 }, 264 { 0x2568, 0xd0, 0x00 }, { 0x2569, 0xca, 0x00 }, 265 { 0x256a, 0xd8, 0x00 }, { 0x256b, 0xd7, 0x00 }, 266 { 0x256c, 0xce, 0x00 }, { 0x2580, 0xdf, 0x00 }, 267 { 0x2584, 0xdc, 0x00 }, { 0x2588, 0xdb, 0x00 }, 268 { 0x258c, 0xdd, 0x00 }, { 0x2590, 0xde, 0x00 }, 269 { 0x2591, 0xb0, 0x02 }, { 0x25a0, 0xfe, 0x00 }, 270 { 0x25ac, 0x16, 0x00 }, { 0x25b2, 0x1e, 0x00 }, 271 { 0x25ba, 0x10, 0x00 }, { 0x25bc, 0x1f, 0x00 }, 272 { 0x25c4, 0x11, 0x00 }, { 0x25cb, 0x09, 0x00 }, 273 { 0x25d8, 0x08, 0x00 }, { 0x25d9, 0x0a, 0x00 }, 274 { 0x263a, 0x01, 0x01 }, { 0x263c, 0x0f, 0x00 }, 275 { 0x2640, 0x0c, 0x00 }, { 0x2642, 0x0b, 0x00 }, 276 { 0x2660, 0x06, 0x00 }, { 0x2663, 0x05, 0x00 }, 277 { 0x2665, 0x03, 0x01 }, { 0x266a, 0x0d, 0x00 }, 278 { 0x266c, 0x0e, 0x00 }, { 0x27e8, 0x3c, 0x00 }, 279 { 0x27e9, 0x3e, 0x00 }, 280}; 281 282static uint8_t 283vga_get_cp437(term_char_t c) 284{ 285 int min, mid, max; 286 287 min = 0; 288 max = nitems(cp437table) - 1; 289 290 if (c < cp437table[0].unicode_base || 291 c > cp437table[max].unicode_base + cp437table[max].length) 292 return '?'; 293 294 while (max >= min) { 295 mid = (min + max) / 2; 296 if (c < cp437table[mid].unicode_base) 297 max = mid - 1; 298 else if (c > cp437table[mid].unicode_base + 299 cp437table[mid].length) 300 min = mid + 1; 301 else 302 return (c - cp437table[mid].unicode_base + 303 cp437table[mid].cp437_base); 304 } 305 306 return '?'; 307} 308 309static void 310vga_blank(struct vt_device *vd, term_color_t color) 311{ 312 struct vga_softc *sc = vd->vd_softc; 313 u_int ofs; 314 315 vga_setfg(vd, color); 316 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) 317 MEM_WRITE1(sc, ofs, 0xff); 318} 319 320static inline void 321vga_bitblt_put(struct vt_device *vd, u_long dst, term_color_t color, 322 uint8_t v) 323{ 324 struct vga_softc *sc = vd->vd_softc; 325 326 /* Skip empty writes, in order to avoid palette changes. */ 327 if (v != 0x00) { 328 vga_setfg(vd, color); 329 /* 330 * When this MEM_READ1() gets disabled, all sorts of 331 * artifacts occur. This is because this read loads the 332 * set of 8 pixels that are about to be changed. There 333 * is one scenario where we can avoid the read, namely 334 * if all pixels are about to be overwritten anyway. 335 */ 336 if (v != 0xff) { 337 MEM_READ1(sc, dst); 338 339 /* The bg color was trashed by the reads. */ 340 sc->vga_curbg = 0xff; 341 } 342 MEM_WRITE1(sc, dst, v); 343 } 344} 345 346static void 347vga_setpixel(struct vt_device *vd, int x, int y, term_color_t color) 348{ 349 350 if (vd->vd_flags & VDF_TEXTMODE) 351 return; 352 353 vga_bitblt_put(vd, (y * VT_VGA_WIDTH / 8) + (x / 8), color, 354 0x80 >> (x % 8)); 355} 356 357static void 358vga_drawrect(struct vt_device *vd, int x1, int y1, int x2, int y2, int fill, 359 term_color_t color) 360{ 361 int x, y; 362 363 if (vd->vd_flags & VDF_TEXTMODE) 364 return; 365 366 for (y = y1; y <= y2; y++) { 367 if (fill || (y == y1) || (y == y2)) { 368 for (x = x1; x <= x2; x++) 369 vga_setpixel(vd, x, y, color); 370 } else { 371 vga_setpixel(vd, x1, y, color); 372 vga_setpixel(vd, x2, y, color); 373 } 374 } 375} 376 377static void 378vga_compute_shifted_pattern(const uint8_t *src, unsigned int bytes, 379 unsigned int src_x, unsigned int x_count, unsigned int dst_x, 380 uint8_t *pattern, uint8_t *mask) 381{ 382 unsigned int n; 383 384 n = src_x / 8; 385 386 /* 387 * This mask has bits set, where a pixel (ether 0 or 1) 388 * comes from the source bitmap. 389 */ 390 if (mask != NULL) { 391 *mask = (0xff 392 >> (8 - x_count)) 393 << (8 - x_count - dst_x); 394 } 395 396 if (n == (src_x + x_count - 1) / 8) { 397 /* All the pixels we want are in the same byte. */ 398 *pattern = src[n]; 399 if (dst_x >= src_x) 400 *pattern >>= (dst_x - src_x % 8); 401 else 402 *pattern <<= (src_x % 8 - dst_x); 403 } else { 404 /* The pixels we want are split into two bytes. */ 405 if (dst_x >= src_x % 8) { 406 *pattern = 407 src[n] << (8 - dst_x - src_x % 8) | 408 src[n + 1] >> (dst_x - src_x % 8); 409 } else { 410 *pattern = 411 src[n] << (src_x % 8 - dst_x) | 412 src[n + 1] >> (8 - src_x % 8 - dst_x); 413 } 414 } 415} 416 417static void 418vga_copy_bitmap_portion(uint8_t *pattern_2colors, uint8_t *pattern_ncolors, 419 const uint8_t *src, const uint8_t *src_mask, unsigned int src_width, 420 unsigned int src_x, unsigned int dst_x, unsigned int x_count, 421 unsigned int src_y, unsigned int dst_y, unsigned int y_count, 422 term_color_t fg, term_color_t bg, int overwrite) 423{ 424 unsigned int i, bytes; 425 uint8_t pattern, relevant_bits, mask; 426 427 bytes = (src_width + 7) / 8; 428 429 for (i = 0; i < y_count; ++i) { 430 vga_compute_shifted_pattern(src + (src_y + i) * bytes, 431 bytes, src_x, x_count, dst_x, &pattern, &relevant_bits); 432 433 if (src_mask == NULL) { 434 /* 435 * No src mask. Consider that all wanted bits 436 * from the source are "authoritative". 437 */ 438 mask = relevant_bits; 439 } else { 440 /* 441 * There's an src mask. We shift it the same way 442 * we shifted the source pattern. 443 */ 444 vga_compute_shifted_pattern( 445 src_mask + (src_y + i) * bytes, 446 bytes, src_x, x_count, dst_x, 447 &mask, NULL); 448 449 /* Now, only keep the wanted bits among them. */ 450 mask &= relevant_bits; 451 } 452 453 /* 454 * Clear bits from the pattern which must be 455 * transparent, according to the source mask. 456 */ 457 pattern &= mask; 458 459 /* Set the bits in the 2-colors array. */ 460 if (overwrite) 461 pattern_2colors[dst_y + i] &= ~mask; 462 pattern_2colors[dst_y + i] |= pattern; 463 464 if (pattern_ncolors == NULL) 465 continue; 466 467 /* 468 * Set the same bits in the n-colors array. This one 469 * supports transparency, when a given bit is cleared in 470 * all colors. 471 */ 472 if (overwrite) { 473 /* 474 * Ensure that the pixels used by this bitmap are 475 * cleared in other colors. 476 */ 477 for (int j = 0; j < 16; ++j) 478 pattern_ncolors[(dst_y + i) * 16 + j] &= 479 ~mask; 480 } 481 pattern_ncolors[(dst_y + i) * 16 + fg] |= pattern; 482 pattern_ncolors[(dst_y + i) * 16 + bg] |= (~pattern & mask); 483 } 484} 485 486static void 487vga_bitblt_pixels_block_2colors(struct vt_device *vd, const uint8_t *masks, 488 term_color_t fg, term_color_t bg, 489 unsigned int x, unsigned int y, unsigned int height) 490{ 491 unsigned int i, offset; 492 struct vga_softc *sc; 493 494 /* 495 * The great advantage of Write Mode 3 is that we just need 496 * to load the foreground in the Set/Reset register, load the 497 * background color in the latches register (this is done 498 * through a write in offscreen memory followed by a read of 499 * that data), then write the pattern to video memory. This 500 * pattern indicates if the pixel should use the foreground 501 * color (bit set) or the background color (bit cleared). 502 */ 503 504 vga_setbg(vd, bg); 505 vga_setfg(vd, fg); 506 507 sc = vd->vd_softc; 508 offset = (VT_VGA_WIDTH * y + x) / 8; 509 510 for (i = 0; i < height; ++i, offset += VT_VGA_WIDTH / 8) { 511 MEM_WRITE1(sc, offset, masks[i]); 512 } 513} 514 515static void 516vga_bitblt_pixels_block_ncolors(struct vt_device *vd, const uint8_t *masks, 517 unsigned int x, unsigned int y, unsigned int height) 518{ 519 unsigned int i, j, plan, color, offset; 520 struct vga_softc *sc; 521 uint8_t mask, plans[height * 4]; 522 523 sc = vd->vd_softc; 524 525 memset(plans, 0, sizeof(plans)); 526 527 /* 528 * To write a group of pixels using 3 or more colors, we select 529 * Write Mode 0 and write one byte to each plan separately. 530 */ 531 532 /* 533 * We first compute each byte: each plan contains one bit of the 534 * color code for each of the 8 pixels. 535 * 536 * For example, if the 8 pixels are like this: 537 * GBBBBBBY 538 * where: 539 * G (gray) = 0b0111 540 * B (black) = 0b0000 541 * Y (yellow) = 0b0011 542 * 543 * The corresponding for bytes are: 544 * GBBBBBBY 545 * Plan 0: 10000001 = 0x81 546 * Plan 1: 10000001 = 0x81 547 * Plan 2: 10000000 = 0x80 548 * Plan 3: 00000000 = 0x00 549 * | | | 550 * | | +-> 0b0011 (Y) 551 * | +-----> 0b0000 (B) 552 * +--------> 0b0111 (G) 553 */ 554 555 for (i = 0; i < height; ++i) { 556 for (color = 0; color < 16; ++color) { 557 mask = masks[i * 16 + color]; 558 if (mask == 0x00) 559 continue; 560 561 for (j = 0; j < 8; ++j) { 562 if (!((mask >> (7 - j)) & 0x1)) 563 continue; 564 565 /* The pixel "j" uses color "color". */ 566 for (plan = 0; plan < 4; ++plan) 567 plans[i * 4 + plan] |= 568 ((color >> plan) & 0x1) << (7 - j); 569 } 570 } 571 } 572 573 /* 574 * The bytes are ready: we now switch to Write Mode 0 and write 575 * all bytes, one plan at a time. 576 */ 577 vga_setwmode(vd, 0); 578 579 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 580 for (plan = 0; plan < 4; ++plan) { 581 /* Select plan. */ 582 REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plan); 583 584 /* Write all bytes for this plan, from Y to Y+height. */ 585 for (i = 0; i < height; ++i) { 586 offset = (VT_VGA_WIDTH * (y + i) + x) / 8; 587 MEM_WRITE1(sc, offset, plans[i * 4 + plan]); 588 } 589 } 590} 591 592static void 593vga_bitblt_one_text_pixels_block(struct vt_device *vd, 594 const struct vt_window *vw, unsigned int x, unsigned int y) 595{ 596 const struct vt_buf *vb; 597 const struct vt_font *vf; 598 unsigned int i, col, row, src_x, x_count; 599 unsigned int used_colors_list[16], used_colors; 600 uint8_t pattern_2colors[vw->vw_font->vf_height]; 601 uint8_t pattern_ncolors[vw->vw_font->vf_height * 16]; 602 term_char_t c; 603 term_color_t fg, bg; 604 const uint8_t *src; 605 606 vb = &vw->vw_buf; 607 vf = vw->vw_font; 608 609 /* 610 * The current pixels block. 611 * 612 * We fill it with portions of characters, because both "grids" 613 * may not match. 614 * 615 * i is the index in this pixels block. 616 */ 617 618 i = x; 619 used_colors = 0; 620 memset(used_colors_list, 0, sizeof(used_colors_list)); 621 memset(pattern_2colors, 0, sizeof(pattern_2colors)); 622 memset(pattern_ncolors, 0, sizeof(pattern_ncolors)); 623 624 if (i < vw->vw_draw_area.tr_begin.tp_col) { 625 /* 626 * i is in the margin used to center the text area on 627 * the screen. 628 */ 629 630 i = vw->vw_draw_area.tr_begin.tp_col; 631 } 632 633 while (i < x + VT_VGA_PIXELS_BLOCK && 634 i < vw->vw_draw_area.tr_end.tp_col) { 635 /* 636 * Find which character is drawn on this pixel in the 637 * pixels block. 638 * 639 * While here, record what colors it uses. 640 */ 641 642 col = (i - vw->vw_draw_area.tr_begin.tp_col) / vf->vf_width; 643 row = (y - vw->vw_draw_area.tr_begin.tp_row) / vf->vf_height; 644 645 c = VTBUF_GET_FIELD(vb, row, col); 646 src = vtfont_lookup(vf, c); 647 648 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), &fg, &bg); 649 if ((used_colors_list[fg] & 0x1) != 0x1) 650 used_colors++; 651 if ((used_colors_list[bg] & 0x2) != 0x2) 652 used_colors++; 653 used_colors_list[fg] |= 0x1; 654 used_colors_list[bg] |= 0x2; 655 656 /* 657 * Compute the portion of the character we want to draw, 658 * because the pixels block may start in the middle of a 659 * character. 660 * 661 * The first pixel to draw in the character is 662 * the current position - 663 * the start position of the character 664 * 665 * The last pixel to draw is either 666 * - the last pixel of the character, or 667 * - the pixel of the character matching the end of 668 * the pixels block 669 * whichever comes first. This position is then 670 * changed to be relative to the start position of the 671 * character. 672 */ 673 674 src_x = i - 675 (col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col); 676 x_count = min(min( 677 (col + 1) * vf->vf_width + 678 vw->vw_draw_area.tr_begin.tp_col, 679 x + VT_VGA_PIXELS_BLOCK), 680 vw->vw_draw_area.tr_end.tp_col); 681 x_count -= col * vf->vf_width + 682 vw->vw_draw_area.tr_begin.tp_col; 683 x_count -= src_x; 684 685 /* Copy a portion of the character. */ 686 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 687 src, NULL, vf->vf_width, 688 src_x, i % VT_VGA_PIXELS_BLOCK, x_count, 689 0, 0, vf->vf_height, fg, bg, 0); 690 691 /* We move to the next portion. */ 692 i += x_count; 693 } 694 695#ifndef SC_NO_CUTPASTE 696 /* 697 * Copy the mouse pointer bitmap if it's over the current pixels 698 * block. 699 * 700 * We use the saved cursor position (saved in vt_flush()), because 701 * the current position could be different than the one used 702 * to mark the area dirty. 703 */ 704 term_rect_t drawn_area; 705 706 drawn_area.tr_begin.tp_col = x; 707 drawn_area.tr_begin.tp_row = y; 708 drawn_area.tr_end.tp_col = x + VT_VGA_PIXELS_BLOCK; 709 drawn_area.tr_end.tp_row = y + vf->vf_height; 710 if (vd->vd_mshown && vt_is_cursor_in_area(vd, &drawn_area)) { 711 struct vt_mouse_cursor *cursor; 712 unsigned int mx, my; 713 unsigned int dst_x, src_y, dst_y, y_count; 714 715 cursor = vd->vd_mcursor; 716 mx = vd->vd_mx_drawn + vw->vw_draw_area.tr_begin.tp_col; 717 my = vd->vd_my_drawn + vw->vw_draw_area.tr_begin.tp_row; 718 719 /* Compute the portion of the cursor we want to copy. */ 720 src_x = x > mx ? x - mx : 0; 721 dst_x = mx > x ? mx - x : 0; 722 x_count = min(min(min( 723 cursor->width - src_x, 724 x + VT_VGA_PIXELS_BLOCK - mx), 725 vw->vw_draw_area.tr_end.tp_col - mx), 726 VT_VGA_PIXELS_BLOCK); 727 728 /* 729 * The cursor isn't aligned on the Y-axis with 730 * characters, so we need to compute the vertical 731 * start/count. 732 */ 733 src_y = y > my ? y - my : 0; 734 dst_y = my > y ? my - y : 0; 735 y_count = min( 736 min(cursor->height - src_y, y + vf->vf_height - my), 737 vf->vf_height); 738 739 /* Copy the cursor portion. */ 740 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 741 cursor->map, cursor->mask, cursor->width, 742 src_x, dst_x, x_count, src_y, dst_y, y_count, 743 vd->vd_mcursor_fg, vd->vd_mcursor_bg, 1); 744 745 if ((used_colors_list[vd->vd_mcursor_fg] & 0x1) != 0x1) 746 used_colors++; 747 if ((used_colors_list[vd->vd_mcursor_bg] & 0x2) != 0x2) 748 used_colors++; 749 } 750#endif 751 752 /* 753 * The pixels block is completed, we can now draw it on the 754 * screen. 755 */ 756 if (used_colors == 2) 757 vga_bitblt_pixels_block_2colors(vd, pattern_2colors, fg, bg, 758 x, y, vf->vf_height); 759 else 760 vga_bitblt_pixels_block_ncolors(vd, pattern_ncolors, 761 x, y, vf->vf_height); 762} 763 764static void 765vga_bitblt_text_gfxmode(struct vt_device *vd, const struct vt_window *vw, 766 const term_rect_t *area) 767{ 768 const struct vt_font *vf; 769 unsigned int col, row; 770 unsigned int x1, y1, x2, y2, x, y; 771 772 vf = vw->vw_font; 773 774 /* 775 * Compute the top-left pixel position aligned with the video 776 * adapter pixels block size. 777 * 778 * This is calculated from the top-left column of te dirty area: 779 * 780 * 1. Compute the top-left pixel of the character: 781 * col * font width + x offset 782 * 783 * NOTE: x offset is used to center the text area on the 784 * screen. It's expressed in pixels, not in characters 785 * col/row! 786 * 787 * 2. Find the pixel further on the left marking the start of 788 * an aligned pixels block (eg. chunk of 8 pixels): 789 * character's x / blocksize * blocksize 790 * 791 * The division, being made on integers, achieves the 792 * alignment. 793 * 794 * For the Y-axis, we need to compute the character's y 795 * coordinate, but we don't need to align it. 796 */ 797 798 col = area->tr_begin.tp_col; 799 row = area->tr_begin.tp_row; 800 x1 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col) 801 / VT_VGA_PIXELS_BLOCK) 802 * VT_VGA_PIXELS_BLOCK; 803 y1 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 804 805 /* 806 * Compute the bottom right pixel position, again, aligned with 807 * the pixels block size. 808 * 809 * The same rules apply, we just add 1 to base the computation 810 * on the "right border" of the dirty area. 811 */ 812 813 col = area->tr_end.tp_col; 814 row = area->tr_end.tp_row; 815 x2 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col 816 + VT_VGA_PIXELS_BLOCK - 1) 817 / VT_VGA_PIXELS_BLOCK) 818 * VT_VGA_PIXELS_BLOCK; 819 y2 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 820 821 /* Clip the area to the screen size. */ 822 x2 = min(x2, vw->vw_draw_area.tr_end.tp_col); 823 y2 = min(y2, vw->vw_draw_area.tr_end.tp_row); 824 825 /* 826 * Now, we take care of N pixels line at a time (the first for 827 * loop, N = font height), and for these lines, draw one pixels 828 * block at a time (the second for loop), not a character at a 829 * time. 830 * 831 * Therefore, on the X-axis, characters my be drawn partially if 832 * they are not aligned on 8-pixels boundary. 833 * 834 * However, the operation is repeated for the full height of the 835 * font before moving to the next character, because it allows 836 * to keep the color settings and write mode, before perhaps 837 * changing them with the next one. 838 */ 839 840 for (y = y1; y < y2; y += vf->vf_height) { 841 for (x = x1; x < x2; x += VT_VGA_PIXELS_BLOCK) { 842 vga_bitblt_one_text_pixels_block(vd, vw, x, y); 843 } 844 } 845} 846 847static void 848vga_bitblt_text_txtmode(struct vt_device *vd, const struct vt_window *vw, 849 const term_rect_t *area) 850{ 851 struct vga_softc *sc; 852 const struct vt_buf *vb; 853 unsigned int col, row; 854 term_char_t c; 855 term_color_t fg, bg; 856 uint8_t ch, attr; 857 858 sc = vd->vd_softc; 859 vb = &vw->vw_buf; 860 861 for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 862 for (col = area->tr_begin.tp_col; 863 col < area->tr_end.tp_col; 864 ++col) { 865 /* 866 * Get next character and its associated fg/bg 867 * colors. 868 */ 869 c = VTBUF_GET_FIELD(vb, row, col); 870 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), 871 &fg, &bg); 872 873 /* 874 * Convert character to CP437, which is the 875 * character set used by the VGA hardware by 876 * default. 877 */ 878 ch = vga_get_cp437(TCHAR_CHARACTER(c)); 879 880 /* Convert colors to VGA attributes. */ 881 attr = bg << 4 | fg; 882 883 MEM_WRITE1(sc, (row * 80 + col) * 2 + 0, 884 ch); 885 MEM_WRITE1(sc, (row * 80 + col) * 2 + 1, 886 attr); 887 } 888 } 889} 890 891static void 892vga_bitblt_text(struct vt_device *vd, const struct vt_window *vw, 893 const term_rect_t *area) 894{ 895 896 if (!(vd->vd_flags & VDF_TEXTMODE)) { 897 vga_bitblt_text_gfxmode(vd, vw, area); 898 } else { 899 vga_bitblt_text_txtmode(vd, vw, area); 900 } 901} 902 903static void 904vga_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw, 905 const uint8_t *pattern, const uint8_t *mask, 906 unsigned int width, unsigned int height, 907 unsigned int x, unsigned int y, term_color_t fg, term_color_t bg) 908{ 909 unsigned int x1, y1, x2, y2, i, j, src_x, dst_x, x_count; 910 uint8_t pattern_2colors; 911 912 /* Align coordinates with the 8-pxels grid. */ 913 x1 = x / VT_VGA_PIXELS_BLOCK * VT_VGA_PIXELS_BLOCK; 914 y1 = y; 915 916 x2 = (x + width + VT_VGA_PIXELS_BLOCK - 1) / 917 VT_VGA_PIXELS_BLOCK * VT_VGA_PIXELS_BLOCK; 918 y2 = y + height; 919 x2 = min(x2, vd->vd_width - 1); 920 y2 = min(y2, vd->vd_height - 1); 921 922 for (j = y1; j < y2; ++j) { 923 src_x = 0; 924 dst_x = x - x1; 925 x_count = VT_VGA_PIXELS_BLOCK - dst_x; 926 927 for (i = x1; i < x2; i += VT_VGA_PIXELS_BLOCK) { 928 pattern_2colors = 0; 929 930 vga_copy_bitmap_portion( 931 &pattern_2colors, NULL, 932 pattern, mask, width, 933 src_x, dst_x, x_count, 934 j - y1, 0, 1, fg, bg, 0); 935 936 vga_bitblt_pixels_block_2colors(vd, 937 &pattern_2colors, fg, bg, 938 i, j, 1); 939 940 src_x += x_count; 941 dst_x = (dst_x + x_count) % VT_VGA_PIXELS_BLOCK; 942 x_count = min(width - src_x, VT_VGA_PIXELS_BLOCK); 943 } 944 } 945} 946 947static void 948vga_initialize_graphics(struct vt_device *vd) 949{ 950 struct vga_softc *sc = vd->vd_softc; 951 952 /* Clock select. */ 953 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP | 954 VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA); 955 /* Set sequencer clocking and memory mode. */ 956 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE); 957 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89); 958 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE); 959 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM); 960 961 /* Set the graphics controller in graphics mode. */ 962 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS); 963 REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA); 964 /* Program the CRT controller. */ 965 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL); 966 REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f); /* 760 */ 967 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END); 968 REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */ 969 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK); 970 REG_WRITE1(sc, VGA_CRTC_DATA, 0x50); /* 640 */ 971 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK); 972 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2); 973 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE); 974 REG_WRITE1(sc, VGA_CRTC_DATA, 0x54); /* 672 */ 975 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE); 976 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0); 977 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL); 978 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b); /* 523 */ 979 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW); 980 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 | 981 VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8); 982 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE); 983 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9); 984 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START); 985 REG_WRITE1(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */ 986 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 987 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c); 988 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END); 989 REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/ 990 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET); 991 REG_WRITE1(sc, VGA_CRTC_DATA, 0x28); 992 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK); 993 REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */ 994 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK); 995 REG_WRITE1(sc, VGA_CRTC_DATA, 0x04); 996 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 997 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW | 998 VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS); 999 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE); 1000 REG_WRITE1(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */ 1001 1002 REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0); 1003 1004 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 1005 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 1006 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 1007 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT); 1008 REG_WRITE1(sc, VGA_SEQ_DATA, 0); 1009 1010 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1011 REG_WRITE1(sc, VGA_GC_DATA, 0); 1012 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1013 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1014 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE); 1015 REG_WRITE1(sc, VGA_GC_DATA, 0); 1016 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE); 1017 REG_WRITE1(sc, VGA_GC_DATA, 0); 1018 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT); 1019 REG_WRITE1(sc, VGA_GC_DATA, 0); 1020 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1021 REG_WRITE1(sc, VGA_GC_DATA, 0); 1022 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE); 1023 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1024 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK); 1025 REG_WRITE1(sc, VGA_GC_DATA, 0xff); 1026} 1027 1028static void 1029vga_initialize(struct vt_device *vd, int textmode) 1030{ 1031 struct vga_softc *sc = vd->vd_softc; 1032 uint8_t x; 1033 1034 /* Make sure the VGA adapter is not in monochrome emulation mode. */ 1035 x = REG_READ1(sc, VGA_GEN_MISC_OUTPUT_R); 1036 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA); 1037 1038 /* Unprotect CRTC registers 0-7. */ 1039 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1040 x = REG_READ1(sc, VGA_CRTC_DATA); 1041 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR); 1042 1043 /* 1044 * Wait for the vertical retrace. 1045 * NOTE: this code reads the VGA_GEN_INPUT_STAT_1 register, which has 1046 * the side-effect of clearing the internal flip-flip of the attribute 1047 * controller's write register. This means that because this code is 1048 * here, we know for sure that the first write to the attribute 1049 * controller will be a write to the address register. Removing this 1050 * code therefore also removes that guarantee and appropriate measures 1051 * need to be taken. 1052 */ 1053 do { 1054 x = REG_READ1(sc, VGA_GEN_INPUT_STAT_1); 1055 x &= VGA_GEN_IS1_VR | VGA_GEN_IS1_DE; 1056 } while (x != (VGA_GEN_IS1_VR | VGA_GEN_IS1_DE)); 1057 1058 /* Now, disable the sync. signals. */ 1059 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1060 x = REG_READ1(sc, VGA_CRTC_DATA); 1061 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR); 1062 1063 /* Asynchronous sequencer reset. */ 1064 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1065 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR); 1066 1067 if (!textmode) 1068 vga_initialize_graphics(vd); 1069 1070 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN); 1071 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1072 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START); 1073 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO); 1074 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END); 1075 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1076 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH); 1077 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1078 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW); 1079 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1080 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH); 1081 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1082 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW); 1083 REG_WRITE1(sc, VGA_CRTC_DATA, 0x59); 1084 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC); 1085 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL); 1086 1087 if (textmode) { 1088 /* Set the attribute controller to blink disable. */ 1089 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1090 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1091 } else { 1092 /* Set the attribute controller in graphics mode. */ 1093 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1094 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA); 1095 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING); 1096 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1097 } 1098 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0)); 1099 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1100 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1)); 1101 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R); 1102 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2)); 1103 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G); 1104 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3)); 1105 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R); 1106 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4)); 1107 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B); 1108 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5)); 1109 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B); 1110 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6)); 1111 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B); 1112 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7)); 1113 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1114 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8)); 1115 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1116 VGA_AC_PAL_SB); 1117 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9)); 1118 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1119 VGA_AC_PAL_SB | VGA_AC_PAL_R); 1120 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10)); 1121 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1122 VGA_AC_PAL_SB | VGA_AC_PAL_G); 1123 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11)); 1124 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1125 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G); 1126 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12)); 1127 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1128 VGA_AC_PAL_SB | VGA_AC_PAL_B); 1129 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13)); 1130 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1131 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_B); 1132 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14)); 1133 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1134 VGA_AC_PAL_SB | VGA_AC_PAL_G | VGA_AC_PAL_B); 1135 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15)); 1136 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1137 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1138 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR); 1139 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1140 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE); 1141 REG_WRITE1(sc, VGA_AC_WRITE, 0x0f); 1142 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT); 1143 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1144 1145 if (!textmode) { 1146 u_int ofs; 1147 1148 /* 1149 * Done. Clear the frame buffer. All bit planes are 1150 * enabled, so a single-paged loop should clear all 1151 * planes. 1152 */ 1153 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) { 1154 MEM_WRITE1(sc, ofs, 0); 1155 } 1156 } 1157 1158 /* Re-enable the sequencer. */ 1159 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1160 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR); 1161 /* Re-enable the sync signals. */ 1162 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1163 x = REG_READ1(sc, VGA_CRTC_DATA); 1164 REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR); 1165 1166 if (!textmode) { 1167 /* Switch to write mode 3, because we'll mainly do bitblt. */ 1168 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1169 REG_WRITE1(sc, VGA_GC_DATA, 3); 1170 sc->vga_wmode = 3; 1171 1172 /* 1173 * In Write Mode 3, Enable Set/Reset is ignored, but we 1174 * use Write Mode 0 to write a group of 8 pixels using 1175 * 3 or more colors. In this case, we want to disable 1176 * Set/Reset: set Enable Set/Reset to 0. 1177 */ 1178 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1179 REG_WRITE1(sc, VGA_GC_DATA, 0x00); 1180 1181 /* 1182 * Clear the colors we think are loaded into Set/Reset or 1183 * the latches. 1184 */ 1185 sc->vga_curfg = sc->vga_curbg = 0xff; 1186 } 1187} 1188 1189static int 1190vga_probe(struct vt_device *vd) 1191{ 1192 1193 return (CN_INTERNAL); 1194} 1195 1196static int 1197vga_init(struct vt_device *vd) 1198{ 1199 struct vga_softc *sc; 1200 int textmode; 1201 1202 if (vd->vd_softc == NULL) 1203 vd->vd_softc = (void *)&vga_conssoftc; 1204 sc = vd->vd_softc; 1205 1206#if defined(__amd64__) || defined(__i386__) 1207 sc->vga_fb_tag = X86_BUS_SPACE_MEM; 1208 sc->vga_reg_tag = X86_BUS_SPACE_IO; 1209#elif defined(__ia64__) 1210 sc->vga_fb_tag = IA64_BUS_SPACE_MEM; 1211 sc->vga_fb_handle = IA64_PHYS_TO_RR6(VGA_MEM_BASE); 1212 sc->vga_reg_tag = IA64_BUS_SPACE_IO; 1213 sc->vga_reg_handle = VGA_REG_BASE; 1214#else 1215# error "Architecture not yet supported!" 1216#endif 1217 1218 bus_space_map(sc->vga_reg_tag, VGA_REG_BASE, VGA_REG_SIZE, 0, 1219 &sc->vga_reg_handle); 1220 1221 /* 1222 * If "hw.vga.textmode" is not set and we're running on hypervisor, 1223 * we use text mode by default, this is because when we're on 1224 * hypervisor, vt(4) is usually much slower in graphics mode than 1225 * in text mode, especially when we're on Hyper-V. 1226 */ 1227 textmode = vm_guest != VM_GUEST_NO; 1228 TUNABLE_INT_FETCH("hw.vga.textmode", &textmode); 1229 if (textmode) { 1230 vd->vd_flags |= VDF_TEXTMODE; 1231 vd->vd_width = 80; 1232 vd->vd_height = 25; 1233 bus_space_map(sc->vga_fb_tag, VGA_TXT_BASE, VGA_TXT_SIZE, 0, 1234 &sc->vga_fb_handle); 1235 } else { 1236 vd->vd_width = VT_VGA_WIDTH; 1237 vd->vd_height = VT_VGA_HEIGHT; 1238 bus_space_map(sc->vga_fb_tag, VGA_MEM_BASE, VGA_MEM_SIZE, 0, 1239 &sc->vga_fb_handle); 1240 } 1241 vga_initialize(vd, textmode); 1242 1243 return (CN_INTERNAL); 1244} 1245 1246static void 1247vga_postswitch(struct vt_device *vd) 1248{ 1249 1250 /* Reinit VGA mode, to restore view after app which change mode. */ 1251 vga_initialize(vd, (vd->vd_flags & VDF_TEXTMODE)); 1252 /* Ask vt(9) to update chars on visible area. */ 1253 vd->vd_flags |= VDF_INVALID; 1254} 1255