1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <sys/cdefs.h> 18__FBSDID("$FreeBSD: stable/10/sys/dev/usb/wlan/if_urtw.c 343760 2019-02-05 03:01:10Z avos $"); 19#include <sys/param.h> 20#include <sys/sockio.h> 21#include <sys/sysctl.h> 22#include <sys/lock.h> 23#include <sys/mutex.h> 24#include <sys/mbuf.h> 25#include <sys/kernel.h> 26#include <sys/socket.h> 27#include <sys/systm.h> 28#include <sys/malloc.h> 29#include <sys/module.h> 30#include <sys/bus.h> 31#include <sys/endian.h> 32#include <sys/kdb.h> 33 34#include <net/if.h> 35#include <net/if_arp.h> 36#include <net/ethernet.h> 37#include <net/if_dl.h> 38#include <net/if_media.h> 39#include <net/if_types.h> 40 41#ifdef INET 42#include <netinet/in.h> 43#include <netinet/in_systm.h> 44#include <netinet/in_var.h> 45#include <netinet/if_ether.h> 46#include <netinet/ip.h> 47#endif 48 49#include <net80211/ieee80211_var.h> 50#include <net80211/ieee80211_regdomain.h> 51#include <net80211/ieee80211_radiotap.h> 52 53#include <dev/usb/usb.h> 54#include <dev/usb/usbdi.h> 55#include "usbdevs.h" 56 57#include <dev/usb/wlan/if_urtwreg.h> 58#include <dev/usb/wlan/if_urtwvar.h> 59 60static SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 61#ifdef URTW_DEBUG 62int urtw_debug = 0; 63SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RW | CTLFLAG_TUN, &urtw_debug, 0, 64 "control debugging printfs"); 65TUNABLE_INT("hw.usb.urtw.debug", &urtw_debug); 66enum { 67 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 68 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */ 69 URTW_DEBUG_RESET = 0x00000004, /* reset processing */ 70 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */ 71 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */ 72 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */ 73 URTW_DEBUG_STAT = 0x00000040, /* statistic */ 74 URTW_DEBUG_INIT = 0x00000080, /* initialization of dev */ 75 URTW_DEBUG_TXSTATUS = 0x00000100, /* tx status */ 76 URTW_DEBUG_ANY = 0xffffffff 77}; 78#define DPRINTF(sc, m, fmt, ...) do { \ 79 if (sc->sc_debug & (m)) \ 80 printf(fmt, __VA_ARGS__); \ 81} while (0) 82#else 83#define DPRINTF(sc, m, fmt, ...) do { \ 84 (void) sc; \ 85} while (0) 86#endif 87static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG; 88SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RW | CTLFLAG_TUN, 89 &urtw_preamble_mode, 0, "set the preable mode (long or short)"); 90TUNABLE_INT("hw.usb.urtw.preamble_mode", &urtw_preamble_mode); 91 92/* recognized device vendors/products */ 93#define urtw_lookup(v, p) \ 94 ((const struct urtw_type *)usb_lookup(urtw_devs, v, p)) 95#define URTW_DEV_B(v,p) \ 96 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) } 97#define URTW_DEV_L(v,p) \ 98 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) } 99#define URTW_REV_RTL8187B 0 100#define URTW_REV_RTL8187L 1 101static const STRUCT_USB_HOST_ID urtw_devs[] = { 102 URTW_DEV_B(NETGEAR, WG111V3), 103 URTW_DEV_B(REALTEK, RTL8187B_0), 104 URTW_DEV_B(REALTEK, RTL8187B_1), 105 URTW_DEV_B(REALTEK, RTL8187B_2), 106 URTW_DEV_B(SITECOMEU, WL168V4), 107 URTW_DEV_L(ASUS, P5B_WIFI), 108 URTW_DEV_L(BELKIN, F5D7050E), 109 URTW_DEV_L(LINKSYS4, WUSB54GCV2), 110 URTW_DEV_L(NETGEAR, WG111V2), 111 URTW_DEV_L(REALTEK, RTL8187), 112 URTW_DEV_L(SITECOMEU, WL168V1), 113 URTW_DEV_L(SURECOM, EP9001G2A), 114 { USB_VPI(USB_VENDOR_OVISLINK, 0x8187, URTW_REV_RTL8187L) }, 115 { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) }, 116 { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) }, 117 { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) }, 118 { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) }, 119 { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) }, 120 { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) }, 121#undef URTW_DEV_L 122#undef URTW_DEV_B 123}; 124 125#define urtw_read8_m(sc, val, data) do { \ 126 error = urtw_read8_c(sc, val, data); \ 127 if (error != 0) \ 128 goto fail; \ 129} while (0) 130#define urtw_write8_m(sc, val, data) do { \ 131 error = urtw_write8_c(sc, val, data); \ 132 if (error != 0) \ 133 goto fail; \ 134} while (0) 135#define urtw_read16_m(sc, val, data) do { \ 136 error = urtw_read16_c(sc, val, data); \ 137 if (error != 0) \ 138 goto fail; \ 139} while (0) 140#define urtw_write16_m(sc, val, data) do { \ 141 error = urtw_write16_c(sc, val, data); \ 142 if (error != 0) \ 143 goto fail; \ 144} while (0) 145#define urtw_read32_m(sc, val, data) do { \ 146 error = urtw_read32_c(sc, val, data); \ 147 if (error != 0) \ 148 goto fail; \ 149} while (0) 150#define urtw_write32_m(sc, val, data) do { \ 151 error = urtw_write32_c(sc, val, data); \ 152 if (error != 0) \ 153 goto fail; \ 154} while (0) 155#define urtw_8187_write_phy_ofdm(sc, val, data) do { \ 156 error = urtw_8187_write_phy_ofdm_c(sc, val, data); \ 157 if (error != 0) \ 158 goto fail; \ 159} while (0) 160#define urtw_8187_write_phy_cck(sc, val, data) do { \ 161 error = urtw_8187_write_phy_cck_c(sc, val, data); \ 162 if (error != 0) \ 163 goto fail; \ 164} while (0) 165#define urtw_8225_write(sc, val, data) do { \ 166 error = urtw_8225_write_c(sc, val, data); \ 167 if (error != 0) \ 168 goto fail; \ 169} while (0) 170 171struct urtw_pair { 172 uint32_t reg; 173 uint32_t val; 174}; 175 176static uint8_t urtw_8225_agc[] = { 177 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 178 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 179 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 180 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 181 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 182 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 183 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 184 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 185 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 186 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 187 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 188 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 189}; 190 191static uint8_t urtw_8225z2_agc[] = { 192 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51, 193 0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 194 0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25, 195 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f, 196 0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 197 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19, 198 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23, 199 0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 200 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d, 201 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 202 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 203 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 204}; 205 206static uint32_t urtw_8225_channel[] = { 207 0x0000, /* dummy channel 0 */ 208 0x085c, /* 1 */ 209 0x08dc, /* 2 */ 210 0x095c, /* 3 */ 211 0x09dc, /* 4 */ 212 0x0a5c, /* 5 */ 213 0x0adc, /* 6 */ 214 0x0b5c, /* 7 */ 215 0x0bdc, /* 8 */ 216 0x0c5c, /* 9 */ 217 0x0cdc, /* 10 */ 218 0x0d5c, /* 11 */ 219 0x0ddc, /* 12 */ 220 0x0e5c, /* 13 */ 221 0x0f72, /* 14 */ 222}; 223 224static uint8_t urtw_8225_gain[] = { 225 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 226 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 227 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 228 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 229 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 230 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 231 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 232}; 233 234static struct urtw_pair urtw_8225_rf_part1[] = { 235 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 236 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 237 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, 238 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 }, 239}; 240 241static struct urtw_pair urtw_8225_rf_part2[] = { 242 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 243 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 244 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 245 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 246 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, 247 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef }, 248 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 }, 249 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 }, 250 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 }, 251 { 0x27, 0x88 } 252}; 253 254static struct urtw_pair urtw_8225_rf_part3[] = { 255 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 256 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b }, 257 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, 258 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d }, 259 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e }, 260 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a }, 261 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 } 262}; 263 264static uint16_t urtw_8225_rxgain[] = { 265 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 266 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 267 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 268 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 269 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 270 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 271 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 272 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 273 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 274 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 275 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 276 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 277}; 278 279static uint8_t urtw_8225_threshold[] = { 280 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, 281}; 282 283static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 284 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 285}; 286 287static uint8_t urtw_8225_txpwr_cck[] = { 288 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 289 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 290 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 291 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 292 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 293 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 294}; 295 296static uint8_t urtw_8225_txpwr_cck_ch14[] = { 297 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 298 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 299 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 300 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 301 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 302 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 303}; 304 305static uint8_t urtw_8225_txpwr_ofdm[]={ 306 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 307}; 308 309static uint8_t urtw_8225v2_gain_bg[]={ 310 0x23, 0x15, 0xa5, /* -82-1dbm */ 311 0x23, 0x15, 0xb5, /* -82-2dbm */ 312 0x23, 0x15, 0xc5, /* -82-3dbm */ 313 0x33, 0x15, 0xc5, /* -78dbm */ 314 0x43, 0x15, 0xc5, /* -74dbm */ 315 0x53, 0x15, 0xc5, /* -70dbm */ 316 0x63, 0x15, 0xc5, /* -66dbm */ 317}; 318 319static struct urtw_pair urtw_8225v2_rf_part1[] = { 320 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 321 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 322 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 323 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 324}; 325 326static struct urtw_pair urtw_8225v2b_rf_part0[] = { 327 { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 328 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 329 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 330 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 331}; 332 333static struct urtw_pair urtw_8225v2b_rf_part1[] = { 334 {0x0f0, 0x32}, {0x0f1, 0x32}, {0x0f2, 0x00}, 335 {0x0f3, 0x00}, {0x0f4, 0x32}, {0x0f5, 0x43}, 336 {0x0f6, 0x00}, {0x0f7, 0x00}, {0x0f8, 0x46}, 337 {0x0f9, 0xa4}, {0x0fa, 0x00}, {0x0fb, 0x00}, 338 {0x0fc, 0x96}, {0x0fd, 0xa4}, {0x0fe, 0x00}, 339 {0x0ff, 0x00}, {0x158, 0x4b}, {0x159, 0x00}, 340 {0x15a, 0x4b}, {0x15b, 0x00}, {0x160, 0x4b}, 341 {0x161, 0x09}, {0x162, 0x4b}, {0x163, 0x09}, 342 {0x1ce, 0x0f}, {0x1cf, 0x00}, {0x1e0, 0xff}, 343 {0x1e1, 0x0f}, {0x1e2, 0x00}, {0x1f0, 0x4e}, 344 {0x1f1, 0x01}, {0x1f2, 0x02}, {0x1f3, 0x03}, 345 {0x1f4, 0x04}, {0x1f5, 0x05}, {0x1f6, 0x06}, 346 {0x1f7, 0x07}, {0x1f8, 0x08}, {0x24e, 0x00}, 347 {0x20c, 0x04}, {0x221, 0x61}, {0x222, 0x68}, 348 {0x223, 0x6f}, {0x224, 0x76}, {0x225, 0x7d}, 349 {0x226, 0x84}, {0x227, 0x8d}, {0x24d, 0x08}, 350 {0x250, 0x05}, {0x251, 0xf5}, {0x252, 0x04}, 351 {0x253, 0xa0}, {0x254, 0x1f}, {0x255, 0x23}, 352 {0x256, 0x45}, {0x257, 0x67}, {0x258, 0x08}, 353 {0x259, 0x08}, {0x25a, 0x08}, {0x25b, 0x08}, 354 {0x260, 0x08}, {0x261, 0x08}, {0x262, 0x08}, 355 {0x263, 0x08}, {0x264, 0xcf}, {0x272, 0x56}, 356 {0x273, 0x9a}, {0x034, 0xf0}, {0x035, 0x0f}, 357 {0x05b, 0x40}, {0x084, 0x88}, {0x085, 0x24}, 358 {0x088, 0x54}, {0x08b, 0xb8}, {0x08c, 0x07}, 359 {0x08d, 0x00}, {0x094, 0x1b}, {0x095, 0x12}, 360 {0x096, 0x00}, {0x097, 0x06}, {0x09d, 0x1a}, 361 {0x09f, 0x10}, {0x0b4, 0x22}, {0x0be, 0x80}, 362 {0x0db, 0x00}, {0x0ee, 0x00}, {0x091, 0x03}, 363 {0x24c, 0x00}, {0x39f, 0x00}, {0x08c, 0x01}, 364 {0x08d, 0x10}, {0x08e, 0x08}, {0x08f, 0x00} 365}; 366 367static struct urtw_pair urtw_8225v2_rf_part2[] = { 368 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 369 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 370 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 }, 371 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, 372 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 }, 373 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, 374 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 }, 375 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 }, 376 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 }, 377 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 } 378}; 379 380static struct urtw_pair urtw_8225v2b_rf_part2[] = { 381 { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 }, 382 { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 }, 383 { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 }, 384 { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 }, 385 { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 }, 386 { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 }, 387 { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 }, 388 { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 }, 389 { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a }, 390 { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f }, 391 { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 }, 392 { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 }, 393 { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 }, 394 { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e }, 395 { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 } 396}; 397 398static struct urtw_pair urtw_8225v2_rf_part3[] = { 399 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 400 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 }, 401 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 }, 402 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 }, 403 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d }, 404 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 }, 405 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 }, 406 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 } 407}; 408 409static uint16_t urtw_8225v2_rxgain[] = { 410 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 411 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 412 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 413 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 414 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 415 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 416 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 417 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 418 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 419 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 420 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 421 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 422}; 423 424static uint16_t urtw_8225v2b_rxgain[] = { 425 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 426 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 427 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 428 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 429 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 430 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 431 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 432 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 433 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 434 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 435 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 436 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 437}; 438 439static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 440 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 441 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 442 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 443 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 444 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 445 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 446}; 447 448static uint8_t urtw_8225v2_txpwr_cck[] = { 449 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 450}; 451 452static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 453 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 454}; 455 456static uint8_t urtw_8225v2b_txpwr_cck[] = { 457 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 458 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 459 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 460 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 461}; 462 463static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 464 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 465 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 466 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 467 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 468}; 469 470static struct urtw_pair urtw_ratetable[] = { 471 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 472 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 473 { 96, 10 }, { 108, 11 } 474}; 475 476#if 0 477static const uint8_t urtw_8187b_reg_table[][3] = { 478 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 479 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 480 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 481 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 482 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 483 { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, 484 { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, 485 { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, 486 { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, 487 { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, 488 { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, 489 { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, 490 { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 }, 491 { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 }, 492 { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 }, 493 { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 }, 494 { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 }, 495 { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 }, 496 { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 }, 497 { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 }, 498 { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 }, 499 { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 }, 500 { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, 501 { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, 502 { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, 503 { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, 504 { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, 505 { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, 506 { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 507 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 508 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 509}; 510#endif 511 512static usb_callback_t urtw_bulk_rx_callback; 513static usb_callback_t urtw_bulk_tx_callback; 514static usb_callback_t urtw_bulk_tx_status_callback; 515 516static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 517 [URTW_8187B_BULK_RX] = { 518 .type = UE_BULK, 519 .endpoint = 0x83, 520 .direction = UE_DIR_IN, 521 .bufsize = MCLBYTES, 522 .flags = { 523 .ext_buffer = 1, 524 .pipe_bof = 1, 525 .short_xfer_ok = 1 526 }, 527 .callback = urtw_bulk_rx_callback 528 }, 529 [URTW_8187B_BULK_TX_STATUS] = { 530 .type = UE_BULK, 531 .endpoint = 0x89, 532 .direction = UE_DIR_IN, 533 .bufsize = sizeof(uint64_t), 534 .flags = { 535 .pipe_bof = 1, 536 .short_xfer_ok = 1 537 }, 538 .callback = urtw_bulk_tx_status_callback 539 }, 540 [URTW_8187B_BULK_TX_BE] = { 541 .type = UE_BULK, 542 .endpoint = URTW_8187B_TXPIPE_BE, 543 .direction = UE_DIR_OUT, 544 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 545 .flags = { 546 .force_short_xfer = 1, 547 .pipe_bof = 1, 548 }, 549 .callback = urtw_bulk_tx_callback, 550 .timeout = URTW_DATA_TIMEOUT 551 }, 552 [URTW_8187B_BULK_TX_BK] = { 553 .type = UE_BULK, 554 .endpoint = URTW_8187B_TXPIPE_BK, 555 .direction = UE_DIR_OUT, 556 .bufsize = URTW_TX_MAXSIZE, 557 .flags = { 558 .ext_buffer = 1, 559 .force_short_xfer = 1, 560 .pipe_bof = 1, 561 }, 562 .callback = urtw_bulk_tx_callback, 563 .timeout = URTW_DATA_TIMEOUT 564 }, 565 [URTW_8187B_BULK_TX_VI] = { 566 .type = UE_BULK, 567 .endpoint = URTW_8187B_TXPIPE_VI, 568 .direction = UE_DIR_OUT, 569 .bufsize = URTW_TX_MAXSIZE, 570 .flags = { 571 .ext_buffer = 1, 572 .force_short_xfer = 1, 573 .pipe_bof = 1, 574 }, 575 .callback = urtw_bulk_tx_callback, 576 .timeout = URTW_DATA_TIMEOUT 577 }, 578 [URTW_8187B_BULK_TX_VO] = { 579 .type = UE_BULK, 580 .endpoint = URTW_8187B_TXPIPE_VO, 581 .direction = UE_DIR_OUT, 582 .bufsize = URTW_TX_MAXSIZE, 583 .flags = { 584 .ext_buffer = 1, 585 .force_short_xfer = 1, 586 .pipe_bof = 1, 587 }, 588 .callback = urtw_bulk_tx_callback, 589 .timeout = URTW_DATA_TIMEOUT 590 }, 591 [URTW_8187B_BULK_TX_EP12] = { 592 .type = UE_BULK, 593 .endpoint = 0xc, 594 .direction = UE_DIR_OUT, 595 .bufsize = URTW_TX_MAXSIZE, 596 .flags = { 597 .ext_buffer = 1, 598 .force_short_xfer = 1, 599 .pipe_bof = 1, 600 }, 601 .callback = urtw_bulk_tx_callback, 602 .timeout = URTW_DATA_TIMEOUT 603 } 604}; 605 606static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = { 607 [URTW_8187L_BULK_RX] = { 608 .type = UE_BULK, 609 .endpoint = 0x81, 610 .direction = UE_DIR_IN, 611 .bufsize = MCLBYTES, 612 .flags = { 613 .ext_buffer = 1, 614 .pipe_bof = 1, 615 .short_xfer_ok = 1 616 }, 617 .callback = urtw_bulk_rx_callback 618 }, 619 [URTW_8187L_BULK_TX_LOW] = { 620 .type = UE_BULK, 621 .endpoint = 0x2, 622 .direction = UE_DIR_OUT, 623 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 624 .flags = { 625 .force_short_xfer = 1, 626 .pipe_bof = 1, 627 }, 628 .callback = urtw_bulk_tx_callback, 629 .timeout = URTW_DATA_TIMEOUT 630 }, 631 [URTW_8187L_BULK_TX_NORMAL] = { 632 .type = UE_BULK, 633 .endpoint = 0x3, 634 .direction = UE_DIR_OUT, 635 .bufsize = URTW_TX_MAXSIZE, 636 .flags = { 637 .ext_buffer = 1, 638 .force_short_xfer = 1, 639 .pipe_bof = 1, 640 }, 641 .callback = urtw_bulk_tx_callback, 642 .timeout = URTW_DATA_TIMEOUT 643 }, 644}; 645 646static struct ieee80211vap *urtw_vap_create(struct ieee80211com *, 647 const char [IFNAMSIZ], int, enum ieee80211_opmode, 648 int, const uint8_t [IEEE80211_ADDR_LEN], 649 const uint8_t [IEEE80211_ADDR_LEN]); 650static void urtw_vap_delete(struct ieee80211vap *); 651static void urtw_init(void *); 652static void urtw_stop(struct ifnet *); 653static void urtw_stop_locked(struct ifnet *); 654static int urtw_ioctl(struct ifnet *, u_long, caddr_t); 655static void urtw_start(struct ifnet *); 656static int urtw_alloc_rx_data_list(struct urtw_softc *); 657static int urtw_alloc_tx_data_list(struct urtw_softc *); 658static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *, 659 const struct ieee80211_bpf_params *); 660static void urtw_scan_start(struct ieee80211com *); 661static void urtw_scan_end(struct ieee80211com *); 662static void urtw_set_channel(struct ieee80211com *); 663static void urtw_update_mcast(struct ifnet *); 664static int urtw_tx_start(struct urtw_softc *, 665 struct ieee80211_node *, struct mbuf *, 666 struct urtw_data *, int); 667static int urtw_newstate(struct ieee80211vap *, 668 enum ieee80211_state, int); 669static void urtw_led_ch(void *); 670static void urtw_ledtask(void *, int); 671static void urtw_watchdog(void *); 672static void urtw_set_multi(void *); 673static int urtw_isbmode(uint16_t); 674static uint16_t urtw_rate2rtl(uint32_t); 675static uint16_t urtw_rtl2rate(uint32_t); 676static usb_error_t urtw_set_rate(struct urtw_softc *); 677static usb_error_t urtw_update_msr(struct urtw_softc *); 678static usb_error_t urtw_read8_c(struct urtw_softc *, int, uint8_t *); 679static usb_error_t urtw_read16_c(struct urtw_softc *, int, uint16_t *); 680static usb_error_t urtw_read32_c(struct urtw_softc *, int, uint32_t *); 681static usb_error_t urtw_write8_c(struct urtw_softc *, int, uint8_t); 682static usb_error_t urtw_write16_c(struct urtw_softc *, int, uint16_t); 683static usb_error_t urtw_write32_c(struct urtw_softc *, int, uint32_t); 684static usb_error_t urtw_eprom_cs(struct urtw_softc *, int); 685static usb_error_t urtw_eprom_ck(struct urtw_softc *); 686static usb_error_t urtw_eprom_sendbits(struct urtw_softc *, int16_t *, 687 int); 688static usb_error_t urtw_eprom_read32(struct urtw_softc *, uint32_t, 689 uint32_t *); 690static usb_error_t urtw_eprom_readbit(struct urtw_softc *, int16_t *); 691static usb_error_t urtw_eprom_writebit(struct urtw_softc *, int16_t); 692static usb_error_t urtw_get_macaddr(struct urtw_softc *); 693static usb_error_t urtw_get_txpwr(struct urtw_softc *); 694static usb_error_t urtw_get_rfchip(struct urtw_softc *); 695static usb_error_t urtw_led_init(struct urtw_softc *); 696static usb_error_t urtw_8185_rf_pins_enable(struct urtw_softc *); 697static usb_error_t urtw_8185_tx_antenna(struct urtw_softc *, uint8_t); 698static usb_error_t urtw_8187_write_phy(struct urtw_softc *, uint8_t, 699 uint32_t); 700static usb_error_t urtw_8187_write_phy_ofdm_c(struct urtw_softc *, 701 uint8_t, uint32_t); 702static usb_error_t urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t, 703 uint32_t); 704static usb_error_t urtw_8225_setgain(struct urtw_softc *, int16_t); 705static usb_error_t urtw_8225_usb_init(struct urtw_softc *); 706static usb_error_t urtw_8225_write_c(struct urtw_softc *, uint8_t, 707 uint16_t); 708static usb_error_t urtw_8225_write_s16(struct urtw_softc *, uint8_t, int, 709 uint16_t *); 710static usb_error_t urtw_8225_read(struct urtw_softc *, uint8_t, 711 uint32_t *); 712static usb_error_t urtw_8225_rf_init(struct urtw_softc *); 713static usb_error_t urtw_8225_rf_set_chan(struct urtw_softc *, int); 714static usb_error_t urtw_8225_rf_set_sens(struct urtw_softc *, int); 715static usb_error_t urtw_8225_set_txpwrlvl(struct urtw_softc *, int); 716static usb_error_t urtw_8225_rf_stop(struct urtw_softc *); 717static usb_error_t urtw_8225v2_rf_init(struct urtw_softc *); 718static usb_error_t urtw_8225v2_rf_set_chan(struct urtw_softc *, int); 719static usb_error_t urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int); 720static usb_error_t urtw_8225v2_setgain(struct urtw_softc *, int16_t); 721static usb_error_t urtw_8225_isv2(struct urtw_softc *, int *); 722static usb_error_t urtw_8225v2b_rf_init(struct urtw_softc *); 723static usb_error_t urtw_8225v2b_rf_set_chan(struct urtw_softc *, int); 724static usb_error_t urtw_read8e(struct urtw_softc *, int, uint8_t *); 725static usb_error_t urtw_write8e(struct urtw_softc *, int, uint8_t); 726static usb_error_t urtw_8180_set_anaparam(struct urtw_softc *, uint32_t); 727static usb_error_t urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t); 728static usb_error_t urtw_intr_enable(struct urtw_softc *); 729static usb_error_t urtw_intr_disable(struct urtw_softc *); 730static usb_error_t urtw_reset(struct urtw_softc *); 731static usb_error_t urtw_led_on(struct urtw_softc *, int); 732static usb_error_t urtw_led_ctl(struct urtw_softc *, int); 733static usb_error_t urtw_led_blink(struct urtw_softc *); 734static usb_error_t urtw_led_mode0(struct urtw_softc *, int); 735static usb_error_t urtw_led_mode1(struct urtw_softc *, int); 736static usb_error_t urtw_led_mode2(struct urtw_softc *, int); 737static usb_error_t urtw_led_mode3(struct urtw_softc *, int); 738static usb_error_t urtw_rx_setconf(struct urtw_softc *); 739static usb_error_t urtw_rx_enable(struct urtw_softc *); 740static usb_error_t urtw_tx_enable(struct urtw_softc *sc); 741static void urtw_free_tx_data_list(struct urtw_softc *); 742static void urtw_free_rx_data_list(struct urtw_softc *); 743static void urtw_free_data_list(struct urtw_softc *, 744 struct urtw_data data[], int, int); 745static usb_error_t urtw_adapter_start(struct urtw_softc *); 746static usb_error_t urtw_adapter_start_b(struct urtw_softc *); 747static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t); 748static usb_error_t urtw_8187b_cmd_reset(struct urtw_softc *); 749static usb_error_t urtw_do_request(struct urtw_softc *, 750 struct usb_device_request *, void *); 751static usb_error_t urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int); 752static usb_error_t urtw_led_off(struct urtw_softc *, int); 753static void urtw_abort_xfers(struct urtw_softc *); 754static struct urtw_data * 755 urtw_getbuf(struct urtw_softc *sc); 756static int urtw_compute_txtime(uint16_t, uint16_t, uint8_t, 757 uint8_t); 758static void urtw_updateslot(struct ifnet *); 759static void urtw_updateslottask(void *, int); 760static void urtw_sysctl_node(struct urtw_softc *); 761 762static int 763urtw_match(device_t dev) 764{ 765 struct usb_attach_arg *uaa = device_get_ivars(dev); 766 767 if (uaa->usb_mode != USB_MODE_HOST) 768 return (ENXIO); 769 if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX) 770 return (ENXIO); 771 if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX) 772 return (ENXIO); 773 774 return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa)); 775} 776 777static int 778urtw_attach(device_t dev) 779{ 780 const struct usb_config *setup_start; 781 int ret = ENXIO; 782 struct urtw_softc *sc = device_get_softc(dev); 783 struct usb_attach_arg *uaa = device_get_ivars(dev); 784 struct ieee80211com *ic; 785 struct ifnet *ifp; 786 uint8_t bands, iface_index = URTW_IFACE_INDEX; /* XXX */ 787 uint16_t n_setup; 788 uint32_t data; 789 usb_error_t error; 790 791 device_set_usb_desc(dev); 792 793 sc->sc_dev = dev; 794 sc->sc_udev = uaa->device; 795 if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B) 796 sc->sc_flags |= URTW_RTL8187B; 797#ifdef URTW_DEBUG 798 sc->sc_debug = urtw_debug; 799#endif 800 801 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK, 802 MTX_DEF); 803 usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0); 804 TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc); 805 TASK_INIT(&sc->sc_updateslot_task, 0, urtw_updateslottask, sc); 806 callout_init(&sc->sc_watchdog_ch, 0); 807 808 if (sc->sc_flags & URTW_RTL8187B) { 809 setup_start = urtw_8187b_usbconfig; 810 n_setup = URTW_8187B_N_XFERS; 811 } else { 812 setup_start = urtw_8187l_usbconfig; 813 n_setup = URTW_8187L_N_XFERS; 814 } 815 816 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 817 setup_start, n_setup, sc, &sc->sc_mtx); 818 if (error) { 819 device_printf(dev, "could not allocate USB transfers, " 820 "err=%s\n", usbd_errstr(error)); 821 ret = ENXIO; 822 goto fail0; 823 } 824 825 if (sc->sc_flags & URTW_RTL8187B) { 826 sc->sc_tx_dma_buf = 827 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 828 URTW_8187B_BULK_TX_BE], 0); 829 } else { 830 sc->sc_tx_dma_buf = 831 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 832 URTW_8187L_BULK_TX_LOW], 0); 833 } 834 835 URTW_LOCK(sc); 836 837 urtw_read32_m(sc, URTW_RX, &data); 838 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 : 839 URTW_EEPROM_93C46; 840 841 error = urtw_get_rfchip(sc); 842 if (error != 0) 843 goto fail; 844 error = urtw_get_macaddr(sc); 845 if (error != 0) 846 goto fail; 847 error = urtw_get_txpwr(sc); 848 if (error != 0) 849 goto fail; 850 error = urtw_led_init(sc); 851 if (error != 0) 852 goto fail; 853 854 URTW_UNLOCK(sc); 855 856 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY; 857 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY; 858 sc->sc_currate = 3; 859 sc->sc_preamble_mode = urtw_preamble_mode; 860 861 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 862 if (ifp == NULL) { 863 device_printf(sc->sc_dev, "can not allocate ifnet\n"); 864 ret = ENOMEM; 865 goto fail1; 866 } 867 868 ifp->if_softc = sc; 869 if_initname(ifp, "urtw", device_get_unit(sc->sc_dev)); 870 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 871 ifp->if_init = urtw_init; 872 ifp->if_ioctl = urtw_ioctl; 873 ifp->if_start = urtw_start; 874 /* XXX URTW_TX_DATA_LIST_COUNT */ 875 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 876 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 877 IFQ_SET_READY(&ifp->if_snd); 878 879 ic = ifp->if_l2com; 880 ic->ic_ifp = ifp; 881 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 882 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 883 884 /* set device capabilities */ 885 ic->ic_caps = 886 IEEE80211_C_STA | /* station mode */ 887 IEEE80211_C_MONITOR | /* monitor mode supported */ 888 IEEE80211_C_TXPMGT | /* tx power management */ 889 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 890 IEEE80211_C_SHSLOT | /* short slot time supported */ 891 IEEE80211_C_BGSCAN | /* capable of bg scanning */ 892 IEEE80211_C_WPA; /* 802.11i */ 893 894 bands = 0; 895 setbit(&bands, IEEE80211_MODE_11B); 896 setbit(&bands, IEEE80211_MODE_11G); 897 ieee80211_init_channels(ic, NULL, &bands); 898 899 ieee80211_ifattach(ic, sc->sc_bssid); 900 ic->ic_raw_xmit = urtw_raw_xmit; 901 ic->ic_scan_start = urtw_scan_start; 902 ic->ic_scan_end = urtw_scan_end; 903 ic->ic_set_channel = urtw_set_channel; 904 ic->ic_updateslot = urtw_updateslot; 905 ic->ic_vap_create = urtw_vap_create; 906 ic->ic_vap_delete = urtw_vap_delete; 907 ic->ic_update_mcast = urtw_update_mcast; 908 909 ieee80211_radiotap_attach(ic, 910 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 911 URTW_TX_RADIOTAP_PRESENT, 912 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 913 URTW_RX_RADIOTAP_PRESENT); 914 915 urtw_sysctl_node(sc); 916 917 if (bootverbose) 918 ieee80211_announce(ic); 919 return (0); 920 921fail: URTW_UNLOCK(sc); 922fail1: usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 923 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 924fail0: 925 return (ret); 926} 927 928static int 929urtw_detach(device_t dev) 930{ 931 struct urtw_softc *sc = device_get_softc(dev); 932 struct ifnet *ifp = sc->sc_ifp; 933 struct ieee80211com *ic = ifp->if_l2com; 934 unsigned int x; 935 unsigned int n_xfers; 936 937 /* Prevent further ioctls */ 938 URTW_LOCK(sc); 939 sc->sc_flags |= URTW_DETACHED; 940 URTW_UNLOCK(sc); 941 942 urtw_stop(ifp); 943 944 ieee80211_draintask(ic, &sc->sc_updateslot_task); 945 ieee80211_draintask(ic, &sc->sc_led_task); 946 947 usb_callout_drain(&sc->sc_led_ch); 948 callout_drain(&sc->sc_watchdog_ch); 949 950 n_xfers = (sc->sc_flags & URTW_RTL8187B) ? 951 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS; 952 953 /* prevent further allocations from RX/TX data lists */ 954 URTW_LOCK(sc); 955 STAILQ_INIT(&sc->sc_tx_active); 956 STAILQ_INIT(&sc->sc_tx_inactive); 957 STAILQ_INIT(&sc->sc_tx_pending); 958 959 STAILQ_INIT(&sc->sc_rx_active); 960 STAILQ_INIT(&sc->sc_rx_inactive); 961 URTW_UNLOCK(sc); 962 963 /* drain USB transfers */ 964 for (x = 0; x != n_xfers; x++) 965 usbd_transfer_drain(sc->sc_xfer[x]); 966 967 /* free data buffers */ 968 URTW_LOCK(sc); 969 urtw_free_tx_data_list(sc); 970 urtw_free_rx_data_list(sc); 971 URTW_UNLOCK(sc); 972 973 /* free USB transfers and some data buffers */ 974 usbd_transfer_unsetup(sc->sc_xfer, n_xfers); 975 976 ieee80211_ifdetach(ic); 977 if_free(ifp); 978 mtx_destroy(&sc->sc_mtx); 979 return (0); 980} 981 982static void 983urtw_free_tx_data_list(struct urtw_softc *sc) 984{ 985 urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0); 986} 987 988static void 989urtw_free_rx_data_list(struct urtw_softc *sc) 990{ 991 urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1); 992} 993 994static void 995urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata, 996 int fillmbuf) 997{ 998 int i; 999 1000 for (i = 0; i < ndata; i++) { 1001 struct urtw_data *dp = &data[i]; 1002 1003 if (fillmbuf == 1) { 1004 if (dp->m != NULL) { 1005 m_freem(dp->m); 1006 dp->m = NULL; 1007 dp->buf = NULL; 1008 } 1009 } else { 1010 dp->buf = NULL; 1011 } 1012 if (dp->ni != NULL) { 1013 ieee80211_free_node(dp->ni); 1014 dp->ni = NULL; 1015 } 1016 } 1017} 1018 1019static struct ieee80211vap * 1020urtw_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 1021 enum ieee80211_opmode opmode, int flags, 1022 const uint8_t bssid[IEEE80211_ADDR_LEN], 1023 const uint8_t mac[IEEE80211_ADDR_LEN]) 1024{ 1025 struct urtw_vap *uvp; 1026 struct ieee80211vap *vap; 1027 1028 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 1029 return (NULL); 1030 uvp = (struct urtw_vap *) malloc(sizeof(struct urtw_vap), 1031 M_80211_VAP, M_NOWAIT | M_ZERO); 1032 if (uvp == NULL) 1033 return (NULL); 1034 vap = &uvp->vap; 1035 /* enable s/w bmiss handling for sta mode */ 1036 1037 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 1038 flags | IEEE80211_CLONE_NOBEACONS, bssid, mac) != 0) { 1039 /* out of memory */ 1040 free(uvp, M_80211_VAP); 1041 return (NULL); 1042 } 1043 1044 /* override state transition machine */ 1045 uvp->newstate = vap->iv_newstate; 1046 vap->iv_newstate = urtw_newstate; 1047 1048 /* complete setup */ 1049 ieee80211_vap_attach(vap, ieee80211_media_change, 1050 ieee80211_media_status); 1051 ic->ic_opmode = opmode; 1052 return (vap); 1053} 1054 1055static void 1056urtw_vap_delete(struct ieee80211vap *vap) 1057{ 1058 struct urtw_vap *uvp = URTW_VAP(vap); 1059 1060 ieee80211_vap_detach(vap); 1061 free(uvp, M_80211_VAP); 1062} 1063 1064static void 1065urtw_init_locked(void *arg) 1066{ 1067 int ret; 1068 struct urtw_softc *sc = arg; 1069 struct ifnet *ifp = sc->sc_ifp; 1070 usb_error_t error; 1071 1072 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1073 urtw_stop_locked(ifp); 1074 1075 error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) : 1076 urtw_adapter_start(sc); 1077 if (error != 0) 1078 goto fail; 1079 1080 /* reset softc variables */ 1081 sc->sc_txtimer = 0; 1082 1083 if (!(sc->sc_flags & URTW_INIT_ONCE)) { 1084 ret = urtw_alloc_rx_data_list(sc); 1085 if (ret != 0) 1086 goto fail; 1087 ret = urtw_alloc_tx_data_list(sc); 1088 if (ret != 0) 1089 goto fail; 1090 sc->sc_flags |= URTW_INIT_ONCE; 1091 } 1092 1093 error = urtw_rx_enable(sc); 1094 if (error != 0) 1095 goto fail; 1096 error = urtw_tx_enable(sc); 1097 if (error != 0) 1098 goto fail; 1099 1100 if (sc->sc_flags & URTW_RTL8187B) 1101 usbd_transfer_start(sc->sc_xfer[URTW_8187B_BULK_TX_STATUS]); 1102 1103 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1104 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1105 1106 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1107fail: 1108 return; 1109} 1110 1111static void 1112urtw_init(void *arg) 1113{ 1114 struct urtw_softc *sc = arg; 1115 1116 URTW_LOCK(sc); 1117 urtw_init_locked(arg); 1118 URTW_UNLOCK(sc); 1119} 1120 1121static usb_error_t 1122urtw_adapter_start_b(struct urtw_softc *sc) 1123{ 1124#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 1125 uint8_t data8; 1126 usb_error_t error; 1127 1128 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1129 if (error) 1130 goto fail; 1131 1132 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1133 urtw_write8_m(sc, URTW_CONFIG3, 1134 data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT); 1135 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON); 1136 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON); 1137 urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON); 1138 1139 urtw_write8_m(sc, 0x61, 0x10); 1140 urtw_read8_m(sc, 0x62, &data8); 1141 urtw_write8_m(sc, 0x62, data8 & ~(1 << 5)); 1142 urtw_write8_m(sc, 0x62, data8 | (1 << 5)); 1143 1144 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1145 data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE; 1146 urtw_write8_m(sc, URTW_CONFIG3, data8); 1147 1148 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1149 if (error) 1150 goto fail; 1151 1152 error = urtw_8187b_cmd_reset(sc); 1153 if (error) 1154 goto fail; 1155 1156 error = sc->sc_rf_init(sc); 1157 if (error != 0) 1158 goto fail; 1159 urtw_write8_m(sc, URTW_CMD, URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1160 1161 /* fix RTL8187B RX stall */ 1162 error = urtw_intr_enable(sc); 1163 if (error) 1164 goto fail; 1165 1166 error = urtw_write8e(sc, 0x41, 0xf4); 1167 if (error) 1168 goto fail; 1169 error = urtw_write8e(sc, 0x40, 0x00); 1170 if (error) 1171 goto fail; 1172 error = urtw_write8e(sc, 0x42, 0x00); 1173 if (error) 1174 goto fail; 1175 error = urtw_write8e(sc, 0x42, 0x01); 1176 if (error) 1177 goto fail; 1178 error = urtw_write8e(sc, 0x40, 0x0f); 1179 if (error) 1180 goto fail; 1181 error = urtw_write8e(sc, 0x42, 0x00); 1182 if (error) 1183 goto fail; 1184 error = urtw_write8e(sc, 0x42, 0x01); 1185 if (error) 1186 goto fail; 1187 1188 urtw_read8_m(sc, 0xdb, &data8); 1189 urtw_write8_m(sc, 0xdb, data8 | (1 << 2)); 1190 urtw_write16_m(sc, 0x372, 0x59fa); 1191 urtw_write16_m(sc, 0x374, 0x59d2); 1192 urtw_write16_m(sc, 0x376, 0x59d2); 1193 urtw_write16_m(sc, 0x378, 0x19fa); 1194 urtw_write16_m(sc, 0x37a, 0x19fa); 1195 urtw_write16_m(sc, 0x37c, 0x00d0); 1196 urtw_write8_m(sc, 0x61, 0); 1197 1198 urtw_write8_m(sc, 0x180, 0x0f); 1199 urtw_write8_m(sc, 0x183, 0x03); 1200 urtw_write8_m(sc, 0xda, 0x10); 1201 urtw_write8_m(sc, 0x24d, 0x08); 1202 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321b); 1203 1204 urtw_write16_m(sc, 0x1ec, 0x800); /* RX MAX SIZE */ 1205fail: 1206 return (error); 1207#undef N 1208} 1209 1210static usb_error_t 1211urtw_adapter_start(struct urtw_softc *sc) 1212{ 1213 usb_error_t error; 1214 1215 error = urtw_reset(sc); 1216 if (error) 1217 goto fail; 1218 1219 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0); 1220 urtw_write8_m(sc, URTW_GPIO, 0); 1221 1222 /* for led */ 1223 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1224 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON); 1225 if (error != 0) 1226 goto fail; 1227 1228 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1229 if (error) 1230 goto fail; 1231 /* applying MAC address again. */ 1232 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]); 1233 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff); 1234 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1235 if (error) 1236 goto fail; 1237 1238 error = urtw_update_msr(sc); 1239 if (error) 1240 goto fail; 1241 1242 urtw_write32_m(sc, URTW_INT_TIMEOUT, 0); 1243 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1244 urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1); 1245 error = urtw_set_rate(sc); 1246 if (error != 0) 1247 goto fail; 1248 1249 error = sc->sc_rf_init(sc); 1250 if (error != 0) 1251 goto fail; 1252 if (sc->sc_rf_set_sens != NULL) 1253 sc->sc_rf_set_sens(sc, sc->sc_sens); 1254 1255 /* XXX correct? to call write16 */ 1256 urtw_write16_m(sc, URTW_PSR, 1); 1257 urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10); 1258 urtw_write8_m(sc, URTW_TALLY_SEL, 0x80); 1259 urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60); 1260 /* XXX correct? to call write16 */ 1261 urtw_write16_m(sc, URTW_PSR, 0); 1262 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1263 1264 error = urtw_intr_enable(sc); 1265 if (error != 0) 1266 goto fail; 1267 1268fail: 1269 return (error); 1270} 1271 1272static usb_error_t 1273urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 1274{ 1275 uint8_t data; 1276 usb_error_t error; 1277 1278 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 1279 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 1280 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 1281 urtw_write8_m(sc, URTW_EPROM_CMD, data); 1282fail: 1283 return (error); 1284} 1285 1286static usb_error_t 1287urtw_8187b_cmd_reset(struct urtw_softc *sc) 1288{ 1289 int i; 1290 uint8_t data8; 1291 usb_error_t error; 1292 1293 /* XXX the code can be duplicate with urtw_reset(). */ 1294 urtw_read8_m(sc, URTW_CMD, &data8); 1295 data8 = (data8 & 0x2) | URTW_CMD_RST; 1296 urtw_write8_m(sc, URTW_CMD, data8); 1297 1298 for (i = 0; i < 20; i++) { 1299 usb_pause_mtx(&sc->sc_mtx, 2); 1300 urtw_read8_m(sc, URTW_CMD, &data8); 1301 if (!(data8 & URTW_CMD_RST)) 1302 break; 1303 } 1304 if (i >= 20) { 1305 device_printf(sc->sc_dev, "reset timeout\n"); 1306 goto fail; 1307 } 1308fail: 1309 return (error); 1310} 1311 1312static usb_error_t 1313urtw_do_request(struct urtw_softc *sc, 1314 struct usb_device_request *req, void *data) 1315{ 1316 usb_error_t err; 1317 int ntries = 10; 1318 1319 URTW_ASSERT_LOCKED(sc); 1320 1321 while (ntries--) { 1322 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 1323 req, data, 0, NULL, 250 /* ms */); 1324 if (err == 0) 1325 break; 1326 1327 DPRINTF(sc, URTW_DEBUG_INIT, 1328 "Control request failed, %s (retrying)\n", 1329 usbd_errstr(err)); 1330 usb_pause_mtx(&sc->sc_mtx, hz / 100); 1331 } 1332 return (err); 1333} 1334 1335static void 1336urtw_stop_locked(struct ifnet *ifp) 1337{ 1338 struct urtw_softc *sc = ifp->if_softc; 1339 uint8_t data8; 1340 usb_error_t error; 1341 1342 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1343 1344 error = urtw_intr_disable(sc); 1345 if (error) 1346 goto fail; 1347 urtw_read8_m(sc, URTW_CMD, &data8); 1348 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1349 urtw_write8_m(sc, URTW_CMD, data8); 1350 1351 error = sc->sc_rf_stop(sc); 1352 if (error != 0) 1353 goto fail; 1354 1355 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1356 if (error) 1357 goto fail; 1358 urtw_read8_m(sc, URTW_CONFIG4, &data8); 1359 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 1360 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1361 if (error) 1362 goto fail; 1363fail: 1364 if (error) 1365 device_printf(sc->sc_dev, "failed to stop (%s)\n", 1366 usbd_errstr(error)); 1367 1368 usb_callout_stop(&sc->sc_led_ch); 1369 callout_stop(&sc->sc_watchdog_ch); 1370 1371 urtw_abort_xfers(sc); 1372} 1373 1374static void 1375urtw_stop(struct ifnet *ifp) 1376{ 1377 struct urtw_softc *sc = ifp->if_softc; 1378 1379 URTW_LOCK(sc); 1380 urtw_stop_locked(ifp); 1381 URTW_UNLOCK(sc); 1382} 1383 1384static void 1385urtw_abort_xfers(struct urtw_softc *sc) 1386{ 1387 int i, max; 1388 1389 URTW_ASSERT_LOCKED(sc); 1390 1391 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1392 URTW_8187L_N_XFERS; 1393 1394 /* abort any pending transfers */ 1395 for (i = 0; i < max; i++) 1396 usbd_transfer_stop(sc->sc_xfer[i]); 1397} 1398 1399static int 1400urtw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1401{ 1402 struct urtw_softc *sc = ifp->if_softc; 1403 struct ieee80211com *ic = ifp->if_l2com; 1404 struct ifreq *ifr = (struct ifreq *) data; 1405 int error; 1406 int startall = 0; 1407 1408 URTW_LOCK(sc); 1409 error = (sc->sc_flags & URTW_DETACHED) ? ENXIO : 0; 1410 URTW_UNLOCK(sc); 1411 if (error) 1412 return (error); 1413 1414 switch (cmd) { 1415 case SIOCSIFFLAGS: 1416 if (ifp->if_flags & IFF_UP) { 1417 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1418 if ((ifp->if_flags ^ sc->sc_if_flags) & 1419 (IFF_ALLMULTI | IFF_PROMISC)) 1420 urtw_set_multi(sc); 1421 } else { 1422 urtw_init(ifp->if_softc); 1423 startall = 1; 1424 } 1425 } else { 1426 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1427 urtw_stop(ifp); 1428 } 1429 sc->sc_if_flags = ifp->if_flags; 1430 if (startall) 1431 ieee80211_start_all(ic); 1432 break; 1433 case SIOCGIFMEDIA: 1434 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1435 break; 1436 case SIOCGIFADDR: 1437 error = ether_ioctl(ifp, cmd, data); 1438 break; 1439 default: 1440 error = EINVAL; 1441 break; 1442 } 1443 return (error); 1444} 1445 1446static void 1447urtw_start(struct ifnet *ifp) 1448{ 1449 struct urtw_data *bf; 1450 struct urtw_softc *sc = ifp->if_softc; 1451 struct ieee80211_node *ni; 1452 struct mbuf *m; 1453 1454 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1455 return; 1456 1457 URTW_LOCK(sc); 1458 for (;;) { 1459 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1460 if (m == NULL) 1461 break; 1462 bf = urtw_getbuf(sc); 1463 if (bf == NULL) { 1464 IFQ_DRV_PREPEND(&ifp->if_snd, m); 1465 break; 1466 } 1467 1468 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1469 m->m_pkthdr.rcvif = NULL; 1470 1471 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) { 1472 ifp->if_oerrors++; 1473 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1474 ieee80211_free_node(ni); 1475 break; 1476 } 1477 1478 sc->sc_txtimer = 5; 1479 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1480 } 1481 URTW_UNLOCK(sc); 1482} 1483 1484static int 1485urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[], 1486 int ndata, int maxsz, void *dma_buf) 1487{ 1488 int i, error; 1489 1490 for (i = 0; i < ndata; i++) { 1491 struct urtw_data *dp = &data[i]; 1492 1493 dp->sc = sc; 1494 if (dma_buf == NULL) { 1495 dp->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1496 if (dp->m == NULL) { 1497 device_printf(sc->sc_dev, 1498 "could not allocate rx mbuf\n"); 1499 error = ENOMEM; 1500 goto fail; 1501 } 1502 dp->buf = mtod(dp->m, uint8_t *); 1503 } else { 1504 dp->m = NULL; 1505 dp->buf = ((uint8_t *)dma_buf) + 1506 (i * maxsz); 1507 } 1508 dp->ni = NULL; 1509 } 1510 return (0); 1511 1512fail: urtw_free_data_list(sc, data, ndata, 1); 1513 return (error); 1514} 1515 1516static int 1517urtw_alloc_rx_data_list(struct urtw_softc *sc) 1518{ 1519 int error, i; 1520 1521 error = urtw_alloc_data_list(sc, 1522 sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1523 MCLBYTES, NULL /* mbufs */); 1524 if (error != 0) 1525 return (error); 1526 1527 STAILQ_INIT(&sc->sc_rx_active); 1528 STAILQ_INIT(&sc->sc_rx_inactive); 1529 1530 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++) 1531 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1532 1533 return (0); 1534} 1535 1536static int 1537urtw_alloc_tx_data_list(struct urtw_softc *sc) 1538{ 1539 int error, i; 1540 1541 error = urtw_alloc_data_list(sc, 1542 sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE, 1543 sc->sc_tx_dma_buf /* no mbufs */); 1544 if (error != 0) 1545 return (error); 1546 1547 STAILQ_INIT(&sc->sc_tx_active); 1548 STAILQ_INIT(&sc->sc_tx_inactive); 1549 STAILQ_INIT(&sc->sc_tx_pending); 1550 1551 for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++) 1552 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], 1553 next); 1554 1555 return (0); 1556} 1557 1558static int 1559urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1560 const struct ieee80211_bpf_params *params) 1561{ 1562 struct ieee80211com *ic = ni->ni_ic; 1563 struct ifnet *ifp = ic->ic_ifp; 1564 struct urtw_data *bf; 1565 struct urtw_softc *sc = ifp->if_softc; 1566 1567 /* prevent management frames from being sent if we're not ready */ 1568 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1569 m_freem(m); 1570 ieee80211_free_node(ni); 1571 return ENETDOWN; 1572 } 1573 URTW_LOCK(sc); 1574 bf = urtw_getbuf(sc); 1575 if (bf == NULL) { 1576 ieee80211_free_node(ni); 1577 m_freem(m); 1578 URTW_UNLOCK(sc); 1579 return (ENOBUFS); /* XXX */ 1580 } 1581 1582 ifp->if_opackets++; 1583 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) { 1584 ieee80211_free_node(ni); 1585 ifp->if_oerrors++; 1586 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1587 URTW_UNLOCK(sc); 1588 return (EIO); 1589 } 1590 URTW_UNLOCK(sc); 1591 1592 sc->sc_txtimer = 5; 1593 return (0); 1594} 1595 1596static void 1597urtw_scan_start(struct ieee80211com *ic) 1598{ 1599 1600 /* XXX do nothing? */ 1601} 1602 1603static void 1604urtw_scan_end(struct ieee80211com *ic) 1605{ 1606 1607 /* XXX do nothing? */ 1608} 1609 1610static void 1611urtw_set_channel(struct ieee80211com *ic) 1612{ 1613 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1614 struct ifnet *ifp = sc->sc_ifp; 1615 uint32_t data, orig; 1616 usb_error_t error; 1617 1618 /* 1619 * if the user set a channel explicitly using ifconfig(8) this function 1620 * can be called earlier than we're expected that in some cases the 1621 * initialization would be failed if setting a channel is called before 1622 * the init have done. 1623 */ 1624 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1625 return; 1626 1627 if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan) 1628 return; 1629 1630 URTW_LOCK(sc); 1631 1632 /* 1633 * during changing th channel we need to temporarily be disable 1634 * TX. 1635 */ 1636 urtw_read32_m(sc, URTW_TX_CONF, &orig); 1637 data = orig & ~URTW_TX_LOOPBACK_MASK; 1638 urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC); 1639 1640 error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan)); 1641 if (error != 0) 1642 goto fail; 1643 usb_pause_mtx(&sc->sc_mtx, 10); 1644 urtw_write32_m(sc, URTW_TX_CONF, orig); 1645 1646 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1647 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1648 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1649 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1650 1651fail: 1652 URTW_UNLOCK(sc); 1653 1654 sc->sc_curchan = ic->ic_curchan; 1655 1656 if (error != 0) 1657 device_printf(sc->sc_dev, "could not change the channel\n"); 1658} 1659 1660static void 1661urtw_update_mcast(struct ifnet *ifp) 1662{ 1663 1664 /* XXX do nothing? */ 1665} 1666 1667static int 1668urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0, 1669 struct urtw_data *data, int prior) 1670{ 1671 struct ifnet *ifp = sc->sc_ifp; 1672 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 1673 struct ieee80211_key *k; 1674 const struct ieee80211_txparam *tp; 1675 struct ieee80211com *ic = ifp->if_l2com; 1676 struct ieee80211vap *vap = ni->ni_vap; 1677 struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = { 1678 sc->sc_xfer[URTW_8187B_BULK_TX_BE], 1679 sc->sc_xfer[URTW_8187B_BULK_TX_BK], 1680 sc->sc_xfer[URTW_8187B_BULK_TX_VI], 1681 sc->sc_xfer[URTW_8187B_BULK_TX_VO] 1682 }; 1683 struct usb_xfer *xfer; 1684 int dur = 0, rtsdur = 0, rtsenable = 0, ctsenable = 0, rate, 1685 pkttime = 0, txdur = 0, isshort = 0, xferlen; 1686 uint16_t acktime, rtstime, ctstime; 1687 uint32_t flags; 1688 usb_error_t error; 1689 1690 URTW_ASSERT_LOCKED(sc); 1691 1692 /* 1693 * Software crypto. 1694 */ 1695 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1696 k = ieee80211_crypto_encap(ni, m0); 1697 if (k == NULL) { 1698 device_printf(sc->sc_dev, 1699 "ieee80211_crypto_encap returns NULL.\n"); 1700 /* XXX we don't expect the fragmented frames */ 1701 m_freem(m0); 1702 return (ENOBUFS); 1703 } 1704 1705 /* in case packet header moved, reset pointer */ 1706 wh = mtod(m0, struct ieee80211_frame *); 1707 } 1708 1709 if (ieee80211_radiotap_active_vap(vap)) { 1710 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap; 1711 1712 /* XXX Are variables correct? */ 1713 tap->wt_flags = 0; 1714 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1715 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1716 1717 ieee80211_radiotap_tx(vap, m0); 1718 } 1719 1720 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_MGT || 1721 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL) { 1722 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 1723 rate = tp->mgmtrate; 1724 } else { 1725 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1726 /* for data frames */ 1727 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1728 rate = tp->mcastrate; 1729 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1730 rate = tp->ucastrate; 1731 else 1732 rate = urtw_rtl2rate(sc->sc_currate); 1733 } 1734 1735 sc->sc_stats.txrates[sc->sc_currate]++; 1736 1737 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1738 txdur = pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1739 IEEE80211_CRC_LEN, rate, 0, 0); 1740 else { 1741 acktime = urtw_compute_txtime(14, 2,0, 0); 1742 if ((m0->m_pkthdr.len + 4) > vap->iv_rtsthreshold) { 1743 rtsenable = 1; 1744 ctsenable = 0; 1745 rtstime = urtw_compute_txtime(URTW_ACKCTS_LEN, 2, 0, 0); 1746 ctstime = urtw_compute_txtime(14, 2, 0, 0); 1747 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1748 IEEE80211_CRC_LEN, rate, 0, isshort); 1749 rtsdur = ctstime + pkttime + acktime + 1750 3 * URTW_ASIFS_TIME; 1751 txdur = rtstime + rtsdur; 1752 } else { 1753 rtsenable = ctsenable = rtsdur = 0; 1754 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1755 IEEE80211_CRC_LEN, rate, 0, isshort); 1756 txdur = pkttime + URTW_ASIFS_TIME + acktime; 1757 } 1758 1759 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1760 dur = urtw_compute_txtime(m0->m_pkthdr.len + 1761 IEEE80211_CRC_LEN, rate, 0, isshort) + 1762 3 * URTW_ASIFS_TIME + 1763 2 * acktime; 1764 else 1765 dur = URTW_ASIFS_TIME + acktime; 1766 } 1767 USETW(wh->i_dur, dur); 1768 1769 xferlen = m0->m_pkthdr.len; 1770 xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3); 1771 if ((0 == xferlen % 64) || (0 == xferlen % 512)) 1772 xferlen += 1; 1773 1774 memset(data->buf, 0, URTW_TX_MAXSIZE); 1775 flags = m0->m_pkthdr.len & 0xfff; 1776 flags |= URTW_TX_FLAG_NO_ENC; 1777 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1778 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) && 1779 (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) && 1780 (sc->sc_currate != 0)) 1781 flags |= URTW_TX_FLAG_SPLCP; 1782 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1783 flags |= URTW_TX_FLAG_MOREFRAG; 1784 1785 flags |= (sc->sc_currate & 0xf) << URTW_TX_FLAG_TXRATE_SHIFT; 1786 1787 if (sc->sc_flags & URTW_RTL8187B) { 1788 struct urtw_8187b_txhdr *tx; 1789 1790 tx = (struct urtw_8187b_txhdr *)data->buf; 1791 if (ctsenable) 1792 flags |= URTW_TX_FLAG_CTS; 1793 if (rtsenable) { 1794 flags |= URTW_TX_FLAG_RTS; 1795 flags |= (urtw_rate2rtl(11) & 0xf) << 1796 URTW_TX_FLAG_RTSRATE_SHIFT; 1797 tx->rtsdur = rtsdur; 1798 } 1799 tx->flag = htole32(flags); 1800 tx->txdur = txdur; 1801 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1802 IEEE80211_FC0_TYPE_MGT && 1803 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1804 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1805 tx->retry = 1; 1806 else 1807 tx->retry = URTW_TX_MAXRETRY; 1808 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1809 } else { 1810 struct urtw_8187l_txhdr *tx; 1811 1812 tx = (struct urtw_8187l_txhdr *)data->buf; 1813 if (rtsenable) { 1814 flags |= URTW_TX_FLAG_RTS; 1815 tx->rtsdur = rtsdur; 1816 } 1817 flags |= (urtw_rate2rtl(11) & 0xf) << URTW_TX_FLAG_RTSRATE_SHIFT; 1818 tx->flag = htole32(flags); 1819 tx->retry = 3; /* CW minimum */ 1820 tx->retry = 7 << 4; /* CW maximum */ 1821 tx->retry = URTW_TX_MAXRETRY << 8; /* retry limitation */ 1822 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1823 } 1824 1825 data->buflen = xferlen; 1826 data->ni = ni; 1827 data->m = m0; 1828 1829 if (sc->sc_flags & URTW_RTL8187B) { 1830 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1831 case IEEE80211_FC0_TYPE_CTL: 1832 case IEEE80211_FC0_TYPE_MGT: 1833 xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12]; 1834 break; 1835 default: 1836 KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX, 1837 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1838 xfer = rtl8187b_pipes[M_WME_GETAC(m0)]; 1839 break; 1840 } 1841 } else 1842 xfer = (prior == URTW_PRIORITY_LOW) ? 1843 sc->sc_xfer[URTW_8187L_BULK_TX_LOW] : 1844 sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL]; 1845 1846 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1847 usbd_transfer_start(xfer); 1848 1849 error = urtw_led_ctl(sc, URTW_LED_CTL_TX); 1850 if (error != 0) 1851 device_printf(sc->sc_dev, "could not control LED (%d)\n", 1852 error); 1853 return (0); 1854} 1855 1856static int 1857urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1858{ 1859 struct ieee80211com *ic = vap->iv_ic; 1860 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1861 struct urtw_vap *uvp = URTW_VAP(vap); 1862 struct ieee80211_node *ni; 1863 usb_error_t error = 0; 1864 1865 DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1866 ieee80211_state_name[vap->iv_state], 1867 ieee80211_state_name[nstate]); 1868 1869 sc->sc_state = nstate; 1870 1871 IEEE80211_UNLOCK(ic); 1872 URTW_LOCK(sc); 1873 usb_callout_stop(&sc->sc_led_ch); 1874 callout_stop(&sc->sc_watchdog_ch); 1875 1876 switch (nstate) { 1877 case IEEE80211_S_INIT: 1878 case IEEE80211_S_SCAN: 1879 case IEEE80211_S_AUTH: 1880 case IEEE80211_S_ASSOC: 1881 break; 1882 case IEEE80211_S_RUN: 1883 ni = ieee80211_ref_node(vap->iv_bss); 1884 /* setting bssid. */ 1885 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]); 1886 urtw_write16_m(sc, URTW_BSSID + 4, 1887 ((uint16_t *)ni->ni_bssid)[2]); 1888 urtw_update_msr(sc); 1889 /* XXX maybe the below would be incorrect. */ 1890 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1891 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1892 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64); 1893 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1894 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK); 1895 if (error != 0) 1896 device_printf(sc->sc_dev, 1897 "could not control LED (%d)\n", error); 1898 ieee80211_free_node(ni); 1899 break; 1900 default: 1901 break; 1902 } 1903fail: 1904 URTW_UNLOCK(sc); 1905 IEEE80211_LOCK(ic); 1906 return (uvp->newstate(vap, nstate, arg)); 1907} 1908 1909static void 1910urtw_watchdog(void *arg) 1911{ 1912 struct urtw_softc *sc = arg; 1913 struct ifnet *ifp = sc->sc_ifp; 1914 1915 if (sc->sc_txtimer > 0) { 1916 if (--sc->sc_txtimer == 0) { 1917 device_printf(sc->sc_dev, "device timeout\n"); 1918 ifp->if_oerrors++; 1919 return; 1920 } 1921 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1922 } 1923} 1924 1925static void 1926urtw_set_multi(void *arg) 1927{ 1928 struct urtw_softc *sc = arg; 1929 struct ifnet *ifp = sc->sc_ifp; 1930 1931 if (!(ifp->if_flags & IFF_UP)) 1932 return; 1933 1934 /* 1935 * XXX don't know how to set a device. Lack of docs. Just try to set 1936 * IFF_ALLMULTI flag here. 1937 */ 1938 ifp->if_flags |= IFF_ALLMULTI; 1939} 1940 1941static usb_error_t 1942urtw_set_rate(struct urtw_softc *sc) 1943{ 1944 int i, basic_rate, min_rr_rate, max_rr_rate; 1945 uint16_t data; 1946 usb_error_t error; 1947 1948 basic_rate = urtw_rate2rtl(48); 1949 min_rr_rate = urtw_rate2rtl(12); 1950 max_rr_rate = urtw_rate2rtl(48); 1951 1952 urtw_write8_m(sc, URTW_RESP_RATE, 1953 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 1954 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); 1955 1956 urtw_read16_m(sc, URTW_BRSR, &data); 1957 data &= ~URTW_BRSR_MBR_8185; 1958 1959 for (i = 0; i <= basic_rate; i++) 1960 data |= (1 << i); 1961 1962 urtw_write16_m(sc, URTW_BRSR, data); 1963fail: 1964 return (error); 1965} 1966 1967static uint16_t 1968urtw_rate2rtl(uint32_t rate) 1969{ 1970#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 1971 int i; 1972 1973 for (i = 0; i < N(urtw_ratetable); i++) { 1974 if (rate == urtw_ratetable[i].reg) 1975 return urtw_ratetable[i].val; 1976 } 1977 1978 return (3); 1979#undef N 1980} 1981 1982static uint16_t 1983urtw_rtl2rate(uint32_t rate) 1984{ 1985#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 1986 int i; 1987 1988 for (i = 0; i < N(urtw_ratetable); i++) { 1989 if (rate == urtw_ratetable[i].val) 1990 return urtw_ratetable[i].reg; 1991 } 1992 1993 return (0); 1994#undef N 1995} 1996 1997static usb_error_t 1998urtw_update_msr(struct urtw_softc *sc) 1999{ 2000 struct ifnet *ifp = sc->sc_ifp; 2001 struct ieee80211com *ic = ifp->if_l2com; 2002 uint8_t data; 2003 usb_error_t error; 2004 2005 urtw_read8_m(sc, URTW_MSR, &data); 2006 data &= ~URTW_MSR_LINK_MASK; 2007 2008 if (sc->sc_state == IEEE80211_S_RUN) { 2009 switch (ic->ic_opmode) { 2010 case IEEE80211_M_STA: 2011 case IEEE80211_M_MONITOR: 2012 data |= URTW_MSR_LINK_STA; 2013 if (sc->sc_flags & URTW_RTL8187B) 2014 data |= URTW_MSR_LINK_ENEDCA; 2015 break; 2016 case IEEE80211_M_IBSS: 2017 data |= URTW_MSR_LINK_ADHOC; 2018 break; 2019 case IEEE80211_M_HOSTAP: 2020 data |= URTW_MSR_LINK_HOSTAP; 2021 break; 2022 default: 2023 DPRINTF(sc, URTW_DEBUG_STATE, 2024 "unsupported operation mode 0x%x\n", 2025 ic->ic_opmode); 2026 error = USB_ERR_INVAL; 2027 goto fail; 2028 } 2029 } else 2030 data |= URTW_MSR_LINK_NONE; 2031 2032 urtw_write8_m(sc, URTW_MSR, data); 2033fail: 2034 return (error); 2035} 2036 2037static usb_error_t 2038urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 2039{ 2040 struct usb_device_request req; 2041 usb_error_t error; 2042 2043 URTW_ASSERT_LOCKED(sc); 2044 2045 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2046 req.bRequest = URTW_8187_GETREGS_REQ; 2047 USETW(req.wValue, (val & 0xff) | 0xff00); 2048 USETW(req.wIndex, (val >> 8) & 0x3); 2049 USETW(req.wLength, sizeof(uint8_t)); 2050 2051 error = urtw_do_request(sc, &req, data); 2052 return (error); 2053} 2054 2055static usb_error_t 2056urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 2057{ 2058 struct usb_device_request req; 2059 usb_error_t error; 2060 2061 URTW_ASSERT_LOCKED(sc); 2062 2063 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2064 req.bRequest = URTW_8187_GETREGS_REQ; 2065 USETW(req.wValue, (val & 0xff) | 0xff00); 2066 USETW(req.wIndex, (val >> 8) & 0x3); 2067 USETW(req.wLength, sizeof(uint16_t)); 2068 2069 error = urtw_do_request(sc, &req, data); 2070 return (error); 2071} 2072 2073static usb_error_t 2074urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data) 2075{ 2076 struct usb_device_request req; 2077 usb_error_t error; 2078 2079 URTW_ASSERT_LOCKED(sc); 2080 2081 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2082 req.bRequest = URTW_8187_GETREGS_REQ; 2083 USETW(req.wValue, (val & 0xff) | 0xff00); 2084 USETW(req.wIndex, (val >> 8) & 0x3); 2085 USETW(req.wLength, sizeof(uint32_t)); 2086 2087 error = urtw_do_request(sc, &req, data); 2088 return (error); 2089} 2090 2091static usb_error_t 2092urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data) 2093{ 2094 struct usb_device_request req; 2095 2096 URTW_ASSERT_LOCKED(sc); 2097 2098 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2099 req.bRequest = URTW_8187_SETREGS_REQ; 2100 USETW(req.wValue, (val & 0xff) | 0xff00); 2101 USETW(req.wIndex, (val >> 8) & 0x3); 2102 USETW(req.wLength, sizeof(uint8_t)); 2103 2104 return (urtw_do_request(sc, &req, &data)); 2105} 2106 2107static usb_error_t 2108urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2109{ 2110 struct usb_device_request req; 2111 2112 URTW_ASSERT_LOCKED(sc); 2113 2114 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2115 req.bRequest = URTW_8187_SETREGS_REQ; 2116 USETW(req.wValue, (val & 0xff) | 0xff00); 2117 USETW(req.wIndex, (val >> 8) & 0x3); 2118 USETW(req.wLength, sizeof(uint16_t)); 2119 2120 return (urtw_do_request(sc, &req, &data)); 2121} 2122 2123static usb_error_t 2124urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data) 2125{ 2126 struct usb_device_request req; 2127 2128 URTW_ASSERT_LOCKED(sc); 2129 2130 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2131 req.bRequest = URTW_8187_SETREGS_REQ; 2132 USETW(req.wValue, (val & 0xff) | 0xff00); 2133 USETW(req.wIndex, (val >> 8) & 0x3); 2134 USETW(req.wLength, sizeof(uint32_t)); 2135 2136 return (urtw_do_request(sc, &req, &data)); 2137} 2138 2139static usb_error_t 2140urtw_get_macaddr(struct urtw_softc *sc) 2141{ 2142 uint32_t data; 2143 usb_error_t error; 2144 2145 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 2146 if (error != 0) 2147 goto fail; 2148 sc->sc_bssid[0] = data & 0xff; 2149 sc->sc_bssid[1] = (data & 0xff00) >> 8; 2150 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 2151 if (error != 0) 2152 goto fail; 2153 sc->sc_bssid[2] = data & 0xff; 2154 sc->sc_bssid[3] = (data & 0xff00) >> 8; 2155 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 2156 if (error != 0) 2157 goto fail; 2158 sc->sc_bssid[4] = data & 0xff; 2159 sc->sc_bssid[5] = (data & 0xff00) >> 8; 2160fail: 2161 return (error); 2162} 2163 2164static usb_error_t 2165urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 2166{ 2167#define URTW_READCMD_LEN 3 2168 int addrlen, i; 2169 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 2170 usb_error_t error; 2171 2172 /* NB: make sure the buffer is initialized */ 2173 *data = 0; 2174 2175 /* enable EPROM programming */ 2176 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 2177 DELAY(URTW_EPROM_DELAY); 2178 2179 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 2180 if (error != 0) 2181 goto fail; 2182 error = urtw_eprom_ck(sc); 2183 if (error != 0) 2184 goto fail; 2185 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 2186 if (error != 0) 2187 goto fail; 2188 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 2189 addrlen = 8; 2190 addrstr[0] = addr & (1 << 7); 2191 addrstr[1] = addr & (1 << 6); 2192 addrstr[2] = addr & (1 << 5); 2193 addrstr[3] = addr & (1 << 4); 2194 addrstr[4] = addr & (1 << 3); 2195 addrstr[5] = addr & (1 << 2); 2196 addrstr[6] = addr & (1 << 1); 2197 addrstr[7] = addr & (1 << 0); 2198 } else { 2199 addrlen=6; 2200 addrstr[0] = addr & (1 << 5); 2201 addrstr[1] = addr & (1 << 4); 2202 addrstr[2] = addr & (1 << 3); 2203 addrstr[3] = addr & (1 << 2); 2204 addrstr[4] = addr & (1 << 1); 2205 addrstr[5] = addr & (1 << 0); 2206 } 2207 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 2208 if (error != 0) 2209 goto fail; 2210 2211 error = urtw_eprom_writebit(sc, 0); 2212 if (error != 0) 2213 goto fail; 2214 2215 for (i = 0; i < 16; i++) { 2216 error = urtw_eprom_ck(sc); 2217 if (error != 0) 2218 goto fail; 2219 error = urtw_eprom_readbit(sc, &data16); 2220 if (error != 0) 2221 goto fail; 2222 2223 (*data) |= (data16 << (15 - i)); 2224 } 2225 2226 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 2227 if (error != 0) 2228 goto fail; 2229 error = urtw_eprom_ck(sc); 2230 if (error != 0) 2231 goto fail; 2232 2233 /* now disable EPROM programming */ 2234 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); 2235fail: 2236 return (error); 2237#undef URTW_READCMD_LEN 2238} 2239 2240static usb_error_t 2241urtw_eprom_cs(struct urtw_softc *sc, int able) 2242{ 2243 uint8_t data; 2244 usb_error_t error; 2245 2246 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2247 if (able == URTW_EPROM_ENABLE) 2248 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2249 else 2250 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2251 DELAY(URTW_EPROM_DELAY); 2252fail: 2253 return (error); 2254} 2255 2256static usb_error_t 2257urtw_eprom_ck(struct urtw_softc *sc) 2258{ 2259 uint8_t data; 2260 usb_error_t error; 2261 2262 /* masking */ 2263 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2264 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2265 DELAY(URTW_EPROM_DELAY); 2266 /* unmasking */ 2267 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2268 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2269 DELAY(URTW_EPROM_DELAY); 2270fail: 2271 return (error); 2272} 2273 2274static usb_error_t 2275urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) 2276{ 2277 uint8_t data8; 2278 usb_error_t error; 2279 2280 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2281 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2282 DELAY(URTW_EPROM_DELAY); 2283 2284fail: 2285 return (error); 2286} 2287 2288static usb_error_t 2289urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 2290{ 2291 uint8_t data; 2292 usb_error_t error; 2293 2294 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2295 if (bit != 0) 2296 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2297 else 2298 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2299 DELAY(URTW_EPROM_DELAY); 2300fail: 2301 return (error); 2302} 2303 2304static usb_error_t 2305urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) 2306{ 2307 int i = 0; 2308 usb_error_t error = 0; 2309 2310 for (i = 0; i < buflen; i++) { 2311 error = urtw_eprom_writebit(sc, buf[i]); 2312 if (error != 0) 2313 goto fail; 2314 error = urtw_eprom_ck(sc); 2315 if (error != 0) 2316 goto fail; 2317 } 2318fail: 2319 return (error); 2320} 2321 2322 2323static usb_error_t 2324urtw_get_txpwr(struct urtw_softc *sc) 2325{ 2326 int i, j; 2327 uint32_t data; 2328 usb_error_t error; 2329 2330 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data); 2331 if (error != 0) 2332 goto fail; 2333 sc->sc_txpwr_cck_base = data & 0xf; 2334 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf; 2335 2336 for (i = 1, j = 0; i < 6; i += 2, j++) { 2337 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data); 2338 if (error != 0) 2339 goto fail; 2340 sc->sc_txpwr_cck[i] = data & 0xf; 2341 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8; 2342 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4; 2343 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12; 2344 } 2345 for (i = 1, j = 0; i < 4; i += 2, j++) { 2346 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data); 2347 if (error != 0) 2348 goto fail; 2349 sc->sc_txpwr_cck[i + 6] = data & 0xf; 2350 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8; 2351 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4; 2352 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12; 2353 } 2354 if (sc->sc_flags & URTW_RTL8187B) { 2355 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data); 2356 if (error != 0) 2357 goto fail; 2358 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf; 2359 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4; 2360 error = urtw_eprom_read32(sc, 0x0a, &data); 2361 if (error != 0) 2362 goto fail; 2363 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf; 2364 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4; 2365 error = urtw_eprom_read32(sc, 0x1c, &data); 2366 if (error != 0) 2367 goto fail; 2368 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf; 2369 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8; 2370 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4; 2371 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12; 2372 } else { 2373 for (i = 1, j = 0; i < 4; i += 2, j++) { 2374 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j, 2375 &data); 2376 if (error != 0) 2377 goto fail; 2378 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf; 2379 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8; 2380 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4; 2381 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12; 2382 } 2383 } 2384fail: 2385 return (error); 2386} 2387 2388 2389static usb_error_t 2390urtw_get_rfchip(struct urtw_softc *sc) 2391{ 2392 int ret; 2393 uint8_t data8; 2394 uint32_t data; 2395 usb_error_t error; 2396 2397 if (sc->sc_flags & URTW_RTL8187B) { 2398 urtw_read8_m(sc, 0xe1, &data8); 2399 switch (data8) { 2400 case 0: 2401 sc->sc_flags |= URTW_RTL8187B_REV_B; 2402 break; 2403 case 1: 2404 sc->sc_flags |= URTW_RTL8187B_REV_D; 2405 break; 2406 case 2: 2407 sc->sc_flags |= URTW_RTL8187B_REV_E; 2408 break; 2409 default: 2410 device_printf(sc->sc_dev, "unknown type: %#x\n", data8); 2411 sc->sc_flags |= URTW_RTL8187B_REV_B; 2412 break; 2413 } 2414 } else { 2415 urtw_read32_m(sc, URTW_TX_CONF, &data); 2416 switch (data & URTW_TX_HWMASK) { 2417 case URTW_TX_R8187vD_B: 2418 sc->sc_flags |= URTW_RTL8187B; 2419 break; 2420 case URTW_TX_R8187vD: 2421 break; 2422 default: 2423 device_printf(sc->sc_dev, "unknown RTL8187L type: %#x\n", 2424 data & URTW_TX_HWMASK); 2425 break; 2426 } 2427 } 2428 2429 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data); 2430 if (error != 0) 2431 goto fail; 2432 switch (data & 0xff) { 2433 case URTW_EPROM_RFCHIPID_RTL8225U: 2434 error = urtw_8225_isv2(sc, &ret); 2435 if (error != 0) 2436 goto fail; 2437 if (ret == 0) { 2438 sc->sc_rf_init = urtw_8225_rf_init; 2439 sc->sc_rf_set_sens = urtw_8225_rf_set_sens; 2440 sc->sc_rf_set_chan = urtw_8225_rf_set_chan; 2441 sc->sc_rf_stop = urtw_8225_rf_stop; 2442 } else { 2443 sc->sc_rf_init = urtw_8225v2_rf_init; 2444 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan; 2445 sc->sc_rf_stop = urtw_8225_rf_stop; 2446 } 2447 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2448 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2449 break; 2450 case URTW_EPROM_RFCHIPID_RTL8225Z2: 2451 sc->sc_rf_init = urtw_8225v2b_rf_init; 2452 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan; 2453 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2454 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2455 sc->sc_rf_stop = urtw_8225_rf_stop; 2456 break; 2457 default: 2458 DPRINTF(sc, URTW_DEBUG_STATE, 2459 "unsupported RF chip %d\n", data & 0xff); 2460 error = USB_ERR_INVAL; 2461 goto fail; 2462 } 2463 2464 device_printf(sc->sc_dev, "%s rf %s hwrev %s\n", 2465 (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l", 2466 ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" : 2467 "rtl8225z2", 2468 (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" : 2469 (data8 == 1) ? "d" : "e") : "none"); 2470 2471fail: 2472 return (error); 2473} 2474 2475 2476static usb_error_t 2477urtw_led_init(struct urtw_softc *sc) 2478{ 2479 uint32_t rev; 2480 usb_error_t error; 2481 2482 urtw_read8_m(sc, URTW_PSR, &sc->sc_psr); 2483 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev); 2484 if (error != 0) 2485 goto fail; 2486 2487 switch (rev & URTW_EPROM_CID_MASK) { 2488 case URTW_EPROM_CID_ALPHA0: 2489 sc->sc_strategy = URTW_SW_LED_MODE1; 2490 break; 2491 case URTW_EPROM_CID_SERCOMM_PS: 2492 sc->sc_strategy = URTW_SW_LED_MODE3; 2493 break; 2494 case URTW_EPROM_CID_HW_LED: 2495 sc->sc_strategy = URTW_HW_LED; 2496 break; 2497 case URTW_EPROM_CID_RSVD0: 2498 case URTW_EPROM_CID_RSVD1: 2499 default: 2500 sc->sc_strategy = URTW_SW_LED_MODE0; 2501 break; 2502 } 2503 2504 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2505 2506fail: 2507 return (error); 2508} 2509 2510 2511static usb_error_t 2512urtw_8225_rf_init(struct urtw_softc *sc) 2513{ 2514#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 2515 int i; 2516 uint16_t data; 2517 usb_error_t error; 2518 2519 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2520 if (error) 2521 goto fail; 2522 2523 error = urtw_8225_usb_init(sc); 2524 if (error) 2525 goto fail; 2526 2527 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2528 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2529 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2530 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2531 2532 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2533 if (error) 2534 goto fail; 2535 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2536 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2537 if (error) 2538 goto fail; 2539 2540 error = urtw_8185_rf_pins_enable(sc); 2541 if (error) 2542 goto fail; 2543 usb_pause_mtx(&sc->sc_mtx, 1000); 2544 2545 for (i = 0; i < N(urtw_8225_rf_part1); i++) { 2546 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 2547 urtw_8225_rf_part1[i].val); 2548 usb_pause_mtx(&sc->sc_mtx, 1); 2549 } 2550 usb_pause_mtx(&sc->sc_mtx, 100); 2551 urtw_8225_write(sc, 2552 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2553 usb_pause_mtx(&sc->sc_mtx, 200); 2554 urtw_8225_write(sc, 2555 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2556 usb_pause_mtx(&sc->sc_mtx, 200); 2557 urtw_8225_write(sc, 2558 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 2559 2560 for (i = 0; i < 95; i++) { 2561 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2562 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 2563 } 2564 2565 urtw_8225_write(sc, 2566 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 2567 urtw_8225_write(sc, 2568 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 2569 2570 for (i = 0; i < 128; i++) { 2571 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2572 usb_pause_mtx(&sc->sc_mtx, 1); 2573 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2574 usb_pause_mtx(&sc->sc_mtx, 1); 2575 } 2576 2577 for (i = 0; i < N(urtw_8225_rf_part2); i++) { 2578 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 2579 urtw_8225_rf_part2[i].val); 2580 usb_pause_mtx(&sc->sc_mtx, 1); 2581 } 2582 2583 error = urtw_8225_setgain(sc, 4); 2584 if (error) 2585 goto fail; 2586 2587 for (i = 0; i < N(urtw_8225_rf_part3); i++) { 2588 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 2589 urtw_8225_rf_part3[i].val); 2590 usb_pause_mtx(&sc->sc_mtx, 1); 2591 } 2592 2593 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2594 2595 error = urtw_8225_set_txpwrlvl(sc, 1); 2596 if (error) 2597 goto fail; 2598 2599 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2600 usb_pause_mtx(&sc->sc_mtx, 1); 2601 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2602 usb_pause_mtx(&sc->sc_mtx, 1); 2603 2604 /* TX ant A, 0x0 for B */ 2605 error = urtw_8185_tx_antenna(sc, 0x3); 2606 if (error) 2607 goto fail; 2608 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2609 2610 error = urtw_8225_rf_set_chan(sc, 1); 2611fail: 2612 return (error); 2613#undef N 2614} 2615 2616static usb_error_t 2617urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2618{ 2619 usb_error_t error = 0; 2620 2621 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2622fail: 2623 return (error); 2624} 2625 2626static usb_error_t 2627urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant) 2628{ 2629 usb_error_t error; 2630 2631 urtw_write8_m(sc, URTW_TX_ANTENNA, ant); 2632 usb_pause_mtx(&sc->sc_mtx, 1); 2633fail: 2634 return (error); 2635} 2636 2637static usb_error_t 2638urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2639{ 2640 2641 data = data & 0xff; 2642 return urtw_8187_write_phy(sc, addr, data); 2643} 2644 2645static usb_error_t 2646urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2647{ 2648 2649 data = data & 0xff; 2650 return urtw_8187_write_phy(sc, addr, data | 0x10000); 2651} 2652 2653static usb_error_t 2654urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2655{ 2656 uint32_t phyw; 2657 usb_error_t error; 2658 2659 phyw = ((data << 8) | (addr | 0x80)); 2660 urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24)); 2661 urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16)); 2662 urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8)); 2663 urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff))); 2664 usb_pause_mtx(&sc->sc_mtx, 1); 2665fail: 2666 return (error); 2667} 2668 2669static usb_error_t 2670urtw_8225_setgain(struct urtw_softc *sc, int16_t gain) 2671{ 2672 usb_error_t error; 2673 2674 urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]); 2675 urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]); 2676 urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]); 2677 urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]); 2678fail: 2679 return (error); 2680} 2681 2682static usb_error_t 2683urtw_8225_usb_init(struct urtw_softc *sc) 2684{ 2685 uint8_t data; 2686 usb_error_t error; 2687 2688 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0); 2689 urtw_write8_m(sc, URTW_GPIO, 0); 2690 error = urtw_read8e(sc, 0x53, &data); 2691 if (error) 2692 goto fail; 2693 error = urtw_write8e(sc, 0x53, data | (1 << 7)); 2694 if (error) 2695 goto fail; 2696 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4); 2697 urtw_write8_m(sc, URTW_GPIO, 0x20); 2698 urtw_write8_m(sc, URTW_GP_ENABLE, 0); 2699 2700 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80); 2701 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80); 2702 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80); 2703 2704 usb_pause_mtx(&sc->sc_mtx, 500); 2705fail: 2706 return (error); 2707} 2708 2709static usb_error_t 2710urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data) 2711{ 2712 uint16_t d80, d82, d84; 2713 usb_error_t error; 2714 2715 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80); 2716 d80 &= URTW_RF_PINS_MAGIC1; 2717 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82); 2718 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84); 2719 d84 &= URTW_RF_PINS_MAGIC2; 2720 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3); 2721 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3); 2722 DELAY(10); 2723 2724 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2725 DELAY(2); 2726 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80); 2727 DELAY(10); 2728 2729 error = urtw_8225_write_s16(sc, addr, 0x8225, &data); 2730 if (error != 0) 2731 goto fail; 2732 2733 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2734 DELAY(10); 2735 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2736 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84); 2737 usb_pause_mtx(&sc->sc_mtx, 2); 2738fail: 2739 return (error); 2740} 2741 2742static usb_error_t 2743urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index, 2744 uint16_t *data) 2745{ 2746 uint8_t buf[2]; 2747 uint16_t data16; 2748 struct usb_device_request req; 2749 usb_error_t error = 0; 2750 2751 data16 = *data; 2752 2753 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2754 req.bRequest = URTW_8187_SETREGS_REQ; 2755 USETW(req.wValue, addr); 2756 USETW(req.wIndex, index); 2757 USETW(req.wLength, sizeof(uint16_t)); 2758 buf[0] = (data16 & 0x00ff); 2759 buf[1] = (data16 & 0xff00) >> 8; 2760 2761 error = urtw_do_request(sc, &req, buf); 2762 2763 return (error); 2764} 2765 2766static usb_error_t 2767urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 2768{ 2769 usb_error_t error; 2770 2771 error = urtw_8225_set_txpwrlvl(sc, chan); 2772 if (error) 2773 goto fail; 2774 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2775 usb_pause_mtx(&sc->sc_mtx, 10); 2776fail: 2777 return (error); 2778} 2779 2780static usb_error_t 2781urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens) 2782{ 2783 usb_error_t error; 2784 2785 if (sens < 0 || sens > 6) 2786 return -1; 2787 2788 if (sens > 4) 2789 urtw_8225_write(sc, 2790 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1); 2791 else 2792 urtw_8225_write(sc, 2793 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2); 2794 2795 sens = 6 - sens; 2796 error = urtw_8225_setgain(sc, sens); 2797 if (error) 2798 goto fail; 2799 2800 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 2801 2802fail: 2803 return (error); 2804} 2805 2806static usb_error_t 2807urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 2808{ 2809 int i, idx, set; 2810 uint8_t *cck_pwltable; 2811 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 2812 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2813 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 2814 usb_error_t error; 2815 2816 cck_pwrlvl_max = 11; 2817 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 2818 ofdm_pwrlvl_min = 10; 2819 2820 /* CCK power setting */ 2821 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 2822 idx = cck_pwrlvl % 6; 2823 set = cck_pwrlvl / 6; 2824 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 2825 urtw_8225_txpwr_cck; 2826 2827 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 2828 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2829 for (i = 0; i < 8; i++) { 2830 urtw_8187_write_phy_cck(sc, 0x44 + i, 2831 cck_pwltable[idx * 8 + i]); 2832 } 2833 usb_pause_mtx(&sc->sc_mtx, 1); 2834 2835 /* OFDM power setting */ 2836 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2837 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2838 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 2839 2840 idx = ofdm_pwrlvl % 6; 2841 set = ofdm_pwrlvl / 6; 2842 2843 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2844 if (error) 2845 goto fail; 2846 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 2847 urtw_8187_write_phy_ofdm(sc, 6, 0); 2848 urtw_8187_write_phy_ofdm(sc, 8, 0); 2849 2850 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 2851 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2852 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 2853 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); 2854 usb_pause_mtx(&sc->sc_mtx, 1); 2855fail: 2856 return (error); 2857} 2858 2859 2860static usb_error_t 2861urtw_8225_rf_stop(struct urtw_softc *sc) 2862{ 2863 uint8_t data; 2864 usb_error_t error; 2865 2866 urtw_8225_write(sc, 0x4, 0x1f); 2867 2868 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2869 if (error) 2870 goto fail; 2871 2872 urtw_read8_m(sc, URTW_CONFIG3, &data); 2873 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2874 if (sc->sc_flags & URTW_RTL8187B) { 2875 urtw_write32_m(sc, URTW_ANAPARAM2, 2876 URTW_8187B_8225_ANAPARAM2_OFF); 2877 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 2878 urtw_write32_m(sc, URTW_ANAPARAM3, 2879 URTW_8187B_8225_ANAPARAM3_OFF); 2880 } else { 2881 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 2882 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 2883 } 2884 2885 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2886 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2887 if (error) 2888 goto fail; 2889 2890fail: 2891 return (error); 2892} 2893 2894static usb_error_t 2895urtw_8225v2_rf_init(struct urtw_softc *sc) 2896{ 2897#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 2898 int i; 2899 uint16_t data; 2900 uint32_t data32; 2901 usb_error_t error; 2902 2903 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2904 if (error) 2905 goto fail; 2906 2907 error = urtw_8225_usb_init(sc); 2908 if (error) 2909 goto fail; 2910 2911 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2912 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2913 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2914 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2915 2916 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2917 if (error) 2918 goto fail; 2919 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2920 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2921 if (error) 2922 goto fail; 2923 2924 error = urtw_8185_rf_pins_enable(sc); 2925 if (error) 2926 goto fail; 2927 2928 usb_pause_mtx(&sc->sc_mtx, 500); 2929 2930 for (i = 0; i < N(urtw_8225v2_rf_part1); i++) { 2931 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 2932 urtw_8225v2_rf_part1[i].val); 2933 } 2934 usb_pause_mtx(&sc->sc_mtx, 50); 2935 2936 urtw_8225_write(sc, 2937 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 2938 2939 for (i = 0; i < 95; i++) { 2940 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2941 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 2942 urtw_8225v2_rxgain[i]); 2943 } 2944 2945 urtw_8225_write(sc, 2946 URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1); 2947 urtw_8225_write(sc, 2948 URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1); 2949 urtw_8225_write(sc, 2950 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2); 2951 urtw_8225_write(sc, 2952 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2953 usb_pause_mtx(&sc->sc_mtx, 100); 2954 urtw_8225_write(sc, 2955 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2956 usb_pause_mtx(&sc->sc_mtx, 100); 2957 2958 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2959 if (error != 0) 2960 goto fail; 2961 if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1) 2962 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32); 2963 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) { 2964 urtw_8225_write(sc, 2965 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2966 usb_pause_mtx(&sc->sc_mtx, 100); 2967 urtw_8225_write(sc, 2968 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2969 usb_pause_mtx(&sc->sc_mtx, 50); 2970 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2971 if (error != 0) 2972 goto fail; 2973 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) 2974 device_printf(sc->sc_dev, "RF calibration failed\n"); 2975 } 2976 usb_pause_mtx(&sc->sc_mtx, 100); 2977 2978 urtw_8225_write(sc, 2979 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 2980 for (i = 0; i < 128; i++) { 2981 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2982 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2983 } 2984 2985 for (i = 0; i < N(urtw_8225v2_rf_part2); i++) { 2986 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 2987 urtw_8225v2_rf_part2[i].val); 2988 } 2989 2990 error = urtw_8225v2_setgain(sc, 4); 2991 if (error) 2992 goto fail; 2993 2994 for (i = 0; i < N(urtw_8225v2_rf_part3); i++) { 2995 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 2996 urtw_8225v2_rf_part3[i].val); 2997 } 2998 2999 urtw_write8_m(sc, URTW_TESTR, 0x0d); 3000 3001 error = urtw_8225v2_set_txpwrlvl(sc, 1); 3002 if (error) 3003 goto fail; 3004 3005 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 3006 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 3007 3008 /* TX ant A, 0x0 for B */ 3009 error = urtw_8185_tx_antenna(sc, 0x3); 3010 if (error) 3011 goto fail; 3012 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 3013 3014 error = urtw_8225_rf_set_chan(sc, 1); 3015fail: 3016 return (error); 3017#undef N 3018} 3019 3020static usb_error_t 3021urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 3022{ 3023 usb_error_t error; 3024 3025 error = urtw_8225v2_set_txpwrlvl(sc, chan); 3026 if (error) 3027 goto fail; 3028 3029 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3030 usb_pause_mtx(&sc->sc_mtx, 10); 3031fail: 3032 return (error); 3033} 3034 3035static usb_error_t 3036urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data) 3037{ 3038 int i; 3039 int16_t bit; 3040 uint8_t rlen = 12, wlen = 6; 3041 uint16_t o1, o2, o3, tmp; 3042 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27; 3043 uint32_t mask = 0x80000000, value = 0; 3044 usb_error_t error; 3045 3046 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1); 3047 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2); 3048 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3); 3049 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4); 3050 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4); 3051 o1 &= ~URTW_RF_PINS_MAGIC4; 3052 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN); 3053 DELAY(5); 3054 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1); 3055 DELAY(5); 3056 3057 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) { 3058 bit = ((d2w & mask) != 0) ? 1 : 0; 3059 3060 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3061 DELAY(2); 3062 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3063 URTW_BB_HOST_BANG_CLK); 3064 DELAY(2); 3065 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3066 URTW_BB_HOST_BANG_CLK); 3067 DELAY(2); 3068 mask = mask >> 1; 3069 if (i == 2) 3070 break; 3071 bit = ((d2w & mask) != 0) ? 1 : 0; 3072 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3073 URTW_BB_HOST_BANG_CLK); 3074 DELAY(2); 3075 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3076 URTW_BB_HOST_BANG_CLK); 3077 DELAY(2); 3078 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3079 DELAY(1); 3080 } 3081 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW | 3082 URTW_BB_HOST_BANG_CLK); 3083 DELAY(2); 3084 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW); 3085 DELAY(2); 3086 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW); 3087 DELAY(2); 3088 3089 mask = 0x800; 3090 for (i = 0; i < rlen; i++, mask = mask >> 1) { 3091 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3092 o1 | URTW_BB_HOST_BANG_RW); 3093 DELAY(2); 3094 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3095 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3096 DELAY(2); 3097 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3098 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3099 DELAY(2); 3100 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3101 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3102 DELAY(2); 3103 3104 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp); 3105 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0); 3106 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3107 o1 | URTW_BB_HOST_BANG_RW); 3108 DELAY(2); 3109 } 3110 3111 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN | 3112 URTW_BB_HOST_BANG_RW); 3113 DELAY(2); 3114 3115 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2); 3116 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3); 3117 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1); 3118 3119 if (data != NULL) 3120 *data = value; 3121fail: 3122 return (error); 3123} 3124 3125 3126static usb_error_t 3127urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 3128{ 3129 int i; 3130 uint8_t *cck_pwrtable; 3131 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3132 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3133 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3134 usb_error_t error; 3135 3136 /* CCK power setting */ 3137 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3138 cck_pwrlvl += sc->sc_txpwr_cck_base; 3139 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3140 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3141 urtw_8225v2_txpwr_cck; 3142 3143 for (i = 0; i < 8; i++) 3144 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3145 3146 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3147 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3148 usb_pause_mtx(&sc->sc_mtx, 1); 3149 3150 /* OFDM power setting */ 3151 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3152 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3153 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3154 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3155 3156 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3157 if (error) 3158 goto fail; 3159 3160 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3161 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3162 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3163 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3164 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3165 3166 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3167 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3168 usb_pause_mtx(&sc->sc_mtx, 1); 3169fail: 3170 return (error); 3171} 3172 3173static usb_error_t 3174urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3175{ 3176 uint8_t *gainp; 3177 usb_error_t error; 3178 3179 /* XXX for A? */ 3180 gainp = urtw_8225v2_gain_bg; 3181 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); 3182 usb_pause_mtx(&sc->sc_mtx, 1); 3183 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3184 usb_pause_mtx(&sc->sc_mtx, 1); 3185 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3186 usb_pause_mtx(&sc->sc_mtx, 1); 3187 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3188 usb_pause_mtx(&sc->sc_mtx, 1); 3189fail: 3190 return (error); 3191} 3192 3193static usb_error_t 3194urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3195{ 3196 uint32_t data; 3197 usb_error_t error; 3198 3199 *ret = 1; 3200 3201 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); 3202 urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5); 3203 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5); 3204 usb_pause_mtx(&sc->sc_mtx, 500); 3205 3206 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3207 URTW_8225_ADDR_0_DATA_MAGIC1); 3208 3209 error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data); 3210 if (error != 0) 3211 goto fail; 3212 if (data != URTW_8225_ADDR_8_DATA_MAGIC1) 3213 *ret = 0; 3214 else { 3215 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data); 3216 if (error != 0) 3217 goto fail; 3218 if (data != URTW_8225_ADDR_9_DATA_MAGIC1) 3219 *ret = 0; 3220 } 3221 3222 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3223 URTW_8225_ADDR_0_DATA_MAGIC2); 3224fail: 3225 return (error); 3226} 3227 3228static usb_error_t 3229urtw_8225v2b_rf_init(struct urtw_softc *sc) 3230{ 3231#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 3232 int i; 3233 uint8_t data8; 3234 usb_error_t error; 3235 3236 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3237 if (error) 3238 goto fail; 3239 3240 /* 3241 * initialize extra registers on 8187 3242 */ 3243 urtw_write16_m(sc, URTW_BRSR_8187B, 0xfff); 3244 3245 /* retry limit */ 3246 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3247 data8 |= URTW_CW_CONF_PERPACKET_RETRY; 3248 urtw_write8_m(sc, URTW_CW_CONF, data8); 3249 3250 /* TX AGC */ 3251 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3252 data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN; 3253 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3254 3255 /* Auto Rate Fallback Control */ 3256#define URTW_ARFR 0x1e0 3257 urtw_write16_m(sc, URTW_ARFR, 0xfff); 3258 urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8); 3259 urtw_write8_m(sc, URTW_RATE_FALLBACK, 3260 data8 | URTW_RATE_FALLBACK_ENABLE); 3261 3262 urtw_read8_m(sc, URTW_MSR, &data8); 3263 urtw_write8_m(sc, URTW_MSR, data8 & 0xf3); 3264 urtw_read8_m(sc, URTW_MSR, &data8); 3265 urtw_write8_m(sc, URTW_MSR, data8 | URTW_MSR_LINK_ENEDCA); 3266 urtw_write8_m(sc, URTW_ACM_CONTROL, sc->sc_acmctl); 3267 3268 urtw_write16_m(sc, URTW_ATIM_WND, 2); 3269 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 3270#define URTW_FEMR_FOR_8187B 0x1d4 3271 urtw_write16_m(sc, URTW_FEMR_FOR_8187B, 0xffff); 3272 3273 /* led type */ 3274 urtw_read8_m(sc, URTW_CONFIG1, &data8); 3275 data8 = (data8 & 0x3f) | 0x80; 3276 urtw_write8_m(sc, URTW_CONFIG1, data8); 3277 3278 /* applying MAC address again. */ 3279 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]); 3280 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff); 3281 3282 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3283 if (error) 3284 goto fail; 3285 3286 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 3287 3288 /* 3289 * MAC configuration 3290 */ 3291 for (i = 0; i < N(urtw_8225v2b_rf_part1); i++) 3292 urtw_write8_m(sc, urtw_8225v2b_rf_part1[i].reg, 3293 urtw_8225v2b_rf_part1[i].val); 3294 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 3295 urtw_write16_m(sc, URTW_INT_MIG, 0x0000); 3296 urtw_write32_m(sc, 0x1f0, 0); 3297 urtw_write32_m(sc, 0x1f4, 0); 3298 urtw_write8_m(sc, 0x1f8, 0); 3299 urtw_write32_m(sc, URTW_RF_TIMING, 0x4001); 3300 3301#define URTW_RFSW_CTRL 0x272 3302 urtw_write16_m(sc, URTW_RFSW_CTRL, 0x569a); 3303 3304 /* 3305 * initialize PHY 3306 */ 3307 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3308 if (error) 3309 goto fail; 3310 urtw_read8_m(sc, URTW_CONFIG3, &data8); 3311 urtw_write8_m(sc, URTW_CONFIG3, 3312 data8 | URTW_CONFIG3_ANAPARAM_WRITE); 3313 3314 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3315 if (error) 3316 goto fail; 3317 3318 /* setup RFE initial timing */ 3319 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480); 3320 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488); 3321 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff); 3322 usb_pause_mtx(&sc->sc_mtx, 1100); 3323 3324 for (i = 0; i < N(urtw_8225v2b_rf_part0); i++) { 3325 urtw_8225_write(sc, urtw_8225v2b_rf_part0[i].reg, 3326 urtw_8225v2b_rf_part0[i].val); 3327 usb_pause_mtx(&sc->sc_mtx, 1); 3328 } 3329 urtw_8225_write(sc, 0x00, 0x01b7); 3330 3331 for (i = 0; i < 95; i++) { 3332 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3333 usb_pause_mtx(&sc->sc_mtx, 1); 3334 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 3335 urtw_8225v2b_rxgain[i]); 3336 usb_pause_mtx(&sc->sc_mtx, 1); 3337 } 3338 3339 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 3340 usb_pause_mtx(&sc->sc_mtx, 1); 3341 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 3342 usb_pause_mtx(&sc->sc_mtx, 1); 3343 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 3344 usb_pause_mtx(&sc->sc_mtx, 1); 3345 usb_pause_mtx(&sc->sc_mtx, 3000); 3346 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 3347 usb_pause_mtx(&sc->sc_mtx, 2000); 3348 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 3349 usb_pause_mtx(&sc->sc_mtx, 1); 3350 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 3351 usb_pause_mtx(&sc->sc_mtx, 1); 3352 3353 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 3354 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 3355 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 3356 3357 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 3358 for (i = 0; i < 128; i++) { 3359 uint32_t addr, data; 3360 3361 data = (urtw_8225z2_agc[i] << 8) | 0x0000008f; 3362 addr = ((i + 0x80) << 8) | 0x0000008e; 3363 3364 urtw_8187_write_phy_ofdm(sc, data & 0x7f, (data >> 8) & 0xff); 3365 urtw_8187_write_phy_ofdm(sc, addr & 0x7f, (addr >> 8) & 0xff); 3366 urtw_8187_write_phy_ofdm(sc, 0x0e, 0x00); 3367 } 3368 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 3369 3370 for (i = 0; i < N(urtw_8225v2b_rf_part2); i++) 3371 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 3372 3373 urtw_write32_m(sc, URTW_8187B_AC_VO, (7 << 12) | (3 << 8) | 0x1c); 3374 urtw_write32_m(sc, URTW_8187B_AC_VI, (7 << 12) | (3 << 8) | 0x1c); 3375 urtw_write32_m(sc, URTW_8187B_AC_BE, (7 << 12) | (3 << 8) | 0x1c); 3376 urtw_write32_m(sc, URTW_8187B_AC_BK, (7 << 12) | (3 << 8) | 0x1c); 3377 3378 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 3379 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 3380 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 3381 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 3382 3383fail: 3384 return (error); 3385#undef N 3386} 3387 3388static usb_error_t 3389urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 3390{ 3391 usb_error_t error; 3392 3393 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 3394 if (error) 3395 goto fail; 3396 3397 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3398 usb_pause_mtx(&sc->sc_mtx, 10); 3399fail: 3400 return (error); 3401} 3402 3403static usb_error_t 3404urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 3405{ 3406 int i; 3407 uint8_t *cck_pwrtable; 3408 uint8_t cck_pwrlvl_max = 15; 3409 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3410 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3411 usb_error_t error; 3412 3413 /* CCK power setting */ 3414 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 3415 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 3416 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 3417 cck_pwrlvl += sc->sc_txpwr_cck_base; 3418 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3419 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 3420 urtw_8225v2b_txpwr_cck; 3421 3422 if (sc->sc_flags & URTW_RTL8187B_REV_B) 3423 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 3424 ((cck_pwrlvl <= 11) ? 8 : 16); 3425 else 3426 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 3427 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 3428 3429 for (i = 0; i < 8; i++) 3430 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3431 3432 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3433 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 3434 usb_pause_mtx(&sc->sc_mtx, 1); 3435 3436 /* OFDM power setting */ 3437 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 3438 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 3439 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 3440 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3441 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3442 3443 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3444 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 3445 3446 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 3447 if (ofdm_pwrlvl <= 11) { 3448 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 3449 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 3450 } else { 3451 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3452 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3453 } 3454 } else { 3455 if (ofdm_pwrlvl <= 11) { 3456 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3457 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3458 } else if (ofdm_pwrlvl <= 17) { 3459 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 3460 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 3461 } else { 3462 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 3463 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 3464 } 3465 } 3466 usb_pause_mtx(&sc->sc_mtx, 1); 3467fail: 3468 return (error); 3469} 3470 3471static usb_error_t 3472urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 3473{ 3474 struct usb_device_request req; 3475 usb_error_t error; 3476 3477 req.bmRequestType = UT_READ_VENDOR_DEVICE; 3478 req.bRequest = URTW_8187_GETREGS_REQ; 3479 USETW(req.wValue, val | 0xfe00); 3480 USETW(req.wIndex, 0); 3481 USETW(req.wLength, sizeof(uint8_t)); 3482 3483 error = urtw_do_request(sc, &req, data); 3484 return (error); 3485} 3486 3487static usb_error_t 3488urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 3489{ 3490 struct usb_device_request req; 3491 3492 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 3493 req.bRequest = URTW_8187_SETREGS_REQ; 3494 USETW(req.wValue, val | 0xfe00); 3495 USETW(req.wIndex, 0); 3496 USETW(req.wLength, sizeof(uint8_t)); 3497 3498 return (urtw_do_request(sc, &req, &data)); 3499} 3500 3501static usb_error_t 3502urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 3503{ 3504 uint8_t data; 3505 usb_error_t error; 3506 3507 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3508 if (error) 3509 goto fail; 3510 3511 urtw_read8_m(sc, URTW_CONFIG3, &data); 3512 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3513 urtw_write32_m(sc, URTW_ANAPARAM, val); 3514 urtw_read8_m(sc, URTW_CONFIG3, &data); 3515 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3516 3517 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3518 if (error) 3519 goto fail; 3520fail: 3521 return (error); 3522} 3523 3524static usb_error_t 3525urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 3526{ 3527 uint8_t data; 3528 usb_error_t error; 3529 3530 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3531 if (error) 3532 goto fail; 3533 3534 urtw_read8_m(sc, URTW_CONFIG3, &data); 3535 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3536 urtw_write32_m(sc, URTW_ANAPARAM2, val); 3537 urtw_read8_m(sc, URTW_CONFIG3, &data); 3538 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3539 3540 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3541 if (error) 3542 goto fail; 3543fail: 3544 return (error); 3545} 3546 3547static usb_error_t 3548urtw_intr_enable(struct urtw_softc *sc) 3549{ 3550 usb_error_t error; 3551 3552 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 3553fail: 3554 return (error); 3555} 3556 3557static usb_error_t 3558urtw_intr_disable(struct urtw_softc *sc) 3559{ 3560 usb_error_t error; 3561 3562 urtw_write16_m(sc, URTW_INTR_MASK, 0); 3563fail: 3564 return (error); 3565} 3566 3567static usb_error_t 3568urtw_reset(struct urtw_softc *sc) 3569{ 3570 uint8_t data; 3571 usb_error_t error; 3572 3573 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3574 if (error) 3575 goto fail; 3576 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3577 if (error) 3578 goto fail; 3579 3580 error = urtw_intr_disable(sc); 3581 if (error) 3582 goto fail; 3583 usb_pause_mtx(&sc->sc_mtx, 100); 3584 3585 error = urtw_write8e(sc, 0x18, 0x10); 3586 if (error != 0) 3587 goto fail; 3588 error = urtw_write8e(sc, 0x18, 0x11); 3589 if (error != 0) 3590 goto fail; 3591 error = urtw_write8e(sc, 0x18, 0x00); 3592 if (error != 0) 3593 goto fail; 3594 usb_pause_mtx(&sc->sc_mtx, 100); 3595 3596 urtw_read8_m(sc, URTW_CMD, &data); 3597 data = (data & 0x2) | URTW_CMD_RST; 3598 urtw_write8_m(sc, URTW_CMD, data); 3599 usb_pause_mtx(&sc->sc_mtx, 100); 3600 3601 urtw_read8_m(sc, URTW_CMD, &data); 3602 if (data & URTW_CMD_RST) { 3603 device_printf(sc->sc_dev, "reset timeout\n"); 3604 goto fail; 3605 } 3606 3607 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 3608 if (error) 3609 goto fail; 3610 usb_pause_mtx(&sc->sc_mtx, 100); 3611 3612 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3613 if (error) 3614 goto fail; 3615 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3616 if (error) 3617 goto fail; 3618fail: 3619 return (error); 3620} 3621 3622static usb_error_t 3623urtw_led_ctl(struct urtw_softc *sc, int mode) 3624{ 3625 usb_error_t error = 0; 3626 3627 switch (sc->sc_strategy) { 3628 case URTW_SW_LED_MODE0: 3629 error = urtw_led_mode0(sc, mode); 3630 break; 3631 case URTW_SW_LED_MODE1: 3632 error = urtw_led_mode1(sc, mode); 3633 break; 3634 case URTW_SW_LED_MODE2: 3635 error = urtw_led_mode2(sc, mode); 3636 break; 3637 case URTW_SW_LED_MODE3: 3638 error = urtw_led_mode3(sc, mode); 3639 break; 3640 default: 3641 DPRINTF(sc, URTW_DEBUG_STATE, 3642 "unsupported LED mode %d\n", sc->sc_strategy); 3643 error = USB_ERR_INVAL; 3644 break; 3645 } 3646 3647 return (error); 3648} 3649 3650static usb_error_t 3651urtw_led_mode0(struct urtw_softc *sc, int mode) 3652{ 3653 3654 switch (mode) { 3655 case URTW_LED_CTL_POWER_ON: 3656 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 3657 break; 3658 case URTW_LED_CTL_TX: 3659 if (sc->sc_gpio_ledinprogress == 1) 3660 return (0); 3661 3662 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 3663 sc->sc_gpio_blinktime = 2; 3664 break; 3665 case URTW_LED_CTL_LINK: 3666 sc->sc_gpio_ledstate = URTW_LED_ON; 3667 break; 3668 default: 3669 DPRINTF(sc, URTW_DEBUG_STATE, 3670 "unsupported LED mode 0x%x", mode); 3671 return (USB_ERR_INVAL); 3672 } 3673 3674 switch (sc->sc_gpio_ledstate) { 3675 case URTW_LED_ON: 3676 if (sc->sc_gpio_ledinprogress != 0) 3677 break; 3678 urtw_led_on(sc, URTW_LED_GPIO); 3679 break; 3680 case URTW_LED_BLINK_NORMAL: 3681 if (sc->sc_gpio_ledinprogress != 0) 3682 break; 3683 sc->sc_gpio_ledinprogress = 1; 3684 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 3685 URTW_LED_OFF : URTW_LED_ON; 3686 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3687 break; 3688 case URTW_LED_POWER_ON_BLINK: 3689 urtw_led_on(sc, URTW_LED_GPIO); 3690 usb_pause_mtx(&sc->sc_mtx, 100); 3691 urtw_led_off(sc, URTW_LED_GPIO); 3692 break; 3693 default: 3694 DPRINTF(sc, URTW_DEBUG_STATE, 3695 "unknown LED status 0x%x", sc->sc_gpio_ledstate); 3696 return (USB_ERR_INVAL); 3697 } 3698 return (0); 3699} 3700 3701static usb_error_t 3702urtw_led_mode1(struct urtw_softc *sc, int mode) 3703{ 3704 return (USB_ERR_INVAL); 3705} 3706 3707static usb_error_t 3708urtw_led_mode2(struct urtw_softc *sc, int mode) 3709{ 3710 return (USB_ERR_INVAL); 3711} 3712 3713static usb_error_t 3714urtw_led_mode3(struct urtw_softc *sc, int mode) 3715{ 3716 return (USB_ERR_INVAL); 3717} 3718 3719static usb_error_t 3720urtw_led_on(struct urtw_softc *sc, int type) 3721{ 3722 usb_error_t error; 3723 3724 if (type == URTW_LED_GPIO) { 3725 switch (sc->sc_gpio_ledpin) { 3726 case URTW_LED_PIN_GPIO0: 3727 urtw_write8_m(sc, URTW_GPIO, 0x01); 3728 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 3729 break; 3730 default: 3731 DPRINTF(sc, URTW_DEBUG_STATE, 3732 "unsupported LED PIN type 0x%x", 3733 sc->sc_gpio_ledpin); 3734 error = USB_ERR_INVAL; 3735 goto fail; 3736 } 3737 } else { 3738 DPRINTF(sc, URTW_DEBUG_STATE, 3739 "unsupported LED type 0x%x", type); 3740 error = USB_ERR_INVAL; 3741 goto fail; 3742 } 3743 3744 sc->sc_gpio_ledon = 1; 3745fail: 3746 return (error); 3747} 3748 3749static usb_error_t 3750urtw_led_off(struct urtw_softc *sc, int type) 3751{ 3752 usb_error_t error; 3753 3754 if (type == URTW_LED_GPIO) { 3755 switch (sc->sc_gpio_ledpin) { 3756 case URTW_LED_PIN_GPIO0: 3757 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 3758 urtw_write8_m(sc, 3759 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 3760 break; 3761 default: 3762 DPRINTF(sc, URTW_DEBUG_STATE, 3763 "unsupported LED PIN type 0x%x", 3764 sc->sc_gpio_ledpin); 3765 error = USB_ERR_INVAL; 3766 goto fail; 3767 } 3768 } else { 3769 DPRINTF(sc, URTW_DEBUG_STATE, 3770 "unsupported LED type 0x%x", type); 3771 error = USB_ERR_INVAL; 3772 goto fail; 3773 } 3774 3775 sc->sc_gpio_ledon = 0; 3776 3777fail: 3778 return (error); 3779} 3780 3781static void 3782urtw_led_ch(void *arg) 3783{ 3784 struct urtw_softc *sc = arg; 3785 struct ifnet *ifp = sc->sc_ifp; 3786 struct ieee80211com *ic = ifp->if_l2com; 3787 3788 ieee80211_runtask(ic, &sc->sc_led_task); 3789} 3790 3791static void 3792urtw_ledtask(void *arg, int pending) 3793{ 3794 struct urtw_softc *sc = arg; 3795 3796 if (sc->sc_strategy != URTW_SW_LED_MODE0) { 3797 DPRINTF(sc, URTW_DEBUG_STATE, 3798 "could not process a LED strategy 0x%x", 3799 sc->sc_strategy); 3800 return; 3801 } 3802 3803 URTW_LOCK(sc); 3804 urtw_led_blink(sc); 3805 URTW_UNLOCK(sc); 3806} 3807 3808static usb_error_t 3809urtw_led_blink(struct urtw_softc *sc) 3810{ 3811 uint8_t ing = 0; 3812 usb_error_t error; 3813 3814 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 3815 error = urtw_led_on(sc, URTW_LED_GPIO); 3816 else 3817 error = urtw_led_off(sc, URTW_LED_GPIO); 3818 sc->sc_gpio_blinktime--; 3819 if (sc->sc_gpio_blinktime == 0) 3820 ing = 1; 3821 else { 3822 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 3823 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 3824 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 3825 ing = 1; 3826 } 3827 if (ing == 1) { 3828 if (sc->sc_gpio_ledstate == URTW_LED_ON && 3829 sc->sc_gpio_ledon == 0) 3830 error = urtw_led_on(sc, URTW_LED_GPIO); 3831 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 3832 sc->sc_gpio_ledon == 1) 3833 error = urtw_led_off(sc, URTW_LED_GPIO); 3834 3835 sc->sc_gpio_blinktime = 0; 3836 sc->sc_gpio_ledinprogress = 0; 3837 return (0); 3838 } 3839 3840 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 3841 URTW_LED_ON : URTW_LED_OFF; 3842 3843 switch (sc->sc_gpio_ledstate) { 3844 case URTW_LED_BLINK_NORMAL: 3845 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3846 break; 3847 default: 3848 DPRINTF(sc, URTW_DEBUG_STATE, 3849 "unknown LED status 0x%x", 3850 sc->sc_gpio_ledstate); 3851 return (USB_ERR_INVAL); 3852 } 3853 return (0); 3854} 3855 3856static usb_error_t 3857urtw_rx_enable(struct urtw_softc *sc) 3858{ 3859 uint8_t data; 3860 usb_error_t error; 3861 3862 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 3863 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 3864 3865 error = urtw_rx_setconf(sc); 3866 if (error != 0) 3867 goto fail; 3868 3869 if ((sc->sc_flags & URTW_RTL8187B) == 0) { 3870 urtw_read8_m(sc, URTW_CMD, &data); 3871 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 3872 } 3873fail: 3874 return (error); 3875} 3876 3877static usb_error_t 3878urtw_tx_enable(struct urtw_softc *sc) 3879{ 3880 uint8_t data8; 3881 uint32_t data; 3882 usb_error_t error; 3883 3884 if (sc->sc_flags & URTW_RTL8187B) { 3885 urtw_read32_m(sc, URTW_TX_CONF, &data); 3886 data &= ~URTW_TX_LOOPBACK_MASK; 3887 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3888 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3889 data &= ~URTW_TX_SWPLCPLEN; 3890 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 3891 (7 << 8) | /* short retry limit */ 3892 (7 << 0) | /* long retry limit */ 3893 (7 << 21); /* MAX TX DMA */ 3894 urtw_write32_m(sc, URTW_TX_CONF, data); 3895 3896 urtw_read8_m(sc, URTW_MSR, &data8); 3897 data8 |= URTW_MSR_LINK_ENEDCA; 3898 urtw_write8_m(sc, URTW_MSR, data8); 3899 return (error); 3900 } 3901 3902 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3903 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 3904 urtw_write8_m(sc, URTW_CW_CONF, data8); 3905 3906 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3907 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 3908 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 3909 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 3910 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3911 3912 urtw_read32_m(sc, URTW_TX_CONF, &data); 3913 data &= ~URTW_TX_LOOPBACK_MASK; 3914 data |= URTW_TX_LOOPBACK_NONE; 3915 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3916 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 3917 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 3918 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3919 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 3920 data &= ~URTW_TX_SWPLCPLEN; 3921 data |= URTW_TX_NOICV; 3922 urtw_write32_m(sc, URTW_TX_CONF, data); 3923 3924 urtw_read8_m(sc, URTW_CMD, &data8); 3925 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3926fail: 3927 return (error); 3928} 3929 3930static usb_error_t 3931urtw_rx_setconf(struct urtw_softc *sc) 3932{ 3933 struct ifnet *ifp = sc->sc_ifp; 3934 struct ieee80211com *ic = ifp->if_l2com; 3935 uint32_t data; 3936 usb_error_t error; 3937 3938 urtw_read32_m(sc, URTW_RX, &data); 3939 data = data &~ URTW_RX_FILTER_MASK; 3940 if (sc->sc_flags & URTW_RTL8187B) { 3941 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 3942 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 3943 URTW_RX_FILTER_NICMAC | URTW_RX_CHECK_BSSID | 3944 URTW_RX_FIFO_THRESHOLD_NONE | 3945 URTW_MAX_RX_DMA_2048 | 3946 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 3947 } else { 3948 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 3949 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 3950 3951 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 3952 data = data | URTW_RX_FILTER_ICVERR; 3953 data = data | URTW_RX_FILTER_PWR; 3954 } 3955 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 3956 data = data | URTW_RX_FILTER_CRCERR; 3957 3958 if (ic->ic_opmode == IEEE80211_M_MONITOR || 3959 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) { 3960 data = data | URTW_RX_FILTER_ALLMAC; 3961 } else { 3962 data = data | URTW_RX_FILTER_NICMAC; 3963 data = data | URTW_RX_CHECK_BSSID; 3964 } 3965 3966 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 3967 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 3968 URTW_RX_AUTORESETPHY; 3969 data = data &~ URTW_MAX_RX_DMA_MASK; 3970 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 3971 } 3972 3973 urtw_write32_m(sc, URTW_RX, data); 3974fail: 3975 return (error); 3976} 3977 3978static struct mbuf * 3979urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3980 int8_t *nf_p) 3981{ 3982 int actlen, flen, rssi; 3983 struct ieee80211_frame *wh; 3984 struct mbuf *m, *mnew; 3985 struct urtw_softc *sc = data->sc; 3986 struct ifnet *ifp = sc->sc_ifp; 3987 struct ieee80211com *ic = ifp->if_l2com; 3988 uint8_t noise = 0, rate; 3989 3990 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 3991 3992 if (actlen < (int)URTW_MIN_RXBUFSZ) { 3993 ifp->if_ierrors++; 3994 return (NULL); 3995 } 3996 3997 if (sc->sc_flags & URTW_RTL8187B) { 3998 struct urtw_8187b_rxhdr *rx; 3999 4000 rx = (struct urtw_8187b_rxhdr *)(data->buf + 4001 (actlen - (sizeof(struct urtw_8187b_rxhdr)))); 4002 flen = le32toh(rx->flag) & 0xfff; 4003 if (flen > actlen) { 4004 ifp->if_ierrors++; 4005 return (NULL); 4006 } 4007 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 4008 /* XXX correct? */ 4009 rssi = rx->rssi & URTW_RX_RSSI_MASK; 4010 noise = rx->noise; 4011 } else { 4012 struct urtw_8187l_rxhdr *rx; 4013 4014 rx = (struct urtw_8187l_rxhdr *)(data->buf + 4015 (actlen - (sizeof(struct urtw_8187l_rxhdr)))); 4016 flen = le32toh(rx->flag) & 0xfff; 4017 if (flen > actlen) { 4018 ifp->if_ierrors++; 4019 return (NULL); 4020 } 4021 4022 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 4023 /* XXX correct? */ 4024 rssi = rx->rssi & URTW_RX_8187L_RSSI_MASK; 4025 noise = rx->noise; 4026 } 4027 4028 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 4029 if (mnew == NULL) { 4030 ifp->if_ierrors++; 4031 return (NULL); 4032 } 4033 4034 m = data->m; 4035 data->m = mnew; 4036 data->buf = mtod(mnew, uint8_t *); 4037 4038 /* finalize mbuf */ 4039 m->m_pkthdr.rcvif = ifp; 4040 m->m_pkthdr.len = m->m_len = flen - IEEE80211_CRC_LEN; 4041 4042 if (ieee80211_radiotap_active(ic)) { 4043 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 4044 4045 /* XXX Are variables correct? */ 4046 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 4047 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 4048 tap->wr_dbm_antsignal = (int8_t)rssi; 4049 } 4050 4051 wh = mtod(m, struct ieee80211_frame *); 4052 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) 4053 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 4054 4055 *rssi_p = rssi; 4056 *nf_p = noise; /* XXX correct? */ 4057 4058 return (m); 4059} 4060 4061static void 4062urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 4063{ 4064 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4065 struct ifnet *ifp = sc->sc_ifp; 4066 struct ieee80211com *ic = ifp->if_l2com; 4067 struct ieee80211_frame *wh; 4068 struct ieee80211_node *ni; 4069 struct mbuf *m = NULL; 4070 struct urtw_data *data; 4071 int8_t nf = -95; 4072 int rssi = 1; 4073 4074 URTW_ASSERT_LOCKED(sc); 4075 4076 switch (USB_GET_STATE(xfer)) { 4077 case USB_ST_TRANSFERRED: 4078 data = STAILQ_FIRST(&sc->sc_rx_active); 4079 if (data == NULL) 4080 goto setup; 4081 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4082 m = urtw_rxeof(xfer, data, &rssi, &nf); 4083 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4084 /* FALLTHROUGH */ 4085 case USB_ST_SETUP: 4086setup: 4087 data = STAILQ_FIRST(&sc->sc_rx_inactive); 4088 if (data == NULL) { 4089 KASSERT(m == NULL, ("mbuf isn't NULL")); 4090 return; 4091 } 4092 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 4093 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 4094 usbd_xfer_set_frame_data(xfer, 0, data->buf, 4095 usbd_xfer_max_len(xfer)); 4096 usbd_transfer_submit(xfer); 4097 4098 /* 4099 * To avoid LOR we should unlock our private mutex here to call 4100 * ieee80211_input() because here is at the end of a USB 4101 * callback and safe to unlock. 4102 */ 4103 URTW_UNLOCK(sc); 4104 if (m != NULL) { 4105 wh = mtod(m, struct ieee80211_frame *); 4106 ni = ieee80211_find_rxnode(ic, 4107 (struct ieee80211_frame_min *)wh); 4108 if (ni != NULL) { 4109 (void) ieee80211_input(ni, m, rssi, nf); 4110 /* node is no longer needed */ 4111 ieee80211_free_node(ni); 4112 } else 4113 (void) ieee80211_input_all(ic, m, rssi, nf); 4114 m = NULL; 4115 } 4116 URTW_LOCK(sc); 4117 break; 4118 default: 4119 /* needs it to the inactive queue due to a error. */ 4120 data = STAILQ_FIRST(&sc->sc_rx_active); 4121 if (data != NULL) { 4122 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4123 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4124 } 4125 if (error != USB_ERR_CANCELLED) { 4126 usbd_xfer_set_stall(xfer); 4127 ifp->if_ierrors++; 4128 goto setup; 4129 } 4130 break; 4131 } 4132} 4133 4134#define URTW_STATUS_TYPE_TXCLOSE 1 4135#define URTW_STATUS_TYPE_BEACON_INTR 0 4136 4137static void 4138urtw_txstatus_eof(struct usb_xfer *xfer) 4139{ 4140 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4141 struct ifnet *ifp = sc->sc_ifp; 4142 int actlen, type, pktretry, seq; 4143 uint64_t val; 4144 4145 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 4146 4147 if (actlen != sizeof(uint64_t)) 4148 return; 4149 4150 val = le64toh(sc->sc_txstatus); 4151 type = (val >> 30) & 0x3; 4152 if (type == URTW_STATUS_TYPE_TXCLOSE) { 4153 pktretry = val & 0xff; 4154 seq = (val >> 16) & 0xff; 4155 if (pktretry == URTW_TX_MAXRETRY) 4156 ifp->if_oerrors++; 4157 DPRINTF(sc, URTW_DEBUG_TXSTATUS, "pktretry %d seq %#x\n", 4158 pktretry, seq); 4159 } 4160} 4161 4162static void 4163urtw_bulk_tx_status_callback(struct usb_xfer *xfer, usb_error_t error) 4164{ 4165 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4166 struct ifnet *ifp = sc->sc_ifp; 4167 void *dma_buf = usbd_xfer_get_frame_buffer(xfer, 0); 4168 4169 URTW_ASSERT_LOCKED(sc); 4170 4171 switch (USB_GET_STATE(xfer)) { 4172 case USB_ST_TRANSFERRED: 4173 urtw_txstatus_eof(xfer); 4174 /* FALLTHROUGH */ 4175 case USB_ST_SETUP: 4176setup: 4177 memcpy(dma_buf, &sc->sc_txstatus, sizeof(uint64_t)); 4178 usbd_xfer_set_frame_len(xfer, 0, sizeof(uint64_t)); 4179 usbd_transfer_submit(xfer); 4180 break; 4181 default: 4182 if (error != USB_ERR_CANCELLED) { 4183 usbd_xfer_set_stall(xfer); 4184 ifp->if_ierrors++; 4185 goto setup; 4186 } 4187 break; 4188 } 4189} 4190 4191static void 4192urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data) 4193{ 4194 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4195 struct ifnet *ifp = sc->sc_ifp; 4196 struct mbuf *m; 4197 4198 URTW_ASSERT_LOCKED(sc); 4199 4200 /* 4201 * Do any tx complete callback. Note this must be done before releasing 4202 * the node reference. 4203 */ 4204 if (data->m) { 4205 m = data->m; 4206 if (m->m_flags & M_TXCB) { 4207 /* XXX status? */ 4208 ieee80211_process_callback(data->ni, m, 0); 4209 } 4210 m_freem(m); 4211 data->m = NULL; 4212 } 4213 if (data->ni) { 4214 ieee80211_free_node(data->ni); 4215 data->ni = NULL; 4216 } 4217 sc->sc_txtimer = 0; 4218 ifp->if_opackets++; 4219 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 4220} 4221 4222static void 4223urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 4224{ 4225 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4226 struct ifnet *ifp = sc->sc_ifp; 4227 struct urtw_data *data; 4228 4229 URTW_ASSERT_LOCKED(sc); 4230 4231 switch (USB_GET_STATE(xfer)) { 4232 case USB_ST_TRANSFERRED: 4233 data = STAILQ_FIRST(&sc->sc_tx_active); 4234 if (data == NULL) 4235 goto setup; 4236 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 4237 urtw_txeof(xfer, data); 4238 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 4239 /* FALLTHROUGH */ 4240 case USB_ST_SETUP: 4241setup: 4242 data = STAILQ_FIRST(&sc->sc_tx_pending); 4243 if (data == NULL) { 4244 DPRINTF(sc, URTW_DEBUG_XMIT, 4245 "%s: empty pending queue\n", __func__); 4246 return; 4247 } 4248 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 4249 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 4250 4251 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 4252 usbd_transfer_submit(xfer); 4253 4254 URTW_UNLOCK(sc); 4255 urtw_start(ifp); 4256 URTW_LOCK(sc); 4257 break; 4258 default: 4259 data = STAILQ_FIRST(&sc->sc_tx_active); 4260 if (data == NULL) 4261 goto setup; 4262 if (data->ni != NULL) { 4263 ieee80211_free_node(data->ni); 4264 data->ni = NULL; 4265 ifp->if_oerrors++; 4266 } 4267 if (error != USB_ERR_CANCELLED) { 4268 usbd_xfer_set_stall(xfer); 4269 goto setup; 4270 } 4271 break; 4272 } 4273} 4274 4275static struct urtw_data * 4276_urtw_getbuf(struct urtw_softc *sc) 4277{ 4278 struct urtw_data *bf; 4279 4280 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 4281 if (bf != NULL) 4282 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 4283 else 4284 bf = NULL; 4285 if (bf == NULL) 4286 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__, 4287 "out of xmit buffers"); 4288 return (bf); 4289} 4290 4291static struct urtw_data * 4292urtw_getbuf(struct urtw_softc *sc) 4293{ 4294 struct urtw_data *bf; 4295 4296 URTW_ASSERT_LOCKED(sc); 4297 4298 bf = _urtw_getbuf(sc); 4299 if (bf == NULL) { 4300 struct ifnet *ifp = sc->sc_ifp; 4301 4302 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4303 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 4304 } 4305 return (bf); 4306} 4307 4308static int 4309urtw_isbmode(uint16_t rate) 4310{ 4311 4312 return ((rate <= 22 && rate != 12 && rate != 18) || 4313 rate == 44) ? (1) : (0); 4314} 4315 4316static uint16_t 4317urtw_rate2dbps(uint16_t rate) 4318{ 4319 4320 switch(rate) { 4321 case 12: 4322 case 18: 4323 case 24: 4324 case 36: 4325 case 48: 4326 case 72: 4327 case 96: 4328 case 108: 4329 return (rate * 2); 4330 default: 4331 break; 4332 } 4333 return (24); 4334} 4335 4336static int 4337urtw_compute_txtime(uint16_t framelen, uint16_t rate, 4338 uint8_t ismgt, uint8_t isshort) 4339{ 4340 uint16_t ceiling, frametime, n_dbps; 4341 4342 if (urtw_isbmode(rate)) { 4343 if (ismgt || !isshort || rate == 2) 4344 frametime = (uint16_t)(144 + 48 + 4345 (framelen * 8 / (rate / 2))); 4346 else 4347 frametime = (uint16_t)(72 + 24 + 4348 (framelen * 8 / (rate / 2))); 4349 if ((framelen * 8 % (rate / 2)) != 0) 4350 frametime++; 4351 } else { 4352 n_dbps = urtw_rate2dbps(rate); 4353 ceiling = (16 + 8 * framelen + 6) / n_dbps 4354 + (((16 + 8 * framelen + 6) % n_dbps) ? 1 : 0); 4355 frametime = (uint16_t)(16 + 4 + 4 * ceiling + 6); 4356 } 4357 return (frametime); 4358} 4359 4360/* 4361 * Callback from the 802.11 layer to update the 4362 * slot time based on the current setting. 4363 */ 4364static void 4365urtw_updateslot(struct ifnet *ifp) 4366{ 4367 struct urtw_softc *sc = ifp->if_softc; 4368 struct ieee80211com *ic = ifp->if_l2com; 4369 4370 ieee80211_runtask(ic, &sc->sc_updateslot_task); 4371} 4372 4373static void 4374urtw_updateslottask(void *arg, int pending) 4375{ 4376 struct urtw_softc *sc = arg; 4377 struct ifnet *ifp = sc->sc_ifp; 4378 struct ieee80211com *ic = ifp->if_l2com; 4379 int error; 4380 4381 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 4382 return; 4383 4384 URTW_LOCK(sc); 4385 if (sc->sc_flags & URTW_RTL8187B) { 4386 urtw_write8_m(sc, URTW_SIFS, 0x22); 4387 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) 4388 urtw_write8_m(sc, URTW_SLOT, 0x9); 4389 else 4390 urtw_write8_m(sc, URTW_SLOT, 0x14); 4391 urtw_write8_m(sc, URTW_8187B_EIFS, 0x5b); 4392 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 0x5b); 4393 } else { 4394 urtw_write8_m(sc, URTW_SIFS, 0x22); 4395 if (sc->sc_state == IEEE80211_S_ASSOC && 4396 ic->ic_flags & IEEE80211_F_SHSLOT) 4397 urtw_write8_m(sc, URTW_SLOT, 0x9); 4398 else 4399 urtw_write8_m(sc, URTW_SLOT, 0x14); 4400 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) { 4401 urtw_write8_m(sc, URTW_DIFS, 0x14); 4402 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 4403 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 4404 } else { 4405 urtw_write8_m(sc, URTW_DIFS, 0x24); 4406 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 4407 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 4408 } 4409 } 4410fail: 4411 URTW_UNLOCK(sc); 4412} 4413 4414static void 4415urtw_sysctl_node(struct urtw_softc *sc) 4416{ 4417#define URTW_SYSCTL_STAT_ADD32(c, h, n, p, d) \ 4418 SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d) 4419 struct sysctl_ctx_list *ctx; 4420 struct sysctl_oid_list *child, *parent; 4421 struct sysctl_oid *tree; 4422 struct urtw_stats *stats = &sc->sc_stats; 4423 4424 ctx = device_get_sysctl_ctx(sc->sc_dev); 4425 child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev)); 4426 4427 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD, 4428 NULL, "URTW statistics"); 4429 parent = SYSCTL_CHILDREN(tree); 4430 4431 /* Tx statistics. */ 4432 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx", CTLFLAG_RD, 4433 NULL, "Tx MAC statistics"); 4434 child = SYSCTL_CHILDREN(tree); 4435 URTW_SYSCTL_STAT_ADD32(ctx, child, "1m", &stats->txrates[0], 4436 "1 Mbit/s"); 4437 URTW_SYSCTL_STAT_ADD32(ctx, child, "2m", &stats->txrates[1], 4438 "2 Mbit/s"); 4439 URTW_SYSCTL_STAT_ADD32(ctx, child, "5.5m", &stats->txrates[2], 4440 "5.5 Mbit/s"); 4441 URTW_SYSCTL_STAT_ADD32(ctx, child, "6m", &stats->txrates[4], 4442 "6 Mbit/s"); 4443 URTW_SYSCTL_STAT_ADD32(ctx, child, "9m", &stats->txrates[5], 4444 "9 Mbit/s"); 4445 URTW_SYSCTL_STAT_ADD32(ctx, child, "11m", &stats->txrates[3], 4446 "11 Mbit/s"); 4447 URTW_SYSCTL_STAT_ADD32(ctx, child, "12m", &stats->txrates[6], 4448 "12 Mbit/s"); 4449 URTW_SYSCTL_STAT_ADD32(ctx, child, "18m", &stats->txrates[7], 4450 "18 Mbit/s"); 4451 URTW_SYSCTL_STAT_ADD32(ctx, child, "24m", &stats->txrates[8], 4452 "24 Mbit/s"); 4453 URTW_SYSCTL_STAT_ADD32(ctx, child, "36m", &stats->txrates[9], 4454 "36 Mbit/s"); 4455 URTW_SYSCTL_STAT_ADD32(ctx, child, "48m", &stats->txrates[10], 4456 "48 Mbit/s"); 4457 URTW_SYSCTL_STAT_ADD32(ctx, child, "54m", &stats->txrates[11], 4458 "54 Mbit/s"); 4459#undef URTW_SYSCTL_STAT_ADD32 4460} 4461 4462static device_method_t urtw_methods[] = { 4463 DEVMETHOD(device_probe, urtw_match), 4464 DEVMETHOD(device_attach, urtw_attach), 4465 DEVMETHOD(device_detach, urtw_detach), 4466 DEVMETHOD_END 4467}; 4468static driver_t urtw_driver = { 4469 .name = "urtw", 4470 .methods = urtw_methods, 4471 .size = sizeof(struct urtw_softc) 4472}; 4473static devclass_t urtw_devclass; 4474 4475DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4476MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4477MODULE_DEPEND(urtw, usb, 1, 1, 1); 4478MODULE_VERSION(urtw, 1); 4479