1/*- 2 * Copyright (c) 2010-2016 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * This software was developed in part by Philip Paeps under contract for 6 * Solarflare Communications, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright notice, 12 * this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright notice, 14 * this list of conditions and the following disclaimer in the documentation 15 * and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * The views and conclusions contained in the software and documentation are 30 * those of the authors and should not be interpreted as representing official 31 * policies, either expressed or implied, of the FreeBSD Project. 32 */ 33 34#include <sys/cdefs.h> 35__FBSDID("$FreeBSD: stable/10/sys/dev/sfxge/sfxge.c 342529 2018-12-26 10:39:34Z arybchik $"); 36 37#include <sys/param.h> 38#include <sys/kernel.h> 39#include <sys/bus.h> 40#include <sys/rman.h> 41#include <sys/lock.h> 42#include <sys/module.h> 43#include <sys/mutex.h> 44#include <sys/smp.h> 45#include <sys/socket.h> 46#include <sys/taskqueue.h> 47#include <sys/sockio.h> 48#include <sys/sysctl.h> 49#include <sys/priv.h> 50#include <sys/syslog.h> 51 52#include <dev/pci/pcireg.h> 53#include <dev/pci/pcivar.h> 54 55#include <net/ethernet.h> 56#include <net/if.h> 57#include <net/if_media.h> 58#include <net/if_types.h> 59 60#include "common/efx.h" 61 62#include "sfxge.h" 63#include "sfxge_rx.h" 64#include "sfxge_ioc.h" 65#include "sfxge_version.h" 66 67#define SFXGE_CAP (IFCAP_VLAN_MTU | IFCAP_VLAN_HWCSUM | \ 68 IFCAP_RXCSUM | IFCAP_TXCSUM | \ 69 IFCAP_RXCSUM_IPV6 | IFCAP_TXCSUM_IPV6 | \ 70 IFCAP_TSO4 | IFCAP_TSO6 | \ 71 IFCAP_JUMBO_MTU | \ 72 IFCAP_VLAN_HWTSO | IFCAP_LINKSTATE | IFCAP_HWSTATS) 73#define SFXGE_CAP_ENABLE SFXGE_CAP 74#define SFXGE_CAP_FIXED (IFCAP_VLAN_MTU | \ 75 IFCAP_JUMBO_MTU | IFCAP_LINKSTATE | IFCAP_HWSTATS) 76 77MALLOC_DEFINE(M_SFXGE, "sfxge", "Solarflare 10GigE driver"); 78 79 80SYSCTL_NODE(_hw, OID_AUTO, sfxge, CTLFLAG_RD, 0, 81 "SFXGE driver parameters"); 82 83#define SFXGE_PARAM_RX_RING SFXGE_PARAM(rx_ring) 84static int sfxge_rx_ring_entries = SFXGE_NDESCS; 85TUNABLE_INT(SFXGE_PARAM_RX_RING, &sfxge_rx_ring_entries); 86SYSCTL_INT(_hw_sfxge, OID_AUTO, rx_ring, CTLFLAG_RDTUN, 87 &sfxge_rx_ring_entries, 0, 88 "Maximum number of descriptors in a receive ring"); 89 90#define SFXGE_PARAM_TX_RING SFXGE_PARAM(tx_ring) 91static int sfxge_tx_ring_entries = SFXGE_NDESCS; 92TUNABLE_INT(SFXGE_PARAM_TX_RING, &sfxge_tx_ring_entries); 93SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_ring, CTLFLAG_RDTUN, 94 &sfxge_tx_ring_entries, 0, 95 "Maximum number of descriptors in a transmit ring"); 96 97#define SFXGE_PARAM_RESTART_ATTEMPTS SFXGE_PARAM(restart_attempts) 98static int sfxge_restart_attempts = 3; 99TUNABLE_INT(SFXGE_PARAM_RESTART_ATTEMPTS, &sfxge_restart_attempts); 100SYSCTL_INT(_hw_sfxge, OID_AUTO, restart_attempts, CTLFLAG_RDTUN, 101 &sfxge_restart_attempts, 0, 102 "Maximum number of attempts to bring interface up after reset"); 103 104#if EFSYS_OPT_MCDI_LOGGING 105#define SFXGE_PARAM_MCDI_LOGGING SFXGE_PARAM(mcdi_logging) 106static int sfxge_mcdi_logging = 0; 107TUNABLE_INT(SFXGE_PARAM_MCDI_LOGGING, &sfxge_mcdi_logging); 108#endif 109 110static void 111sfxge_reset(void *arg, int npending); 112 113static int 114sfxge_estimate_rsrc_limits(struct sfxge_softc *sc) 115{ 116 efx_drv_limits_t limits; 117 int rc; 118 unsigned int evq_max; 119 uint32_t evq_allocated; 120 uint32_t rxq_allocated; 121 uint32_t txq_allocated; 122 123 /* 124 * Limit the number of event queues to: 125 * - number of CPUs 126 * - hardwire maximum RSS channels 127 * - administratively specified maximum RSS channels 128 */ 129 evq_max = MIN(mp_ncpus, EFX_MAXRSS); 130 if (sc->max_rss_channels > 0) 131 evq_max = MIN(evq_max, sc->max_rss_channels); 132 133 memset(&limits, 0, sizeof(limits)); 134 135 limits.edl_min_evq_count = 1; 136 limits.edl_max_evq_count = evq_max; 137 limits.edl_min_txq_count = SFXGE_EVQ0_N_TXQ(sc); 138 limits.edl_max_txq_count = evq_max + SFXGE_EVQ0_N_TXQ(sc) - 1; 139 limits.edl_min_rxq_count = 1; 140 limits.edl_max_rxq_count = evq_max; 141 142 efx_nic_set_drv_limits(sc->enp, &limits); 143 144 if ((rc = efx_nic_init(sc->enp)) != 0) 145 return (rc); 146 147 rc = efx_nic_get_vi_pool(sc->enp, &evq_allocated, &rxq_allocated, 148 &txq_allocated); 149 if (rc != 0) { 150 efx_nic_fini(sc->enp); 151 return (rc); 152 } 153 154 KASSERT(txq_allocated >= SFXGE_EVQ0_N_TXQ(sc), 155 ("txq_allocated < %u", SFXGE_EVQ0_N_TXQ(sc))); 156 157 sc->evq_max = MIN(evq_allocated, evq_max); 158 sc->evq_max = MIN(rxq_allocated, sc->evq_max); 159 sc->evq_max = MIN(txq_allocated - (SFXGE_EVQ0_N_TXQ(sc) - 1), 160 sc->evq_max); 161 162 KASSERT(sc->evq_max <= evq_max, 163 ("allocated more than maximum requested")); 164 165 /* 166 * NIC is kept initialized in the case of success to be able to 167 * initialize port to find out media types. 168 */ 169 return (0); 170} 171 172static int 173sfxge_set_drv_limits(struct sfxge_softc *sc) 174{ 175 efx_drv_limits_t limits; 176 177 memset(&limits, 0, sizeof(limits)); 178 179 /* Limits are strict since take into account initial estimation */ 180 limits.edl_min_evq_count = limits.edl_max_evq_count = 181 sc->intr.n_alloc; 182 limits.edl_min_txq_count = limits.edl_max_txq_count = 183 sc->intr.n_alloc + SFXGE_EVQ0_N_TXQ(sc) - 1; 184 limits.edl_min_rxq_count = limits.edl_max_rxq_count = 185 sc->intr.n_alloc; 186 187 return (efx_nic_set_drv_limits(sc->enp, &limits)); 188} 189 190static int 191sfxge_start(struct sfxge_softc *sc) 192{ 193 int rc; 194 195 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); 196 197 if (sc->init_state == SFXGE_STARTED) 198 return (0); 199 200 if (sc->init_state != SFXGE_REGISTERED) { 201 rc = EINVAL; 202 goto fail; 203 } 204 205 /* Set required resource limits */ 206 if ((rc = sfxge_set_drv_limits(sc)) != 0) 207 goto fail; 208 209 if ((rc = efx_nic_init(sc->enp)) != 0) 210 goto fail; 211 212 /* Start processing interrupts. */ 213 if ((rc = sfxge_intr_start(sc)) != 0) 214 goto fail2; 215 216 /* Start processing events. */ 217 if ((rc = sfxge_ev_start(sc)) != 0) 218 goto fail3; 219 220 /* Fire up the port. */ 221 if ((rc = sfxge_port_start(sc)) != 0) 222 goto fail4; 223 224 /* Start the receiver side. */ 225 if ((rc = sfxge_rx_start(sc)) != 0) 226 goto fail5; 227 228 /* Start the transmitter side. */ 229 if ((rc = sfxge_tx_start(sc)) != 0) 230 goto fail6; 231 232 sc->init_state = SFXGE_STARTED; 233 234 /* Tell the stack we're running. */ 235 sc->ifnet->if_drv_flags |= IFF_DRV_RUNNING; 236 sc->ifnet->if_drv_flags &= ~IFF_DRV_OACTIVE; 237 238 return (0); 239 240fail6: 241 sfxge_rx_stop(sc); 242 243fail5: 244 sfxge_port_stop(sc); 245 246fail4: 247 sfxge_ev_stop(sc); 248 249fail3: 250 sfxge_intr_stop(sc); 251 252fail2: 253 efx_nic_fini(sc->enp); 254 255fail: 256 device_printf(sc->dev, "sfxge_start: %d\n", rc); 257 258 return (rc); 259} 260 261static void 262sfxge_if_init(void *arg) 263{ 264 struct sfxge_softc *sc; 265 266 sc = (struct sfxge_softc *)arg; 267 268 SFXGE_ADAPTER_LOCK(sc); 269 (void)sfxge_start(sc); 270 SFXGE_ADAPTER_UNLOCK(sc); 271} 272 273static void 274sfxge_stop(struct sfxge_softc *sc) 275{ 276 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); 277 278 if (sc->init_state != SFXGE_STARTED) 279 return; 280 281 sc->init_state = SFXGE_REGISTERED; 282 283 /* Stop the transmitter. */ 284 sfxge_tx_stop(sc); 285 286 /* Stop the receiver. */ 287 sfxge_rx_stop(sc); 288 289 /* Stop the port. */ 290 sfxge_port_stop(sc); 291 292 /* Stop processing events. */ 293 sfxge_ev_stop(sc); 294 295 /* Stop processing interrupts. */ 296 sfxge_intr_stop(sc); 297 298 efx_nic_fini(sc->enp); 299 300 sc->ifnet->if_drv_flags &= ~IFF_DRV_RUNNING; 301} 302 303 304static int 305sfxge_vpd_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc) 306{ 307 efx_vpd_value_t value; 308 int rc = 0; 309 310 switch (ioc->u.vpd.op) { 311 case SFXGE_VPD_OP_GET_KEYWORD: 312 value.evv_tag = ioc->u.vpd.tag; 313 value.evv_keyword = ioc->u.vpd.keyword; 314 rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value); 315 if (rc != 0) 316 break; 317 ioc->u.vpd.len = MIN(ioc->u.vpd.len, value.evv_length); 318 if (ioc->u.vpd.payload != 0) { 319 rc = copyout(value.evv_value, ioc->u.vpd.payload, 320 ioc->u.vpd.len); 321 } 322 break; 323 case SFXGE_VPD_OP_SET_KEYWORD: 324 if (ioc->u.vpd.len > sizeof(value.evv_value)) 325 return (EINVAL); 326 value.evv_tag = ioc->u.vpd.tag; 327 value.evv_keyword = ioc->u.vpd.keyword; 328 value.evv_length = ioc->u.vpd.len; 329 rc = copyin(ioc->u.vpd.payload, value.evv_value, value.evv_length); 330 if (rc != 0) 331 break; 332 rc = efx_vpd_set(sc->enp, sc->vpd_data, sc->vpd_size, &value); 333 if (rc != 0) 334 break; 335 rc = efx_vpd_verify(sc->enp, sc->vpd_data, sc->vpd_size); 336 if (rc != 0) 337 break; 338 rc = efx_vpd_write(sc->enp, sc->vpd_data, sc->vpd_size); 339 break; 340 default: 341 rc = EOPNOTSUPP; 342 break; 343 } 344 345 return (rc); 346} 347 348static int 349sfxge_private_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc) 350{ 351 switch (ioc->op) { 352 case SFXGE_MCDI_IOC: 353 return (sfxge_mcdi_ioctl(sc, ioc)); 354 case SFXGE_NVRAM_IOC: 355 return (sfxge_nvram_ioctl(sc, ioc)); 356 case SFXGE_VPD_IOC: 357 return (sfxge_vpd_ioctl(sc, ioc)); 358 default: 359 return (EOPNOTSUPP); 360 } 361} 362 363 364static int 365sfxge_if_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data) 366{ 367 struct sfxge_softc *sc; 368 struct ifreq *ifr; 369 sfxge_ioc_t ioc; 370 int error; 371 372 ifr = (struct ifreq *)data; 373 sc = ifp->if_softc; 374 error = 0; 375 376 switch (command) { 377 case SIOCSIFFLAGS: 378 SFXGE_ADAPTER_LOCK(sc); 379 if (ifp->if_flags & IFF_UP) { 380 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 381 if ((ifp->if_flags ^ sc->if_flags) & 382 (IFF_PROMISC | IFF_ALLMULTI)) { 383 sfxge_mac_filter_set(sc); 384 } 385 } else 386 sfxge_start(sc); 387 } else 388 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 389 sfxge_stop(sc); 390 sc->if_flags = ifp->if_flags; 391 SFXGE_ADAPTER_UNLOCK(sc); 392 break; 393 case SIOCSIFMTU: 394 if (ifr->ifr_mtu == ifp->if_mtu) { 395 /* Nothing to do */ 396 error = 0; 397 } else if (ifr->ifr_mtu > SFXGE_MAX_MTU) { 398 error = EINVAL; 399 } else if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 400 ifp->if_mtu = ifr->ifr_mtu; 401 error = 0; 402 } else { 403 /* Restart required */ 404 SFXGE_ADAPTER_LOCK(sc); 405 sfxge_stop(sc); 406 ifp->if_mtu = ifr->ifr_mtu; 407 error = sfxge_start(sc); 408 SFXGE_ADAPTER_UNLOCK(sc); 409 if (error != 0) { 410 ifp->if_flags &= ~IFF_UP; 411 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 412 if_down(ifp); 413 } 414 } 415 break; 416 case SIOCADDMULTI: 417 case SIOCDELMULTI: 418 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 419 sfxge_mac_filter_set(sc); 420 break; 421 case SIOCSIFCAP: 422 { 423 int reqcap = ifr->ifr_reqcap; 424 int capchg_mask; 425 426 SFXGE_ADAPTER_LOCK(sc); 427 428 /* Capabilities to be changed in accordance with request */ 429 capchg_mask = ifp->if_capenable ^ reqcap; 430 431 /* 432 * The networking core already rejects attempts to 433 * enable capabilities we don't have. We still have 434 * to reject attempts to disable capabilities that we 435 * can't (yet) disable. 436 */ 437 KASSERT((reqcap & ~ifp->if_capabilities) == 0, 438 ("Unsupported capabilities 0x%x requested 0x%x vs " 439 "supported 0x%x", 440 reqcap & ~ifp->if_capabilities, 441 reqcap , ifp->if_capabilities)); 442 if (capchg_mask & SFXGE_CAP_FIXED) { 443 error = EINVAL; 444 SFXGE_ADAPTER_UNLOCK(sc); 445 break; 446 } 447 448 /* Check request before any changes */ 449 if ((capchg_mask & IFCAP_TSO4) && 450 (reqcap & (IFCAP_TSO4 | IFCAP_TXCSUM)) == IFCAP_TSO4) { 451 error = EAGAIN; 452 SFXGE_ADAPTER_UNLOCK(sc); 453 if_printf(ifp, "enable txcsum before tso4\n"); 454 break; 455 } 456 if ((capchg_mask & IFCAP_TSO6) && 457 (reqcap & (IFCAP_TSO6 | IFCAP_TXCSUM_IPV6)) == IFCAP_TSO6) { 458 error = EAGAIN; 459 SFXGE_ADAPTER_UNLOCK(sc); 460 if_printf(ifp, "enable txcsum6 before tso6\n"); 461 break; 462 } 463 464 if (reqcap & IFCAP_TXCSUM) { 465 ifp->if_hwassist |= (CSUM_IP | CSUM_TCP | CSUM_UDP); 466 } else { 467 ifp->if_hwassist &= ~(CSUM_IP | CSUM_TCP | CSUM_UDP); 468 if (reqcap & IFCAP_TSO4) { 469 reqcap &= ~IFCAP_TSO4; 470 if_printf(ifp, 471 "tso4 disabled due to -txcsum\n"); 472 } 473 } 474 if (reqcap & IFCAP_TXCSUM_IPV6) { 475 ifp->if_hwassist |= (CSUM_TCP_IPV6 | CSUM_UDP_IPV6); 476 } else { 477 ifp->if_hwassist &= ~(CSUM_TCP_IPV6 | CSUM_UDP_IPV6); 478 if (reqcap & IFCAP_TSO6) { 479 reqcap &= ~IFCAP_TSO6; 480 if_printf(ifp, 481 "tso6 disabled due to -txcsum6\n"); 482 } 483 } 484 485 /* 486 * The kernel takes both IFCAP_TSOx and CSUM_TSO into 487 * account before using TSO. So, we do not touch 488 * checksum flags when IFCAP_TSOx is modified. 489 * Note that CSUM_TSO is (CSUM_IP_TSO|CSUM_IP6_TSO), 490 * but both bits are set in IPv4 and IPv6 mbufs. 491 */ 492 493 ifp->if_capenable = reqcap; 494 495 SFXGE_ADAPTER_UNLOCK(sc); 496 break; 497 } 498 case SIOCSIFMEDIA: 499 case SIOCGIFMEDIA: 500 error = ifmedia_ioctl(ifp, ifr, &sc->media, command); 501 break; 502#ifdef SIOCGI2C 503 case SIOCGI2C: 504 { 505 struct ifi2creq i2c; 506 507 error = copyin(ifr->ifr_data, &i2c, sizeof(i2c)); 508 if (error != 0) 509 break; 510 511 if (i2c.len > sizeof(i2c.data)) { 512 error = EINVAL; 513 break; 514 } 515 516 SFXGE_ADAPTER_LOCK(sc); 517 error = efx_phy_module_get_info(sc->enp, i2c.dev_addr, 518 i2c.offset, i2c.len, 519 &i2c.data[0]); 520 SFXGE_ADAPTER_UNLOCK(sc); 521 if (error == 0) 522 error = copyout(&i2c, ifr->ifr_data, sizeof(i2c)); 523 break; 524 } 525#endif 526 case SIOCGPRIVATE_0: 527 error = priv_check(curthread, PRIV_DRIVER); 528 if (error != 0) 529 break; 530 error = copyin(ifr->ifr_data, &ioc, sizeof(ioc)); 531 if (error != 0) 532 return (error); 533 error = sfxge_private_ioctl(sc, &ioc); 534 if (error == 0) { 535 error = copyout(&ioc, ifr->ifr_data, sizeof(ioc)); 536 } 537 break; 538 default: 539 error = ether_ioctl(ifp, command, data); 540 } 541 542 return (error); 543} 544 545static void 546sfxge_tick(void *arg) 547{ 548 struct sfxge_softc *sc = arg; 549 550 sfxge_port_update_stats(sc); 551 sfxge_tx_update_stats(sc); 552 553 callout_reset(&sc->tick_callout, 554 hz * sc->port.stats_update_period_ms / 1000, 555 sfxge_tick, sc); 556} 557 558static void 559sfxge_ifnet_fini(struct ifnet *ifp) 560{ 561 struct sfxge_softc *sc = ifp->if_softc; 562 563 callout_drain(&sc->tick_callout); 564 565 SFXGE_ADAPTER_LOCK(sc); 566 sfxge_stop(sc); 567 SFXGE_ADAPTER_UNLOCK(sc); 568 569 ifmedia_removeall(&sc->media); 570 ether_ifdetach(ifp); 571 if_free(ifp); 572} 573 574static int 575sfxge_ifnet_init(struct ifnet *ifp, struct sfxge_softc *sc) 576{ 577 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp); 578 device_t dev; 579 int rc; 580 581 dev = sc->dev; 582 sc->ifnet = ifp; 583 584 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 585 ifp->if_init = sfxge_if_init; 586 ifp->if_softc = sc; 587 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 588 ifp->if_ioctl = sfxge_if_ioctl; 589 590 ifp->if_capabilities = SFXGE_CAP; 591 ifp->if_capenable = SFXGE_CAP_ENABLE; 592 ifp->if_hw_tsomax = SFXGE_TSO_MAX_SIZE; 593 ifp->if_hw_tsomaxsegcount = SFXGE_TX_MAPPING_MAX_SEG; 594 ifp->if_hw_tsomaxsegsize = PAGE_SIZE; 595 596#ifdef SFXGE_LRO 597 ifp->if_capabilities |= IFCAP_LRO; 598 ifp->if_capenable |= IFCAP_LRO; 599#endif 600 601 if (encp->enc_hw_tx_insert_vlan_enabled) { 602 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING; 603 ifp->if_capenable |= IFCAP_VLAN_HWTAGGING; 604 } 605 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO | 606 CSUM_TCP_IPV6 | CSUM_UDP_IPV6; 607 608 ether_ifattach(ifp, encp->enc_mac_addr); 609 610 ifp->if_transmit = sfxge_if_transmit; 611 ifp->if_qflush = sfxge_if_qflush; 612 613 callout_init(&sc->tick_callout, B_TRUE); 614 615 DBGPRINT(sc->dev, "ifmedia_init"); 616 if ((rc = sfxge_port_ifmedia_init(sc)) != 0) 617 goto fail; 618 619 callout_reset(&sc->tick_callout, 620 hz * sc->port.stats_update_period_ms / 1000, 621 sfxge_tick, sc); 622 623 return (0); 624 625fail: 626 ether_ifdetach(sc->ifnet); 627 return (rc); 628} 629 630void 631sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n, uint32_t *idp) 632{ 633 KASSERT(sc->buffer_table_next + n <= 634 efx_nic_cfg_get(sc->enp)->enc_buftbl_limit, 635 ("buffer table full")); 636 637 *idp = sc->buffer_table_next; 638 sc->buffer_table_next += n; 639} 640 641static int 642sfxge_bar_init(struct sfxge_softc *sc) 643{ 644 efsys_bar_t *esbp = &sc->bar; 645 646 esbp->esb_rid = PCIR_BAR(EFX_MEM_BAR); 647 if ((esbp->esb_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY, 648 &esbp->esb_rid, RF_ACTIVE)) == NULL) { 649 device_printf(sc->dev, "Cannot allocate BAR region %d\n", 650 EFX_MEM_BAR); 651 return (ENXIO); 652 } 653 esbp->esb_tag = rman_get_bustag(esbp->esb_res); 654 esbp->esb_handle = rman_get_bushandle(esbp->esb_res); 655 656 SFXGE_BAR_LOCK_INIT(esbp, device_get_nameunit(sc->dev)); 657 658 return (0); 659} 660 661static void 662sfxge_bar_fini(struct sfxge_softc *sc) 663{ 664 efsys_bar_t *esbp = &sc->bar; 665 666 bus_release_resource(sc->dev, SYS_RES_MEMORY, esbp->esb_rid, 667 esbp->esb_res); 668 SFXGE_BAR_LOCK_DESTROY(esbp); 669} 670 671static int 672sfxge_create(struct sfxge_softc *sc) 673{ 674 device_t dev; 675 efx_nic_t *enp; 676 int error; 677 char rss_param_name[sizeof(SFXGE_PARAM(%d.max_rss_channels))]; 678#if EFSYS_OPT_MCDI_LOGGING 679 char mcdi_log_param_name[sizeof(SFXGE_PARAM(%d.mcdi_logging))]; 680#endif 681 682 dev = sc->dev; 683 684 SFXGE_ADAPTER_LOCK_INIT(sc, device_get_nameunit(sc->dev)); 685 686 sc->max_rss_channels = 0; 687 snprintf(rss_param_name, sizeof(rss_param_name), 688 SFXGE_PARAM(%d.max_rss_channels), 689 (int)device_get_unit(dev)); 690 TUNABLE_INT_FETCH(rss_param_name, &sc->max_rss_channels); 691#if EFSYS_OPT_MCDI_LOGGING 692 sc->mcdi_logging = sfxge_mcdi_logging; 693 snprintf(mcdi_log_param_name, sizeof(mcdi_log_param_name), 694 SFXGE_PARAM(%d.mcdi_logging), 695 (int)device_get_unit(dev)); 696 TUNABLE_INT_FETCH(mcdi_log_param_name, &sc->mcdi_logging); 697#endif 698 699 sc->stats_node = SYSCTL_ADD_NODE( 700 device_get_sysctl_ctx(dev), 701 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 702 OID_AUTO, "stats", CTLFLAG_RD, NULL, "Statistics"); 703 if (sc->stats_node == NULL) { 704 error = ENOMEM; 705 goto fail; 706 } 707 708 TASK_INIT(&sc->task_reset, 0, sfxge_reset, sc); 709 710 (void) pci_enable_busmaster(dev); 711 712 /* Initialize DMA mappings. */ 713 DBGPRINT(sc->dev, "dma_init..."); 714 if ((error = sfxge_dma_init(sc)) != 0) 715 goto fail; 716 717 /* Map the device registers. */ 718 DBGPRINT(sc->dev, "bar_init..."); 719 if ((error = sfxge_bar_init(sc)) != 0) 720 goto fail; 721 722 error = efx_family(pci_get_vendor(dev), pci_get_device(dev), 723 &sc->family); 724 KASSERT(error == 0, ("Family should be filtered by sfxge_probe()")); 725 726 DBGPRINT(sc->dev, "nic_create..."); 727 728 /* Create the common code nic object. */ 729 SFXGE_EFSYS_LOCK_INIT(&sc->enp_lock, 730 device_get_nameunit(sc->dev), "nic"); 731 if ((error = efx_nic_create(sc->family, (efsys_identifier_t *)sc, 732 &sc->bar, &sc->enp_lock, &enp)) != 0) 733 goto fail3; 734 sc->enp = enp; 735 736 /* Initialize MCDI to talk to the microcontroller. */ 737 DBGPRINT(sc->dev, "mcdi_init..."); 738 if ((error = sfxge_mcdi_init(sc)) != 0) 739 goto fail4; 740 741 /* Probe the NIC and build the configuration data area. */ 742 DBGPRINT(sc->dev, "nic_probe..."); 743 if ((error = efx_nic_probe(enp)) != 0) 744 goto fail5; 745 746 if (!ISP2(sfxge_rx_ring_entries) || 747 (sfxge_rx_ring_entries < EFX_RXQ_MINNDESCS) || 748 (sfxge_rx_ring_entries > EFX_RXQ_MAXNDESCS)) { 749 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u", 750 SFXGE_PARAM_RX_RING, sfxge_rx_ring_entries, 751 EFX_RXQ_MINNDESCS, EFX_RXQ_MAXNDESCS); 752 error = EINVAL; 753 goto fail_rx_ring_entries; 754 } 755 sc->rxq_entries = sfxge_rx_ring_entries; 756 757 if (efx_nic_cfg_get(enp)->enc_features & EFX_FEATURE_TXQ_CKSUM_OP_DESC) 758 sc->txq_dynamic_cksum_toggle_supported = B_TRUE; 759 else 760 sc->txq_dynamic_cksum_toggle_supported = B_FALSE; 761 762 if (!ISP2(sfxge_tx_ring_entries) || 763 (sfxge_tx_ring_entries < EFX_TXQ_MINNDESCS) || 764 (sfxge_tx_ring_entries > efx_nic_cfg_get(enp)->enc_txq_max_ndescs)) { 765 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u", 766 SFXGE_PARAM_TX_RING, sfxge_tx_ring_entries, 767 EFX_TXQ_MINNDESCS, efx_nic_cfg_get(enp)->enc_txq_max_ndescs); 768 error = EINVAL; 769 goto fail_tx_ring_entries; 770 } 771 sc->txq_entries = sfxge_tx_ring_entries; 772 773 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 774 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 775 OID_AUTO, "version", CTLFLAG_RD, 776 SFXGE_VERSION_STRING, 0, 777 "Driver version"); 778 779 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 780 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 781 OID_AUTO, "phy_type", CTLFLAG_RD, 782 NULL, efx_nic_cfg_get(enp)->enc_phy_type, 783 "PHY type"); 784 785 /* Initialize the NVRAM. */ 786 DBGPRINT(sc->dev, "nvram_init..."); 787 if ((error = efx_nvram_init(enp)) != 0) 788 goto fail6; 789 790 /* Initialize the VPD. */ 791 DBGPRINT(sc->dev, "vpd_init..."); 792 if ((error = efx_vpd_init(enp)) != 0) 793 goto fail7; 794 795 efx_mcdi_new_epoch(enp); 796 797 /* Reset the NIC. */ 798 DBGPRINT(sc->dev, "nic_reset..."); 799 if ((error = efx_nic_reset(enp)) != 0) 800 goto fail8; 801 802 /* Initialize buffer table allocation. */ 803 sc->buffer_table_next = 0; 804 805 /* 806 * Guarantee minimum and estimate maximum number of event queues 807 * to take it into account when MSI-X interrupts are allocated. 808 * It initializes NIC and keeps it initialized on success. 809 */ 810 if ((error = sfxge_estimate_rsrc_limits(sc)) != 0) 811 goto fail8; 812 813 /* Set up interrupts. */ 814 DBGPRINT(sc->dev, "intr_init..."); 815 if ((error = sfxge_intr_init(sc)) != 0) 816 goto fail9; 817 818 /* Initialize event processing state. */ 819 DBGPRINT(sc->dev, "ev_init..."); 820 if ((error = sfxge_ev_init(sc)) != 0) 821 goto fail11; 822 823 /* Initialize port state. */ 824 DBGPRINT(sc->dev, "port_init..."); 825 if ((error = sfxge_port_init(sc)) != 0) 826 goto fail12; 827 828 /* Initialize receive state. */ 829 DBGPRINT(sc->dev, "rx_init..."); 830 if ((error = sfxge_rx_init(sc)) != 0) 831 goto fail13; 832 833 /* Initialize transmit state. */ 834 DBGPRINT(sc->dev, "tx_init..."); 835 if ((error = sfxge_tx_init(sc)) != 0) 836 goto fail14; 837 838 sc->init_state = SFXGE_INITIALIZED; 839 840 DBGPRINT(sc->dev, "success"); 841 return (0); 842 843fail14: 844 sfxge_rx_fini(sc); 845 846fail13: 847 sfxge_port_fini(sc); 848 849fail12: 850 sfxge_ev_fini(sc); 851 852fail11: 853 sfxge_intr_fini(sc); 854 855fail9: 856 efx_nic_fini(sc->enp); 857 858fail8: 859 efx_vpd_fini(enp); 860 861fail7: 862 efx_nvram_fini(enp); 863 864fail6: 865fail_tx_ring_entries: 866fail_rx_ring_entries: 867 efx_nic_unprobe(enp); 868 869fail5: 870 sfxge_mcdi_fini(sc); 871 872fail4: 873 sc->enp = NULL; 874 efx_nic_destroy(enp); 875 SFXGE_EFSYS_LOCK_DESTROY(&sc->enp_lock); 876 877fail3: 878 sfxge_bar_fini(sc); 879 (void) pci_disable_busmaster(sc->dev); 880 881fail: 882 DBGPRINT(sc->dev, "failed %d", error); 883 sc->dev = NULL; 884 SFXGE_ADAPTER_LOCK_DESTROY(sc); 885 return (error); 886} 887 888static void 889sfxge_destroy(struct sfxge_softc *sc) 890{ 891 efx_nic_t *enp; 892 893 /* Clean up transmit state. */ 894 sfxge_tx_fini(sc); 895 896 /* Clean up receive state. */ 897 sfxge_rx_fini(sc); 898 899 /* Clean up port state. */ 900 sfxge_port_fini(sc); 901 902 /* Clean up event processing state. */ 903 sfxge_ev_fini(sc); 904 905 /* Clean up interrupts. */ 906 sfxge_intr_fini(sc); 907 908 /* Tear down common code subsystems. */ 909 efx_nic_reset(sc->enp); 910 efx_vpd_fini(sc->enp); 911 efx_nvram_fini(sc->enp); 912 efx_nic_unprobe(sc->enp); 913 914 /* Tear down MCDI. */ 915 sfxge_mcdi_fini(sc); 916 917 /* Destroy common code context. */ 918 enp = sc->enp; 919 sc->enp = NULL; 920 efx_nic_destroy(enp); 921 922 /* Free DMA memory. */ 923 sfxge_dma_fini(sc); 924 925 /* Free mapped BARs. */ 926 sfxge_bar_fini(sc); 927 928 (void) pci_disable_busmaster(sc->dev); 929 930 taskqueue_drain(taskqueue_thread, &sc->task_reset); 931 932 /* Destroy the softc lock. */ 933 SFXGE_ADAPTER_LOCK_DESTROY(sc); 934} 935 936static int 937sfxge_vpd_handler(SYSCTL_HANDLER_ARGS) 938{ 939 struct sfxge_softc *sc = arg1; 940 efx_vpd_value_t value; 941 int rc; 942 943 value.evv_tag = arg2 >> 16; 944 value.evv_keyword = arg2 & 0xffff; 945 if ((rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value)) 946 != 0) 947 return (rc); 948 949 return (SYSCTL_OUT(req, value.evv_value, value.evv_length)); 950} 951 952static void 953sfxge_vpd_try_add(struct sfxge_softc *sc, struct sysctl_oid_list *list, 954 efx_vpd_tag_t tag, const char *keyword) 955{ 956 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 957 efx_vpd_value_t value; 958 959 /* Check whether VPD tag/keyword is present */ 960 value.evv_tag = tag; 961 value.evv_keyword = EFX_VPD_KEYWORD(keyword[0], keyword[1]); 962 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) != 0) 963 return; 964 965 SYSCTL_ADD_PROC( 966 ctx, list, OID_AUTO, keyword, CTLTYPE_STRING|CTLFLAG_RD, 967 sc, tag << 16 | EFX_VPD_KEYWORD(keyword[0], keyword[1]), 968 sfxge_vpd_handler, "A", ""); 969} 970 971static int 972sfxge_vpd_init(struct sfxge_softc *sc) 973{ 974 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 975 struct sysctl_oid *vpd_node; 976 struct sysctl_oid_list *vpd_list; 977 char keyword[3]; 978 efx_vpd_value_t value; 979 int rc; 980 981 if ((rc = efx_vpd_size(sc->enp, &sc->vpd_size)) != 0) { 982 /* 983 * Unpriviledged functions deny VPD access. 984 * Simply skip VPD in this case. 985 */ 986 if (rc == EACCES) 987 goto done; 988 goto fail; 989 } 990 sc->vpd_data = malloc(sc->vpd_size, M_SFXGE, M_WAITOK); 991 if ((rc = efx_vpd_read(sc->enp, sc->vpd_data, sc->vpd_size)) != 0) 992 goto fail2; 993 994 /* Copy ID (product name) into device description, and log it. */ 995 value.evv_tag = EFX_VPD_ID; 996 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) == 0) { 997 value.evv_value[value.evv_length] = 0; 998 device_set_desc_copy(sc->dev, value.evv_value); 999 device_printf(sc->dev, "%s\n", value.evv_value); 1000 } 1001 1002 vpd_node = SYSCTL_ADD_NODE( 1003 ctx, SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), 1004 OID_AUTO, "vpd", CTLFLAG_RD, NULL, "Vital Product Data"); 1005 vpd_list = SYSCTL_CHILDREN(vpd_node); 1006 1007 /* Add sysctls for all expected and any vendor-defined keywords. */ 1008 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "PN"); 1009 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "EC"); 1010 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "SN"); 1011 keyword[0] = 'V'; 1012 keyword[2] = 0; 1013 for (keyword[1] = '0'; keyword[1] <= '9'; keyword[1]++) 1014 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword); 1015 for (keyword[1] = 'A'; keyword[1] <= 'Z'; keyword[1]++) 1016 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword); 1017 1018done: 1019 return (0); 1020 1021fail2: 1022 free(sc->vpd_data, M_SFXGE); 1023fail: 1024 return (rc); 1025} 1026 1027static void 1028sfxge_vpd_fini(struct sfxge_softc *sc) 1029{ 1030 free(sc->vpd_data, M_SFXGE); 1031} 1032 1033static void 1034sfxge_reset(void *arg, int npending) 1035{ 1036 struct sfxge_softc *sc; 1037 int rc; 1038 unsigned attempt; 1039 1040 (void)npending; 1041 1042 sc = (struct sfxge_softc *)arg; 1043 1044 SFXGE_ADAPTER_LOCK(sc); 1045 1046 if (sc->init_state != SFXGE_STARTED) 1047 goto done; 1048 1049 sfxge_stop(sc); 1050 efx_nic_reset(sc->enp); 1051 for (attempt = 0; attempt < sfxge_restart_attempts; ++attempt) { 1052 if ((rc = sfxge_start(sc)) == 0) 1053 goto done; 1054 1055 device_printf(sc->dev, "start on reset failed (%d)\n", rc); 1056 DELAY(100000); 1057 } 1058 1059 device_printf(sc->dev, "reset failed; interface is now stopped\n"); 1060 1061done: 1062 SFXGE_ADAPTER_UNLOCK(sc); 1063} 1064 1065void 1066sfxge_schedule_reset(struct sfxge_softc *sc) 1067{ 1068 taskqueue_enqueue(taskqueue_thread, &sc->task_reset); 1069} 1070 1071static int 1072sfxge_attach(device_t dev) 1073{ 1074 struct sfxge_softc *sc; 1075 struct ifnet *ifp; 1076 int error; 1077 1078 sc = device_get_softc(dev); 1079 sc->dev = dev; 1080 1081 /* Allocate ifnet. */ 1082 ifp = if_alloc(IFT_ETHER); 1083 if (ifp == NULL) { 1084 device_printf(dev, "Couldn't allocate ifnet\n"); 1085 error = ENOMEM; 1086 goto fail; 1087 } 1088 sc->ifnet = ifp; 1089 1090 /* Initialize hardware. */ 1091 DBGPRINT(sc->dev, "create nic"); 1092 if ((error = sfxge_create(sc)) != 0) 1093 goto fail2; 1094 1095 /* Create the ifnet for the port. */ 1096 DBGPRINT(sc->dev, "init ifnet"); 1097 if ((error = sfxge_ifnet_init(ifp, sc)) != 0) 1098 goto fail3; 1099 1100 DBGPRINT(sc->dev, "init vpd"); 1101 if ((error = sfxge_vpd_init(sc)) != 0) 1102 goto fail4; 1103 1104 /* 1105 * NIC is initialized inside sfxge_create() and kept inialized 1106 * to be able to initialize port to discover media types in 1107 * sfxge_ifnet_init(). 1108 */ 1109 efx_nic_fini(sc->enp); 1110 1111 sc->init_state = SFXGE_REGISTERED; 1112 1113 DBGPRINT(sc->dev, "success"); 1114 return (0); 1115 1116fail4: 1117 sfxge_ifnet_fini(ifp); 1118fail3: 1119 efx_nic_fini(sc->enp); 1120 sfxge_destroy(sc); 1121 1122fail2: 1123 if_free(sc->ifnet); 1124 1125fail: 1126 DBGPRINT(sc->dev, "failed %d", error); 1127 return (error); 1128} 1129 1130static int 1131sfxge_detach(device_t dev) 1132{ 1133 struct sfxge_softc *sc; 1134 1135 sc = device_get_softc(dev); 1136 1137 sfxge_vpd_fini(sc); 1138 1139 /* Destroy the ifnet. */ 1140 sfxge_ifnet_fini(sc->ifnet); 1141 1142 /* Tear down hardware. */ 1143 sfxge_destroy(sc); 1144 1145 return (0); 1146} 1147 1148static int 1149sfxge_probe(device_t dev) 1150{ 1151 uint16_t pci_vendor_id; 1152 uint16_t pci_device_id; 1153 efx_family_t family; 1154 int rc; 1155 1156 pci_vendor_id = pci_get_vendor(dev); 1157 pci_device_id = pci_get_device(dev); 1158 1159 DBGPRINT(dev, "PCI ID %04x:%04x", pci_vendor_id, pci_device_id); 1160 rc = efx_family(pci_vendor_id, pci_device_id, &family); 1161 if (rc != 0) { 1162 DBGPRINT(dev, "efx_family fail %d", rc); 1163 return (ENXIO); 1164 } 1165 1166 if (family == EFX_FAMILY_SIENA) { 1167 device_set_desc(dev, "Solarflare SFC9000 family"); 1168 return (0); 1169 } 1170 1171 if (family == EFX_FAMILY_HUNTINGTON) { 1172 device_set_desc(dev, "Solarflare SFC9100 family"); 1173 return (0); 1174 } 1175 1176 if (family == EFX_FAMILY_MEDFORD) { 1177 device_set_desc(dev, "Solarflare SFC9200 family"); 1178 return (0); 1179 } 1180 1181 DBGPRINT(dev, "impossible controller family %d", family); 1182 return (ENXIO); 1183} 1184 1185static device_method_t sfxge_methods[] = { 1186 DEVMETHOD(device_probe, sfxge_probe), 1187 DEVMETHOD(device_attach, sfxge_attach), 1188 DEVMETHOD(device_detach, sfxge_detach), 1189 1190 DEVMETHOD_END 1191}; 1192 1193static devclass_t sfxge_devclass; 1194 1195static driver_t sfxge_driver = { 1196 "sfxge", 1197 sfxge_methods, 1198 sizeof(struct sfxge_softc) 1199}; 1200 1201DRIVER_MODULE(sfxge, pci, sfxge_driver, sfxge_devclass, 0, 0); 1202