1/*- 2 * Copyright (c) 2009-2016 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * The views and conclusions contained in the software and documentation are 27 * those of the authors and should not be interpreted as representing official 28 * policies, either expressed or implied, of the FreeBSD Project. 29 * 30 * $FreeBSD: stable/10/sys/dev/sfxge/common/siena_impl.h 342496 2018-12-26 10:05:03Z arybchik $ 31 */ 32 33#ifndef _SYS_SIENA_IMPL_H 34#define _SYS_SIENA_IMPL_H 35 36#include "efx.h" 37#include "efx_regs.h" 38#include "efx_mcdi.h" 39#include "siena_flash.h" 40 41#ifdef __cplusplus 42extern "C" { 43#endif 44 45#define SIENA_NVRAM_CHUNK 0x80 46 47extern __checkReturn efx_rc_t 48siena_nic_probe( 49 __in efx_nic_t *enp); 50 51extern __checkReturn efx_rc_t 52siena_nic_reset( 53 __in efx_nic_t *enp); 54 55extern __checkReturn efx_rc_t 56siena_nic_init( 57 __in efx_nic_t *enp); 58 59#if EFSYS_OPT_DIAG 60 61extern efx_sram_pattern_fn_t __efx_sram_pattern_fns[]; 62 63typedef struct siena_register_set_s { 64 unsigned int address; 65 unsigned int step; 66 unsigned int rows; 67 efx_oword_t mask; 68} siena_register_set_t; 69 70extern __checkReturn efx_rc_t 71siena_nic_register_test( 72 __in efx_nic_t *enp); 73 74#endif /* EFSYS_OPT_DIAG */ 75 76extern void 77siena_nic_fini( 78 __in efx_nic_t *enp); 79 80extern void 81siena_nic_unprobe( 82 __in efx_nic_t *enp); 83 84#define SIENA_SRAM_ROWS 0x12000 85 86extern void 87siena_sram_init( 88 __in efx_nic_t *enp); 89 90#if EFSYS_OPT_DIAG 91 92extern __checkReturn efx_rc_t 93siena_sram_test( 94 __in efx_nic_t *enp, 95 __in efx_sram_pattern_fn_t func); 96 97#endif /* EFSYS_OPT_DIAG */ 98 99#if EFSYS_OPT_MCDI 100 101extern __checkReturn efx_rc_t 102siena_mcdi_init( 103 __in efx_nic_t *enp, 104 __in const efx_mcdi_transport_t *mtp); 105 106extern void 107siena_mcdi_send_request( 108 __in efx_nic_t *enp, 109 __in_bcount(hdr_len) void *hdrp, 110 __in size_t hdr_len, 111 __in_bcount(sdu_len) void *sdup, 112 __in size_t sdu_len); 113 114extern __checkReturn boolean_t 115siena_mcdi_poll_response( 116 __in efx_nic_t *enp); 117 118extern void 119siena_mcdi_read_response( 120 __in efx_nic_t *enp, 121 __out_bcount(length) void *bufferp, 122 __in size_t offset, 123 __in size_t length); 124 125extern efx_rc_t 126siena_mcdi_poll_reboot( 127 __in efx_nic_t *enp); 128 129extern void 130siena_mcdi_fini( 131 __in efx_nic_t *enp); 132 133extern __checkReturn efx_rc_t 134siena_mcdi_feature_supported( 135 __in efx_nic_t *enp, 136 __in efx_mcdi_feature_id_t id, 137 __out boolean_t *supportedp); 138 139extern void 140siena_mcdi_get_timeout( 141 __in efx_nic_t *enp, 142 __in efx_mcdi_req_t *emrp, 143 __out uint32_t *timeoutp); 144 145#endif /* EFSYS_OPT_MCDI */ 146 147#if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD 148 149extern __checkReturn efx_rc_t 150siena_nvram_partn_lock( 151 __in efx_nic_t *enp, 152 __in uint32_t partn); 153 154extern __checkReturn efx_rc_t 155siena_nvram_partn_unlock( 156 __in efx_nic_t *enp, 157 __in uint32_t partn); 158 159extern __checkReturn efx_rc_t 160siena_nvram_get_dynamic_cfg( 161 __in efx_nic_t *enp, 162 __in uint32_t partn, 163 __in boolean_t vpd, 164 __out siena_mc_dynamic_config_hdr_t **dcfgp, 165 __out size_t *sizep); 166 167#endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */ 168 169#if EFSYS_OPT_NVRAM 170 171#if EFSYS_OPT_DIAG 172 173extern __checkReturn efx_rc_t 174siena_nvram_test( 175 __in efx_nic_t *enp); 176 177#endif /* EFSYS_OPT_DIAG */ 178 179extern __checkReturn efx_rc_t 180siena_nvram_get_subtype( 181 __in efx_nic_t *enp, 182 __in uint32_t partn, 183 __out uint32_t *subtypep); 184 185extern __checkReturn efx_rc_t 186siena_nvram_type_to_partn( 187 __in efx_nic_t *enp, 188 __in efx_nvram_type_t type, 189 __out uint32_t *partnp); 190 191extern __checkReturn efx_rc_t 192siena_nvram_partn_size( 193 __in efx_nic_t *enp, 194 __in uint32_t partn, 195 __out size_t *sizep); 196 197extern __checkReturn efx_rc_t 198siena_nvram_partn_rw_start( 199 __in efx_nic_t *enp, 200 __in uint32_t partn, 201 __out size_t *chunk_sizep); 202 203extern __checkReturn efx_rc_t 204siena_nvram_partn_read( 205 __in efx_nic_t *enp, 206 __in uint32_t partn, 207 __in unsigned int offset, 208 __out_bcount(size) caddr_t data, 209 __in size_t size); 210 211extern __checkReturn efx_rc_t 212siena_nvram_partn_erase( 213 __in efx_nic_t *enp, 214 __in uint32_t partn, 215 __in unsigned int offset, 216 __in size_t size); 217 218extern __checkReturn efx_rc_t 219siena_nvram_partn_write( 220 __in efx_nic_t *enp, 221 __in uint32_t partn, 222 __in unsigned int offset, 223 __out_bcount(size) caddr_t data, 224 __in size_t size); 225 226extern __checkReturn efx_rc_t 227siena_nvram_partn_rw_finish( 228 __in efx_nic_t *enp, 229 __in uint32_t partn); 230 231extern __checkReturn efx_rc_t 232siena_nvram_partn_get_version( 233 __in efx_nic_t *enp, 234 __in uint32_t partn, 235 __out uint32_t *subtypep, 236 __out_ecount(4) uint16_t version[4]); 237 238extern __checkReturn efx_rc_t 239siena_nvram_partn_set_version( 240 __in efx_nic_t *enp, 241 __in uint32_t partn, 242 __in_ecount(4) uint16_t version[4]); 243 244#endif /* EFSYS_OPT_NVRAM */ 245 246#if EFSYS_OPT_VPD 247 248extern __checkReturn efx_rc_t 249siena_vpd_init( 250 __in efx_nic_t *enp); 251 252extern __checkReturn efx_rc_t 253siena_vpd_size( 254 __in efx_nic_t *enp, 255 __out size_t *sizep); 256 257extern __checkReturn efx_rc_t 258siena_vpd_read( 259 __in efx_nic_t *enp, 260 __out_bcount(size) caddr_t data, 261 __in size_t size); 262 263extern __checkReturn efx_rc_t 264siena_vpd_verify( 265 __in efx_nic_t *enp, 266 __in_bcount(size) caddr_t data, 267 __in size_t size); 268 269extern __checkReturn efx_rc_t 270siena_vpd_reinit( 271 __in efx_nic_t *enp, 272 __in_bcount(size) caddr_t data, 273 __in size_t size); 274 275extern __checkReturn efx_rc_t 276siena_vpd_get( 277 __in efx_nic_t *enp, 278 __in_bcount(size) caddr_t data, 279 __in size_t size, 280 __inout efx_vpd_value_t *evvp); 281 282extern __checkReturn efx_rc_t 283siena_vpd_set( 284 __in efx_nic_t *enp, 285 __in_bcount(size) caddr_t data, 286 __in size_t size, 287 __in efx_vpd_value_t *evvp); 288 289extern __checkReturn efx_rc_t 290siena_vpd_next( 291 __in efx_nic_t *enp, 292 __in_bcount(size) caddr_t data, 293 __in size_t size, 294 __out efx_vpd_value_t *evvp, 295 __inout unsigned int *contp); 296 297extern __checkReturn efx_rc_t 298siena_vpd_write( 299 __in efx_nic_t *enp, 300 __in_bcount(size) caddr_t data, 301 __in size_t size); 302 303extern void 304siena_vpd_fini( 305 __in efx_nic_t *enp); 306 307#endif /* EFSYS_OPT_VPD */ 308 309typedef struct siena_link_state_s { 310 uint32_t sls_adv_cap_mask; 311 uint32_t sls_lp_cap_mask; 312 unsigned int sls_fcntl; 313 efx_link_mode_t sls_link_mode; 314#if EFSYS_OPT_LOOPBACK 315 efx_loopback_type_t sls_loopback; 316#endif 317 boolean_t sls_mac_up; 318} siena_link_state_t; 319 320extern void 321siena_phy_link_ev( 322 __in efx_nic_t *enp, 323 __in efx_qword_t *eqp, 324 __out efx_link_mode_t *link_modep); 325 326extern __checkReturn efx_rc_t 327siena_phy_get_link( 328 __in efx_nic_t *enp, 329 __out siena_link_state_t *slsp); 330 331extern __checkReturn efx_rc_t 332siena_phy_power( 333 __in efx_nic_t *enp, 334 __in boolean_t on); 335 336extern __checkReturn efx_rc_t 337siena_phy_reconfigure( 338 __in efx_nic_t *enp); 339 340extern __checkReturn efx_rc_t 341siena_phy_verify( 342 __in efx_nic_t *enp); 343 344extern __checkReturn efx_rc_t 345siena_phy_oui_get( 346 __in efx_nic_t *enp, 347 __out uint32_t *ouip); 348 349#if EFSYS_OPT_PHY_STATS 350 351extern void 352siena_phy_decode_stats( 353 __in efx_nic_t *enp, 354 __in uint32_t vmask, 355 __in_opt efsys_mem_t *esmp, 356 __out_opt uint64_t *smaskp, 357 __inout_ecount_opt(EFX_PHY_NSTATS) uint32_t *stat); 358 359extern __checkReturn efx_rc_t 360siena_phy_stats_update( 361 __in efx_nic_t *enp, 362 __in efsys_mem_t *esmp, 363 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat); 364 365#endif /* EFSYS_OPT_PHY_STATS */ 366 367#if EFSYS_OPT_BIST 368 369extern __checkReturn efx_rc_t 370siena_phy_bist_start( 371 __in efx_nic_t *enp, 372 __in efx_bist_type_t type); 373 374extern __checkReturn efx_rc_t 375siena_phy_bist_poll( 376 __in efx_nic_t *enp, 377 __in efx_bist_type_t type, 378 __out efx_bist_result_t *resultp, 379 __out_opt __drv_when(count > 0, __notnull) 380 uint32_t *value_maskp, 381 __out_ecount_opt(count) __drv_when(count > 0, __notnull) 382 unsigned long *valuesp, 383 __in size_t count); 384 385extern void 386siena_phy_bist_stop( 387 __in efx_nic_t *enp, 388 __in efx_bist_type_t type); 389 390#endif /* EFSYS_OPT_BIST */ 391 392extern __checkReturn efx_rc_t 393siena_mac_poll( 394 __in efx_nic_t *enp, 395 __out efx_link_mode_t *link_modep); 396 397extern __checkReturn efx_rc_t 398siena_mac_up( 399 __in efx_nic_t *enp, 400 __out boolean_t *mac_upp); 401 402extern __checkReturn efx_rc_t 403siena_mac_reconfigure( 404 __in efx_nic_t *enp); 405 406extern __checkReturn efx_rc_t 407siena_mac_pdu_get( 408 __in efx_nic_t *enp, 409 __out size_t *pdu); 410 411#if EFSYS_OPT_LOOPBACK 412 413extern __checkReturn efx_rc_t 414siena_mac_loopback_set( 415 __in efx_nic_t *enp, 416 __in efx_link_mode_t link_mode, 417 __in efx_loopback_type_t loopback_type); 418 419#endif /* EFSYS_OPT_LOOPBACK */ 420 421#if EFSYS_OPT_MAC_STATS 422 423extern __checkReturn efx_rc_t 424siena_mac_stats_get_mask( 425 __in efx_nic_t *enp, 426 __inout_bcount(mask_size) uint32_t *maskp, 427 __in size_t mask_size); 428 429extern __checkReturn efx_rc_t 430siena_mac_stats_update( 431 __in efx_nic_t *enp, 432 __in efsys_mem_t *esmp, 433 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat, 434 __inout_opt uint32_t *generationp); 435 436#endif /* EFSYS_OPT_MAC_STATS */ 437 438#ifdef __cplusplus 439} 440#endif 441 442#endif /* _SYS_SIENA_IMPL_H */ 443