1/*- 2 * Copyright (c) 2012-2016 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * The views and conclusions contained in the software and documentation are 27 * those of the authors and should not be interpreted as representing official 28 * policies, either expressed or implied, of the FreeBSD Project. 29 */ 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD: stable/10/sys/dev/sfxge/common/ef10_phy.c 342516 2018-12-26 10:25:01Z arybchik $"); 33 34#include "efx.h" 35#include "efx_impl.h" 36 37#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD 38 39static void 40mcdi_phy_decode_cap( 41 __in uint32_t mcdi_cap, 42 __out uint32_t *maskp) 43{ 44 uint32_t mask; 45 46 mask = 0; 47 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10HDX_LBN)) 48 mask |= (1 << EFX_PHY_CAP_10HDX); 49 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10FDX_LBN)) 50 mask |= (1 << EFX_PHY_CAP_10FDX); 51 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100HDX_LBN)) 52 mask |= (1 << EFX_PHY_CAP_100HDX); 53 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100FDX_LBN)) 54 mask |= (1 << EFX_PHY_CAP_100FDX); 55 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000HDX_LBN)) 56 mask |= (1 << EFX_PHY_CAP_1000HDX); 57 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN)) 58 mask |= (1 << EFX_PHY_CAP_1000FDX); 59 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN)) 60 mask |= (1 << EFX_PHY_CAP_10000FDX); 61 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN)) 62 mask |= (1 << EFX_PHY_CAP_40000FDX); 63 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_PAUSE_LBN)) 64 mask |= (1 << EFX_PHY_CAP_PAUSE); 65 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_ASYM_LBN)) 66 mask |= (1 << EFX_PHY_CAP_ASYM); 67 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_AN_LBN)) 68 mask |= (1 << EFX_PHY_CAP_AN); 69 70 *maskp = mask; 71} 72 73static void 74mcdi_phy_decode_link_mode( 75 __in efx_nic_t *enp, 76 __in uint32_t link_flags, 77 __in unsigned int speed, 78 __in unsigned int fcntl, 79 __out efx_link_mode_t *link_modep, 80 __out unsigned int *fcntlp) 81{ 82 boolean_t fd = !!(link_flags & 83 (1 << MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN)); 84 boolean_t up = !!(link_flags & 85 (1 << MC_CMD_GET_LINK_OUT_LINK_UP_LBN)); 86 87 _NOTE(ARGUNUSED(enp)) 88 89 if (!up) 90 *link_modep = EFX_LINK_DOWN; 91 else if (speed == 40000 && fd) 92 *link_modep = EFX_LINK_40000FDX; 93 else if (speed == 10000 && fd) 94 *link_modep = EFX_LINK_10000FDX; 95 else if (speed == 1000) 96 *link_modep = fd ? EFX_LINK_1000FDX : EFX_LINK_1000HDX; 97 else if (speed == 100) 98 *link_modep = fd ? EFX_LINK_100FDX : EFX_LINK_100HDX; 99 else if (speed == 10) 100 *link_modep = fd ? EFX_LINK_10FDX : EFX_LINK_10HDX; 101 else 102 *link_modep = EFX_LINK_UNKNOWN; 103 104 if (fcntl == MC_CMD_FCNTL_OFF) 105 *fcntlp = 0; 106 else if (fcntl == MC_CMD_FCNTL_RESPOND) 107 *fcntlp = EFX_FCNTL_RESPOND; 108 else if (fcntl == MC_CMD_FCNTL_GENERATE) 109 *fcntlp = EFX_FCNTL_GENERATE; 110 else if (fcntl == MC_CMD_FCNTL_BIDIR) 111 *fcntlp = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 112 else { 113 EFSYS_PROBE1(mc_pcol_error, int, fcntl); 114 *fcntlp = 0; 115 } 116} 117 118 119 void 120ef10_phy_link_ev( 121 __in efx_nic_t *enp, 122 __in efx_qword_t *eqp, 123 __out efx_link_mode_t *link_modep) 124{ 125 efx_port_t *epp = &(enp->en_port); 126 unsigned int link_flags; 127 unsigned int speed; 128 unsigned int fcntl; 129 efx_link_mode_t link_mode; 130 uint32_t lp_cap_mask; 131 132 /* 133 * Convert the LINKCHANGE speed enumeration into mbit/s, in the 134 * same way as GET_LINK encodes the speed 135 */ 136 switch (MCDI_EV_FIELD(eqp, LINKCHANGE_SPEED)) { 137 case MCDI_EVENT_LINKCHANGE_SPEED_100M: 138 speed = 100; 139 break; 140 case MCDI_EVENT_LINKCHANGE_SPEED_1G: 141 speed = 1000; 142 break; 143 case MCDI_EVENT_LINKCHANGE_SPEED_10G: 144 speed = 10000; 145 break; 146 case MCDI_EVENT_LINKCHANGE_SPEED_40G: 147 speed = 40000; 148 break; 149 default: 150 speed = 0; 151 break; 152 } 153 154 link_flags = MCDI_EV_FIELD(eqp, LINKCHANGE_LINK_FLAGS); 155 mcdi_phy_decode_link_mode(enp, link_flags, speed, 156 MCDI_EV_FIELD(eqp, LINKCHANGE_FCNTL), 157 &link_mode, &fcntl); 158 mcdi_phy_decode_cap(MCDI_EV_FIELD(eqp, LINKCHANGE_LP_CAP), 159 &lp_cap_mask); 160 161 /* 162 * It's safe to update ep_lp_cap_mask without the driver's port lock 163 * because presumably any concurrently running efx_port_poll() is 164 * only going to arrive at the same value. 165 * 166 * ep_fcntl has two meanings. It's either the link common fcntl 167 * (if the PHY supports AN), or it's the forced link state. If 168 * the former, it's safe to update the value for the same reason as 169 * for ep_lp_cap_mask. If the latter, then just ignore the value, 170 * because we can race with efx_mac_fcntl_set(). 171 */ 172 epp->ep_lp_cap_mask = lp_cap_mask; 173 epp->ep_fcntl = fcntl; 174 175 *link_modep = link_mode; 176} 177 178 __checkReturn efx_rc_t 179ef10_phy_power( 180 __in efx_nic_t *enp, 181 __in boolean_t power) 182{ 183 efx_rc_t rc; 184 185 if (!power) 186 return (0); 187 188 /* Check if the PHY is a zombie */ 189 if ((rc = ef10_phy_verify(enp)) != 0) 190 goto fail1; 191 192 enp->en_reset_flags |= EFX_RESET_PHY; 193 194 return (0); 195 196fail1: 197 EFSYS_PROBE1(fail1, efx_rc_t, rc); 198 199 return (rc); 200} 201 202 __checkReturn efx_rc_t 203ef10_phy_get_link( 204 __in efx_nic_t *enp, 205 __out ef10_link_state_t *elsp) 206{ 207 efx_mcdi_req_t req; 208 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_LINK_IN_LEN, 209 MC_CMD_GET_LINK_OUT_LEN); 210 efx_rc_t rc; 211 212 req.emr_cmd = MC_CMD_GET_LINK; 213 req.emr_in_buf = payload; 214 req.emr_in_length = MC_CMD_GET_LINK_IN_LEN; 215 req.emr_out_buf = payload; 216 req.emr_out_length = MC_CMD_GET_LINK_OUT_LEN; 217 218 efx_mcdi_execute(enp, &req); 219 220 if (req.emr_rc != 0) { 221 rc = req.emr_rc; 222 goto fail1; 223 } 224 225 if (req.emr_out_length_used < MC_CMD_GET_LINK_OUT_LEN) { 226 rc = EMSGSIZE; 227 goto fail2; 228 } 229 230 mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_CAP), 231 &elsp->els_adv_cap_mask); 232 mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_LP_CAP), 233 &elsp->els_lp_cap_mask); 234 235 mcdi_phy_decode_link_mode(enp, MCDI_OUT_DWORD(req, GET_LINK_OUT_FLAGS), 236 MCDI_OUT_DWORD(req, GET_LINK_OUT_LINK_SPEED), 237 MCDI_OUT_DWORD(req, GET_LINK_OUT_FCNTL), 238 &elsp->els_link_mode, &elsp->els_fcntl); 239 240#if EFSYS_OPT_LOOPBACK 241 /* Assert the MC_CMD_LOOPBACK and EFX_LOOPBACK namespace agree */ 242 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_NONE == EFX_LOOPBACK_OFF); 243 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_DATA == EFX_LOOPBACK_DATA); 244 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMAC == EFX_LOOPBACK_GMAC); 245 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGMII == EFX_LOOPBACK_XGMII); 246 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGXS == EFX_LOOPBACK_XGXS); 247 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI == EFX_LOOPBACK_XAUI); 248 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMII == EFX_LOOPBACK_GMII); 249 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SGMII == EFX_LOOPBACK_SGMII); 250 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGBR == EFX_LOOPBACK_XGBR); 251 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI == EFX_LOOPBACK_XFI); 252 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI_FAR == EFX_LOOPBACK_XAUI_FAR); 253 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMII_FAR == EFX_LOOPBACK_GMII_FAR); 254 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SGMII_FAR == EFX_LOOPBACK_SGMII_FAR); 255 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI_FAR == EFX_LOOPBACK_XFI_FAR); 256 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GPHY == EFX_LOOPBACK_GPHY); 257 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PHYXS == EFX_LOOPBACK_PHY_XS); 258 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PCS == EFX_LOOPBACK_PCS); 259 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PMAPMD == EFX_LOOPBACK_PMA_PMD); 260 261 elsp->els_loopback = MCDI_OUT_DWORD(req, GET_LINK_OUT_LOOPBACK_MODE); 262#endif /* EFSYS_OPT_LOOPBACK */ 263 264 elsp->els_mac_up = MCDI_OUT_DWORD(req, GET_LINK_OUT_MAC_FAULT) == 0; 265 266 return (0); 267 268fail2: 269 EFSYS_PROBE(fail2); 270fail1: 271 EFSYS_PROBE1(fail1, efx_rc_t, rc); 272 273 return (rc); 274} 275 276 __checkReturn efx_rc_t 277ef10_phy_reconfigure( 278 __in efx_nic_t *enp) 279{ 280 efx_port_t *epp = &(enp->en_port); 281 efx_mcdi_req_t req; 282 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_SET_LINK_IN_LEN, 283 MC_CMD_SET_LINK_OUT_LEN); 284 uint32_t cap_mask; 285#if EFSYS_OPT_PHY_LED_CONTROL 286 unsigned int led_mode; 287#endif 288 unsigned int speed; 289 boolean_t supported; 290 efx_rc_t rc; 291 292 if ((rc = efx_mcdi_link_control_supported(enp, &supported)) != 0) 293 goto fail1; 294 if (supported == B_FALSE) 295 goto out; 296 297 req.emr_cmd = MC_CMD_SET_LINK; 298 req.emr_in_buf = payload; 299 req.emr_in_length = MC_CMD_SET_LINK_IN_LEN; 300 req.emr_out_buf = payload; 301 req.emr_out_length = MC_CMD_SET_LINK_OUT_LEN; 302 303 cap_mask = epp->ep_adv_cap_mask; 304 MCDI_IN_POPULATE_DWORD_10(req, SET_LINK_IN_CAP, 305 PHY_CAP_10HDX, (cap_mask >> EFX_PHY_CAP_10HDX) & 0x1, 306 PHY_CAP_10FDX, (cap_mask >> EFX_PHY_CAP_10FDX) & 0x1, 307 PHY_CAP_100HDX, (cap_mask >> EFX_PHY_CAP_100HDX) & 0x1, 308 PHY_CAP_100FDX, (cap_mask >> EFX_PHY_CAP_100FDX) & 0x1, 309 PHY_CAP_1000HDX, (cap_mask >> EFX_PHY_CAP_1000HDX) & 0x1, 310 PHY_CAP_1000FDX, (cap_mask >> EFX_PHY_CAP_1000FDX) & 0x1, 311 PHY_CAP_10000FDX, (cap_mask >> EFX_PHY_CAP_10000FDX) & 0x1, 312 PHY_CAP_PAUSE, (cap_mask >> EFX_PHY_CAP_PAUSE) & 0x1, 313 PHY_CAP_ASYM, (cap_mask >> EFX_PHY_CAP_ASYM) & 0x1, 314 PHY_CAP_AN, (cap_mask >> EFX_PHY_CAP_AN) & 0x1); 315 /* Too many fields for for POPULATE macros, so insert this afterwards */ 316 MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP, 317 PHY_CAP_40000FDX, (cap_mask >> EFX_PHY_CAP_40000FDX) & 0x1); 318 319#if EFSYS_OPT_LOOPBACK 320 MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE, 321 epp->ep_loopback_type); 322 switch (epp->ep_loopback_link_mode) { 323 case EFX_LINK_100FDX: 324 speed = 100; 325 break; 326 case EFX_LINK_1000FDX: 327 speed = 1000; 328 break; 329 case EFX_LINK_10000FDX: 330 speed = 10000; 331 break; 332 case EFX_LINK_40000FDX: 333 speed = 40000; 334 break; 335 default: 336 speed = 0; 337 } 338#else 339 MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE, MC_CMD_LOOPBACK_NONE); 340 speed = 0; 341#endif /* EFSYS_OPT_LOOPBACK */ 342 MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_SPEED, speed); 343 344#if EFSYS_OPT_PHY_FLAGS 345 MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, epp->ep_phy_flags); 346#else 347 MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, 0); 348#endif /* EFSYS_OPT_PHY_FLAGS */ 349 350 efx_mcdi_execute(enp, &req); 351 352 if (req.emr_rc != 0) { 353 rc = req.emr_rc; 354 goto fail2; 355 } 356 357 /* And set the blink mode */ 358 (void) memset(payload, 0, sizeof (payload)); 359 req.emr_cmd = MC_CMD_SET_ID_LED; 360 req.emr_in_buf = payload; 361 req.emr_in_length = MC_CMD_SET_ID_LED_IN_LEN; 362 req.emr_out_buf = payload; 363 req.emr_out_length = MC_CMD_SET_ID_LED_OUT_LEN; 364 365#if EFSYS_OPT_PHY_LED_CONTROL 366 switch (epp->ep_phy_led_mode) { 367 case EFX_PHY_LED_DEFAULT: 368 led_mode = MC_CMD_LED_DEFAULT; 369 break; 370 case EFX_PHY_LED_OFF: 371 led_mode = MC_CMD_LED_OFF; 372 break; 373 case EFX_PHY_LED_ON: 374 led_mode = MC_CMD_LED_ON; 375 break; 376 default: 377 EFSYS_ASSERT(0); 378 led_mode = MC_CMD_LED_DEFAULT; 379 } 380 381 MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, led_mode); 382#else 383 MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, MC_CMD_LED_DEFAULT); 384#endif /* EFSYS_OPT_PHY_LED_CONTROL */ 385 386 efx_mcdi_execute(enp, &req); 387 388 if (req.emr_rc != 0) { 389 rc = req.emr_rc; 390 goto fail3; 391 } 392out: 393 return (0); 394 395fail3: 396 EFSYS_PROBE(fail3); 397fail2: 398 EFSYS_PROBE(fail2); 399fail1: 400 EFSYS_PROBE1(fail1, efx_rc_t, rc); 401 402 return (rc); 403} 404 405 __checkReturn efx_rc_t 406ef10_phy_verify( 407 __in efx_nic_t *enp) 408{ 409 efx_mcdi_req_t req; 410 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_PHY_STATE_IN_LEN, 411 MC_CMD_GET_PHY_STATE_OUT_LEN); 412 uint32_t state; 413 efx_rc_t rc; 414 415 req.emr_cmd = MC_CMD_GET_PHY_STATE; 416 req.emr_in_buf = payload; 417 req.emr_in_length = MC_CMD_GET_PHY_STATE_IN_LEN; 418 req.emr_out_buf = payload; 419 req.emr_out_length = MC_CMD_GET_PHY_STATE_OUT_LEN; 420 421 efx_mcdi_execute(enp, &req); 422 423 if (req.emr_rc != 0) { 424 rc = req.emr_rc; 425 goto fail1; 426 } 427 428 if (req.emr_out_length_used < MC_CMD_GET_PHY_STATE_OUT_LEN) { 429 rc = EMSGSIZE; 430 goto fail2; 431 } 432 433 state = MCDI_OUT_DWORD(req, GET_PHY_STATE_OUT_STATE); 434 if (state != MC_CMD_PHY_STATE_OK) { 435 if (state != MC_CMD_PHY_STATE_ZOMBIE) 436 EFSYS_PROBE1(mc_pcol_error, int, state); 437 rc = ENOTACTIVE; 438 goto fail3; 439 } 440 441 return (0); 442 443fail3: 444 EFSYS_PROBE(fail3); 445fail2: 446 EFSYS_PROBE(fail2); 447fail1: 448 EFSYS_PROBE1(fail1, efx_rc_t, rc); 449 450 return (rc); 451} 452 453 __checkReturn efx_rc_t 454ef10_phy_oui_get( 455 __in efx_nic_t *enp, 456 __out uint32_t *ouip) 457{ 458 _NOTE(ARGUNUSED(enp, ouip)) 459 460 return (ENOTSUP); 461} 462 463#if EFSYS_OPT_PHY_STATS 464 465 __checkReturn efx_rc_t 466ef10_phy_stats_update( 467 __in efx_nic_t *enp, 468 __in efsys_mem_t *esmp, 469 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat) 470{ 471 /* TBD: no stats support in firmware yet */ 472 _NOTE(ARGUNUSED(enp, esmp)) 473 memset(stat, 0, EFX_PHY_NSTATS * sizeof (*stat)); 474 475 return (0); 476} 477 478#endif /* EFSYS_OPT_PHY_STATS */ 479 480#if EFSYS_OPT_BIST 481 482 __checkReturn efx_rc_t 483ef10_bist_enable_offline( 484 __in efx_nic_t *enp) 485{ 486 efx_rc_t rc; 487 488 if ((rc = efx_mcdi_bist_enable_offline(enp)) != 0) 489 goto fail1; 490 491 return (0); 492 493fail1: 494 EFSYS_PROBE1(fail1, efx_rc_t, rc); 495 496 return (rc); 497} 498 499 __checkReturn efx_rc_t 500ef10_bist_start( 501 __in efx_nic_t *enp, 502 __in efx_bist_type_t type) 503{ 504 efx_rc_t rc; 505 506 if ((rc = efx_mcdi_bist_start(enp, type)) != 0) 507 goto fail1; 508 509 return (0); 510 511fail1: 512 EFSYS_PROBE1(fail1, efx_rc_t, rc); 513 514 return (rc); 515} 516 517 __checkReturn efx_rc_t 518ef10_bist_poll( 519 __in efx_nic_t *enp, 520 __in efx_bist_type_t type, 521 __out efx_bist_result_t *resultp, 522 __out_opt __drv_when(count > 0, __notnull) 523 uint32_t *value_maskp, 524 __out_ecount_opt(count) __drv_when(count > 0, __notnull) 525 unsigned long *valuesp, 526 __in size_t count) 527{ 528 /* 529 * MCDI_CTL_SDU_LEN_MAX_V1 is large enough cover all BIST results, 530 * whilst not wasting stack. 531 */ 532 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_POLL_BIST_IN_LEN, 533 MCDI_CTL_SDU_LEN_MAX_V1); 534 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); 535 efx_mcdi_req_t req; 536 uint32_t value_mask = 0; 537 uint32_t result; 538 efx_rc_t rc; 539 540 EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_LEN <= 541 MCDI_CTL_SDU_LEN_MAX_V1); 542 EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_SFT9001_LEN <= 543 MCDI_CTL_SDU_LEN_MAX_V1); 544 EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_MRSFP_LEN <= 545 MCDI_CTL_SDU_LEN_MAX_V1); 546 EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_MEM_LEN <= 547 MCDI_CTL_SDU_LEN_MAX_V1); 548 549 _NOTE(ARGUNUSED(type)) 550 551 req.emr_cmd = MC_CMD_POLL_BIST; 552 req.emr_in_buf = payload; 553 req.emr_in_length = MC_CMD_POLL_BIST_IN_LEN; 554 req.emr_out_buf = payload; 555 req.emr_out_length = MCDI_CTL_SDU_LEN_MAX_V1; 556 557 efx_mcdi_execute(enp, &req); 558 559 if (req.emr_rc != 0) { 560 rc = req.emr_rc; 561 goto fail1; 562 } 563 564 if (req.emr_out_length_used < MC_CMD_POLL_BIST_OUT_RESULT_OFST + 4) { 565 rc = EMSGSIZE; 566 goto fail2; 567 } 568 569 if (count > 0) 570 (void) memset(valuesp, '\0', count * sizeof (unsigned long)); 571 572 result = MCDI_OUT_DWORD(req, POLL_BIST_OUT_RESULT); 573 574 if (result == MC_CMD_POLL_BIST_FAILED && 575 req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MEM_LEN && 576 count > EFX_BIST_MEM_ECC_FATAL) { 577 if (valuesp != NULL) { 578 valuesp[EFX_BIST_MEM_TEST] = 579 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_TEST); 580 valuesp[EFX_BIST_MEM_ADDR] = 581 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ADDR); 582 valuesp[EFX_BIST_MEM_BUS] = 583 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_BUS); 584 valuesp[EFX_BIST_MEM_EXPECT] = 585 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_EXPECT); 586 valuesp[EFX_BIST_MEM_ACTUAL] = 587 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ACTUAL); 588 valuesp[EFX_BIST_MEM_ECC] = 589 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC); 590 valuesp[EFX_BIST_MEM_ECC_PARITY] = 591 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_PARITY); 592 valuesp[EFX_BIST_MEM_ECC_FATAL] = 593 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_FATAL); 594 } 595 value_mask |= (1 << EFX_BIST_MEM_TEST) | 596 (1 << EFX_BIST_MEM_ADDR) | 597 (1 << EFX_BIST_MEM_BUS) | 598 (1 << EFX_BIST_MEM_EXPECT) | 599 (1 << EFX_BIST_MEM_ACTUAL) | 600 (1 << EFX_BIST_MEM_ECC) | 601 (1 << EFX_BIST_MEM_ECC_PARITY) | 602 (1 << EFX_BIST_MEM_ECC_FATAL); 603 } else if (result == MC_CMD_POLL_BIST_FAILED && 604 encp->enc_phy_type == EFX_PHY_XFI_FARMI && 605 req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MRSFP_LEN && 606 count > EFX_BIST_FAULT_CODE) { 607 if (valuesp != NULL) 608 valuesp[EFX_BIST_FAULT_CODE] = 609 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MRSFP_TEST); 610 value_mask |= 1 << EFX_BIST_FAULT_CODE; 611 } 612 613 if (value_maskp != NULL) 614 *value_maskp = value_mask; 615 616 EFSYS_ASSERT(resultp != NULL); 617 if (result == MC_CMD_POLL_BIST_RUNNING) 618 *resultp = EFX_BIST_RESULT_RUNNING; 619 else if (result == MC_CMD_POLL_BIST_PASSED) 620 *resultp = EFX_BIST_RESULT_PASSED; 621 else 622 *resultp = EFX_BIST_RESULT_FAILED; 623 624 return (0); 625 626fail2: 627 EFSYS_PROBE(fail2); 628fail1: 629 EFSYS_PROBE1(fail1, efx_rc_t, rc); 630 631 return (rc); 632} 633 634 void 635ef10_bist_stop( 636 __in efx_nic_t *enp, 637 __in efx_bist_type_t type) 638{ 639 /* There is no way to stop BIST on EF10. */ 640 _NOTE(ARGUNUSED(enp, type)) 641} 642 643#endif /* EFSYS_OPT_BIST */ 644 645#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */ 646