1265236Sken/*- 2265236Sken * Copyright (c) 2009 Yahoo! Inc. 3283990Sslm * Copyright (c) 2011-2015 LSI Corp. 4299962Sslm * Copyright (c) 2013-2016 Avago Technologies 5265236Sken * All rights reserved. 6265236Sken * 7265236Sken * Redistribution and use in source and binary forms, with or without 8265236Sken * modification, are permitted provided that the following conditions 9265236Sken * are met: 10265236Sken * 1. Redistributions of source code must retain the above copyright 11265236Sken * notice, this list of conditions and the following disclaimer. 12265236Sken * 2. Redistributions in binary form must reproduce the above copyright 13265236Sken * notice, this list of conditions and the following disclaimer in the 14265236Sken * documentation and/or other materials provided with the distribution. 15265236Sken * 16265236Sken * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17265236Sken * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18265236Sken * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19265236Sken * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20265236Sken * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21265236Sken * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22265236Sken * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23265236Sken * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24265236Sken * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25265236Sken * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26265236Sken * SUCH DAMAGE. 27265236Sken * 28283990Sslm * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 29283990Sslm * 30265236Sken */ 31265236Sken 32265236Sken#include <sys/cdefs.h> 33265236Sken__FBSDID("$FreeBSD: stable/10/sys/dev/mpr/mpr.c 322661 2017-08-18 15:38:08Z ken $"); 34265236Sken 35283990Sslm/* Communications core for Avago Technologies (LSI) MPT3 */ 36265236Sken 37265236Sken/* TODO Move headers to mprvar */ 38265236Sken#include <sys/types.h> 39265236Sken#include <sys/param.h> 40265236Sken#include <sys/systm.h> 41265236Sken#include <sys/kernel.h> 42265236Sken#include <sys/selinfo.h> 43265236Sken#include <sys/lock.h> 44265236Sken#include <sys/mutex.h> 45265236Sken#include <sys/module.h> 46265236Sken#include <sys/bus.h> 47265236Sken#include <sys/conf.h> 48265236Sken#include <sys/bio.h> 49265236Sken#include <sys/malloc.h> 50265236Sken#include <sys/uio.h> 51265236Sken#include <sys/sysctl.h> 52265236Sken#include <sys/queue.h> 53265236Sken#include <sys/kthread.h> 54265236Sken#include <sys/taskqueue.h> 55265236Sken#include <sys/endian.h> 56265236Sken#include <sys/eventhandler.h> 57265236Sken 58265236Sken#include <machine/bus.h> 59265236Sken#include <machine/resource.h> 60265236Sken#include <sys/rman.h> 61265236Sken#include <sys/proc.h> 62265236Sken 63265236Sken#include <dev/pci/pcivar.h> 64265236Sken 65265236Sken#include <cam/cam.h> 66319436Sslm#include <cam/cam_ccb.h> 67265236Sken#include <cam/scsi/scsi_all.h> 68265236Sken 69265236Sken#include <dev/mpr/mpi/mpi2_type.h> 70265236Sken#include <dev/mpr/mpi/mpi2.h> 71265236Sken#include <dev/mpr/mpi/mpi2_ioc.h> 72265236Sken#include <dev/mpr/mpi/mpi2_sas.h> 73319436Sslm#include <dev/mpr/mpi/mpi2_pci.h> 74265236Sken#include <dev/mpr/mpi/mpi2_cnfg.h> 75265236Sken#include <dev/mpr/mpi/mpi2_init.h> 76265236Sken#include <dev/mpr/mpi/mpi2_tool.h> 77265236Sken#include <dev/mpr/mpr_ioctl.h> 78265236Sken#include <dev/mpr/mprvar.h> 79265236Sken#include <dev/mpr/mpr_table.h> 80319436Sslm#include <dev/mpr/mpr_sas.h> 81265236Sken 82265236Skenstatic int mpr_diag_reset(struct mpr_softc *sc, int sleep_flag); 83265236Skenstatic int mpr_init_queues(struct mpr_softc *sc); 84265236Skenstatic int mpr_message_unit_reset(struct mpr_softc *sc, int sleep_flag); 85265236Skenstatic int mpr_transition_operational(struct mpr_softc *sc); 86265236Skenstatic int mpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching); 87265236Skenstatic void mpr_iocfacts_free(struct mpr_softc *sc); 88265236Skenstatic void mpr_startup(void *arg); 89265236Skenstatic int mpr_send_iocinit(struct mpr_softc *sc); 90265236Skenstatic int mpr_alloc_queues(struct mpr_softc *sc); 91265236Skenstatic int mpr_alloc_replies(struct mpr_softc *sc); 92265236Skenstatic int mpr_alloc_requests(struct mpr_softc *sc); 93319436Sslmstatic int mpr_alloc_nvme_prp_pages(struct mpr_softc *sc); 94265236Skenstatic int mpr_attach_log(struct mpr_softc *sc); 95265236Skenstatic __inline void mpr_complete_command(struct mpr_softc *sc, 96265236Sken struct mpr_command *cm); 97265236Skenstatic void mpr_dispatch_event(struct mpr_softc *sc, uintptr_t data, 98265236Sken MPI2_EVENT_NOTIFICATION_REPLY *reply); 99299962Sslmstatic void mpr_config_complete(struct mpr_softc *sc, struct mpr_command *cm); 100265236Skenstatic void mpr_periodic(void *); 101265236Skenstatic int mpr_reregister_events(struct mpr_softc *sc); 102299962Sslmstatic void mpr_enqueue_request(struct mpr_softc *sc, struct mpr_command *cm); 103299962Sslmstatic int mpr_get_iocfacts(struct mpr_softc *sc, MPI2_IOC_FACTS_REPLY *facts); 104265236Skenstatic int mpr_wait_db_ack(struct mpr_softc *sc, int timeout, int sleep_flag); 105265236SkenSYSCTL_NODE(_hw, OID_AUTO, mpr, CTLFLAG_RD, 0, "MPR Driver Parameters"); 106265236Sken 107265236SkenMALLOC_DEFINE(M_MPR, "mpr", "mpr driver memory"); 108265236Sken 109265236Sken/* 110265236Sken * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of 111265236Sken * any state and back to its initialization state machine. 112265236Sken */ 113265236Skenstatic char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d }; 114265236Sken 115265236Sken/* 116265236Sken * Added this union to smoothly convert le64toh cm->cm_desc.Words. 117319436Sslm * Compiler only supports uint64_t to be passed as an argument. 118265236Sken * Otherwise it will through this error: 119265236Sken * "aggregate value used where an integer was expected" 120265236Sken */ 121265236Skentypedef union _reply_descriptor { 122265236Sken u64 word; 123265236Sken struct { 124265236Sken u32 low; 125265236Sken u32 high; 126265236Sken } u; 127319436Sslm} reply_descriptor, request_descriptor; 128265236Sken 129265236Sken/* Rate limit chain-fail messages to 1 per minute */ 130265236Skenstatic struct timeval mpr_chainfail_interval = { 60, 0 }; 131265236Sken 132265236Sken/* 133265236Sken * sleep_flag can be either CAN_SLEEP or NO_SLEEP. 134265236Sken * If this function is called from process context, it can sleep 135265236Sken * and there is no harm to sleep, in case if this fuction is called 136265236Sken * from Interrupt handler, we can not sleep and need NO_SLEEP flag set. 137265236Sken * based on sleep flags driver will call either msleep, pause or DELAY. 138265236Sken * msleep and pause are of same variant, but pause is used when mpr_mtx 139265236Sken * is not hold by driver. 140265236Sken */ 141265236Skenstatic int 142265236Skenmpr_diag_reset(struct mpr_softc *sc,int sleep_flag) 143265236Sken{ 144265236Sken uint32_t reg; 145265236Sken int i, error, tries = 0; 146265236Sken uint8_t first_wait_done = FALSE; 147265236Sken 148265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 149265236Sken 150265236Sken /* Clear any pending interrupts */ 151265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 152265236Sken 153265236Sken /* 154265236Sken * Force NO_SLEEP for threads prohibited to sleep 155265236Sken * e.a Thread from interrupt handler are prohibited to sleep. 156265236Sken */ 157265236Sken#if __FreeBSD_version >= 1000029 158265236Sken if (curthread->td_no_sleeping) 159265236Sken#else //__FreeBSD_version < 1000029 160265236Sken if (curthread->td_pflags & TDP_NOSLEEPING) 161265236Sken#endif //__FreeBSD_version >= 1000029 162265236Sken sleep_flag = NO_SLEEP; 163265236Sken 164265236Sken /* Push the magic sequence */ 165265236Sken error = ETIMEDOUT; 166265236Sken while (tries++ < 20) { 167265236Sken for (i = 0; i < sizeof(mpt2_reset_magic); i++) 168265236Sken mpr_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 169265236Sken mpt2_reset_magic[i]); 170265236Sken 171265236Sken /* wait 100 msec */ 172265236Sken if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) 173265236Sken msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, 174265236Sken "mprdiag", hz/10); 175265236Sken else if (sleep_flag == CAN_SLEEP) 176265236Sken pause("mprdiag", hz/10); 177265236Sken else 178265236Sken DELAY(100 * 1000); 179265236Sken 180265236Sken reg = mpr_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 181265236Sken if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) { 182265236Sken error = 0; 183265236Sken break; 184265236Sken } 185265236Sken } 186265236Sken if (error) 187265236Sken return (error); 188265236Sken 189265236Sken /* Send the actual reset. XXX need to refresh the reg? */ 190265236Sken mpr_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, 191265236Sken reg | MPI2_DIAG_RESET_ADAPTER); 192265236Sken 193265236Sken /* Wait up to 300 seconds in 50ms intervals */ 194265236Sken error = ETIMEDOUT; 195265236Sken for (i = 0; i < 6000; i++) { 196265236Sken /* 197265236Sken * Wait 50 msec. If this is the first time through, wait 256 198265236Sken * msec to satisfy Diag Reset timing requirements. 199265236Sken */ 200265236Sken if (first_wait_done) { 201265236Sken if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) 202265236Sken msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, 203265236Sken "mprdiag", hz/20); 204265236Sken else if (sleep_flag == CAN_SLEEP) 205265236Sken pause("mprdiag", hz/20); 206265236Sken else 207265236Sken DELAY(50 * 1000); 208265236Sken } else { 209265236Sken DELAY(256 * 1000); 210265236Sken first_wait_done = TRUE; 211265236Sken } 212265236Sken /* 213265236Sken * Check for the RESET_ADAPTER bit to be cleared first, then 214265236Sken * wait for the RESET state to be cleared, which takes a little 215265236Sken * longer. 216265236Sken */ 217265236Sken reg = mpr_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 218265236Sken if (reg & MPI2_DIAG_RESET_ADAPTER) { 219265236Sken continue; 220265236Sken } 221265236Sken reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET); 222265236Sken if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) { 223265236Sken error = 0; 224265236Sken break; 225265236Sken } 226265236Sken } 227265236Sken if (error) 228265236Sken return (error); 229265236Sken 230265236Sken mpr_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0); 231265236Sken 232265236Sken return (0); 233265236Sken} 234265236Sken 235265236Skenstatic int 236265236Skenmpr_message_unit_reset(struct mpr_softc *sc, int sleep_flag) 237265236Sken{ 238265236Sken 239265236Sken MPR_FUNCTRACE(sc); 240265236Sken 241265236Sken mpr_regwrite(sc, MPI2_DOORBELL_OFFSET, 242265236Sken MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET << 243265236Sken MPI2_DOORBELL_FUNCTION_SHIFT); 244265236Sken 245265236Sken if (mpr_wait_db_ack(sc, 5, sleep_flag) != 0) { 246265236Sken mpr_dprint(sc, MPR_FAULT, "Doorbell handshake failed : <%s>\n", 247265236Sken __func__); 248265236Sken return (ETIMEDOUT); 249265236Sken } 250265236Sken 251265236Sken return (0); 252265236Sken} 253265236Sken 254265236Skenstatic int 255265236Skenmpr_transition_ready(struct mpr_softc *sc) 256265236Sken{ 257265236Sken uint32_t reg, state; 258265236Sken int error, tries = 0; 259265236Sken int sleep_flags; 260265236Sken 261265236Sken MPR_FUNCTRACE(sc); 262265236Sken /* If we are in attach call, do not sleep */ 263265236Sken sleep_flags = (sc->mpr_flags & MPR_FLAGS_ATTACH_DONE) 264265236Sken ? CAN_SLEEP : NO_SLEEP; 265265236Sken 266265236Sken error = 0; 267265236Sken while (tries++ < 1200) { 268265236Sken reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET); 269265236Sken mpr_dprint(sc, MPR_INIT, "Doorbell= 0x%x\n", reg); 270265236Sken 271265236Sken /* 272265236Sken * Ensure the IOC is ready to talk. If it's not, try 273265236Sken * resetting it. 274265236Sken */ 275265236Sken if (reg & MPI2_DOORBELL_USED) { 276265236Sken mpr_diag_reset(sc, sleep_flags); 277265236Sken DELAY(50000); 278265236Sken continue; 279265236Sken } 280265236Sken 281265236Sken /* Is the adapter owned by another peer? */ 282265236Sken if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) == 283265236Sken (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) { 284265236Sken device_printf(sc->mpr_dev, "IOC is under the control " 285265236Sken "of another peer host, aborting initialization.\n"); 286265236Sken return (ENXIO); 287265236Sken } 288265236Sken 289265236Sken state = reg & MPI2_IOC_STATE_MASK; 290265236Sken if (state == MPI2_IOC_STATE_READY) { 291265236Sken /* Ready to go! */ 292265236Sken error = 0; 293265236Sken break; 294265236Sken } else if (state == MPI2_IOC_STATE_FAULT) { 295265236Sken mpr_dprint(sc, MPR_FAULT, "IOC in fault state 0x%x\n", 296265236Sken state & MPI2_DOORBELL_FAULT_CODE_MASK); 297265236Sken mpr_diag_reset(sc, sleep_flags); 298265236Sken } else if (state == MPI2_IOC_STATE_OPERATIONAL) { 299265236Sken /* Need to take ownership */ 300265236Sken mpr_message_unit_reset(sc, sleep_flags); 301265236Sken } else if (state == MPI2_IOC_STATE_RESET) { 302265236Sken /* Wait a bit, IOC might be in transition */ 303265236Sken mpr_dprint(sc, MPR_FAULT, 304265236Sken "IOC in unexpected reset state\n"); 305265236Sken } else { 306265236Sken mpr_dprint(sc, MPR_FAULT, 307265236Sken "IOC in unknown state 0x%x\n", state); 308265236Sken error = EINVAL; 309265236Sken break; 310265236Sken } 311265236Sken 312265236Sken /* Wait 50ms for things to settle down. */ 313265236Sken DELAY(50000); 314265236Sken } 315265236Sken 316265236Sken if (error) 317265236Sken device_printf(sc->mpr_dev, "Cannot transition IOC to ready\n"); 318265236Sken return (error); 319265236Sken} 320265236Sken 321265236Skenstatic int 322265236Skenmpr_transition_operational(struct mpr_softc *sc) 323265236Sken{ 324265236Sken uint32_t reg, state; 325265236Sken int error; 326265236Sken 327265236Sken MPR_FUNCTRACE(sc); 328265236Sken 329265236Sken error = 0; 330265236Sken reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET); 331265236Sken mpr_dprint(sc, MPR_INIT, "Doorbell= 0x%x\n", reg); 332265236Sken 333265236Sken state = reg & MPI2_IOC_STATE_MASK; 334265236Sken if (state != MPI2_IOC_STATE_READY) { 335265236Sken if ((error = mpr_transition_ready(sc)) != 0) { 336265236Sken mpr_dprint(sc, MPR_FAULT, 337265236Sken "%s failed to transition ready\n", __func__); 338265236Sken return (error); 339265236Sken } 340265236Sken } 341265236Sken 342265236Sken error = mpr_send_iocinit(sc); 343265236Sken return (error); 344265236Sken} 345265236Sken 346265236Sken/* 347265236Sken * This is called during attach and when re-initializing due to a Diag Reset. 348265236Sken * IOC Facts is used to allocate many of the structures needed by the driver. 349265236Sken * If called from attach, de-allocation is not required because the driver has 350265236Sken * not allocated any structures yet, but if called from a Diag Reset, previously 351265236Sken * allocated structures based on IOC Facts will need to be freed and re- 352265236Sken * allocated bases on the latest IOC Facts. 353265236Sken */ 354265236Skenstatic int 355265236Skenmpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching) 356265236Sken{ 357283990Sslm int error; 358265236Sken Mpi2IOCFactsReply_t saved_facts; 359265236Sken uint8_t saved_mode, reallocating; 360265236Sken 361265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 362265236Sken 363265236Sken /* Save old IOC Facts and then only reallocate if Facts have changed */ 364265236Sken if (!attaching) { 365265236Sken bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY)); 366265236Sken } 367265236Sken 368265236Sken /* 369265236Sken * Get IOC Facts. In all cases throughout this function, panic if doing 370265236Sken * a re-initialization and only return the error if attaching so the OS 371265236Sken * can handle it. 372265236Sken */ 373265236Sken if ((error = mpr_get_iocfacts(sc, sc->facts)) != 0) { 374265236Sken if (attaching) { 375265236Sken mpr_dprint(sc, MPR_FAULT, "%s failed to get IOC Facts " 376265236Sken "with error %d\n", __func__, error); 377265236Sken return (error); 378265236Sken } else { 379265236Sken panic("%s failed to get IOC Facts with error %d\n", 380265236Sken __func__, error); 381265236Sken } 382265236Sken } 383265236Sken 384322661Sken MPR_DPRINT_PAGE(sc, MPR_XINFO, iocfacts, sc->facts); 385265236Sken 386265236Sken snprintf(sc->fw_version, sizeof(sc->fw_version), 387265236Sken "%02d.%02d.%02d.%02d", 388265236Sken sc->facts->FWVersion.Struct.Major, 389265236Sken sc->facts->FWVersion.Struct.Minor, 390265236Sken sc->facts->FWVersion.Struct.Unit, 391265236Sken sc->facts->FWVersion.Struct.Dev); 392265236Sken 393265236Sken mpr_printf(sc, "Firmware: %s, Driver: %s\n", sc->fw_version, 394265236Sken MPR_DRIVER_VERSION); 395265236Sken mpr_printf(sc, "IOCCapabilities: %b\n", sc->facts->IOCCapabilities, 396265236Sken "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf" 397265236Sken "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR" 398319436Sslm "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc" 399319436Sslm "\22FastPath" "\23RDPQArray" "\24AtomicReqDesc" "\25PCIeSRIOV"); 400265236Sken 401265236Sken /* 402265236Sken * If the chip doesn't support event replay then a hard reset will be 403265236Sken * required to trigger a full discovery. Do the reset here then 404265236Sken * retransition to Ready. A hard reset might have already been done, 405265236Sken * but it doesn't hurt to do it again. Only do this if attaching, not 406265236Sken * for a Diag Reset. 407265236Sken */ 408265236Sken if (attaching) { 409265236Sken if ((sc->facts->IOCCapabilities & 410265236Sken MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0) { 411265236Sken mpr_diag_reset(sc, NO_SLEEP); 412265236Sken if ((error = mpr_transition_ready(sc)) != 0) { 413265236Sken mpr_dprint(sc, MPR_FAULT, "%s failed to " 414265236Sken "transition to ready with error %d\n", 415265236Sken __func__, error); 416265236Sken return (error); 417265236Sken } 418265236Sken } 419265236Sken } 420265236Sken 421265236Sken /* 422265236Sken * Set flag if IR Firmware is loaded. If the RAID Capability has 423265236Sken * changed from the previous IOC Facts, log a warning, but only if 424265236Sken * checking this after a Diag Reset and not during attach. 425265236Sken */ 426265236Sken saved_mode = sc->ir_firmware; 427265236Sken if (sc->facts->IOCCapabilities & 428265236Sken MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) 429265236Sken sc->ir_firmware = 1; 430265236Sken if (!attaching) { 431265236Sken if (sc->ir_firmware != saved_mode) { 432265236Sken mpr_dprint(sc, MPR_FAULT, "%s new IR/IT mode in IOC " 433265236Sken "Facts does not match previous mode\n", __func__); 434265236Sken } 435265236Sken } 436265236Sken 437265236Sken /* Only deallocate and reallocate if relevant IOC Facts have changed */ 438265236Sken reallocating = FALSE; 439322661Sken sc->mpr_flags &= ~MPR_FLAGS_REALLOCATED; 440322661Sken 441265236Sken if ((!attaching) && 442265236Sken ((saved_facts.MsgVersion != sc->facts->MsgVersion) || 443265236Sken (saved_facts.HeaderVersion != sc->facts->HeaderVersion) || 444265236Sken (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) || 445265236Sken (saved_facts.RequestCredit != sc->facts->RequestCredit) || 446265236Sken (saved_facts.ProductID != sc->facts->ProductID) || 447265236Sken (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) || 448265236Sken (saved_facts.IOCRequestFrameSize != 449265236Sken sc->facts->IOCRequestFrameSize) || 450299962Sslm (saved_facts.IOCMaxChainSegmentSize != 451299962Sslm sc->facts->IOCMaxChainSegmentSize) || 452265236Sken (saved_facts.MaxTargets != sc->facts->MaxTargets) || 453265236Sken (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) || 454265236Sken (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) || 455265236Sken (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) || 456265236Sken (saved_facts.MaxReplyDescriptorPostQueueDepth != 457265236Sken sc->facts->MaxReplyDescriptorPostQueueDepth) || 458265236Sken (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) || 459265236Sken (saved_facts.MaxVolumes != sc->facts->MaxVolumes) || 460265236Sken (saved_facts.MaxPersistentEntries != 461265236Sken sc->facts->MaxPersistentEntries))) { 462265236Sken reallocating = TRUE; 463322661Sken 464322661Sken /* Record that we reallocated everything */ 465322661Sken sc->mpr_flags |= MPR_FLAGS_REALLOCATED; 466265236Sken } 467265236Sken 468265236Sken /* 469265236Sken * Some things should be done if attaching or re-allocating after a Diag 470265236Sken * Reset, but are not needed after a Diag Reset if the FW has not 471265236Sken * changed. 472265236Sken */ 473265236Sken if (attaching || reallocating) { 474265236Sken /* 475265236Sken * Check if controller supports FW diag buffers and set flag to 476265236Sken * enable each type. 477265236Sken */ 478265236Sken if (sc->facts->IOCCapabilities & 479265236Sken MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) 480265236Sken sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE]. 481265236Sken enabled = TRUE; 482265236Sken if (sc->facts->IOCCapabilities & 483265236Sken MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) 484265236Sken sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT]. 485265236Sken enabled = TRUE; 486265236Sken if (sc->facts->IOCCapabilities & 487265236Sken MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) 488265236Sken sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED]. 489265236Sken enabled = TRUE; 490265236Sken 491265236Sken /* 492319436Sslm * Set flags for some supported items. 493265236Sken */ 494265236Sken if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) 495265236Sken sc->eedp_enabled = TRUE; 496265236Sken if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) 497265236Sken sc->control_TLR = TRUE; 498319436Sslm if (sc->facts->IOCCapabilities & 499319436Sslm MPI26_IOCFACTS_CAPABILITY_ATOMIC_REQ) 500319436Sslm sc->atomic_desc_capable = TRUE; 501265236Sken 502265236Sken /* 503265236Sken * Size the queues. Since the reply queues always need one free 504265236Sken * entry, we'll just deduct one reply message here. 505265236Sken */ 506265236Sken sc->num_reqs = MIN(MPR_REQ_FRAMES, sc->facts->RequestCredit); 507265236Sken sc->num_replies = MIN(MPR_REPLY_FRAMES + MPR_EVT_REPLY_FRAMES, 508265236Sken sc->facts->MaxReplyDescriptorPostQueueDepth) - 1; 509265236Sken 510265236Sken /* 511265236Sken * Initialize all Tail Queues 512265236Sken */ 513265236Sken TAILQ_INIT(&sc->req_list); 514265236Sken TAILQ_INIT(&sc->high_priority_req_list); 515265236Sken TAILQ_INIT(&sc->chain_list); 516319436Sslm TAILQ_INIT(&sc->prp_page_list); 517265236Sken TAILQ_INIT(&sc->tm_list); 518265236Sken } 519265236Sken 520265236Sken /* 521265236Sken * If doing a Diag Reset and the FW is significantly different 522265236Sken * (reallocating will be set above in IOC Facts comparison), then all 523265236Sken * buffers based on the IOC Facts will need to be freed before they are 524265236Sken * reallocated. 525265236Sken */ 526265236Sken if (reallocating) { 527265236Sken mpr_iocfacts_free(sc); 528319445Sslm mprsas_realloc_targets(sc, saved_facts.MaxTargets + 529319445Sslm saved_facts.MaxVolumes); 530265236Sken } 531265236Sken 532265236Sken /* 533265236Sken * Any deallocation has been completed. Now start reallocating 534265236Sken * if needed. Will only need to reallocate if attaching or if the new 535265236Sken * IOC Facts are different from the previous IOC Facts after a Diag 536265236Sken * Reset. Targets have already been allocated above if needed. 537265236Sken */ 538265236Sken if (attaching || reallocating) { 539265236Sken if (((error = mpr_alloc_queues(sc)) != 0) || 540265236Sken ((error = mpr_alloc_replies(sc)) != 0) || 541265236Sken ((error = mpr_alloc_requests(sc)) != 0)) { 542265236Sken if (attaching ) { 543265236Sken mpr_dprint(sc, MPR_FAULT, "%s failed to alloc " 544265236Sken "queues with error %d\n", __func__, error); 545265236Sken mpr_free(sc); 546265236Sken return (error); 547265236Sken } else { 548265236Sken panic("%s failed to alloc queues with error " 549265236Sken "%d\n", __func__, error); 550265236Sken } 551265236Sken } 552265236Sken } 553265236Sken 554265236Sken /* Always initialize the queues */ 555265236Sken bzero(sc->free_queue, sc->fqdepth * 4); 556265236Sken mpr_init_queues(sc); 557265236Sken 558265236Sken /* 559265236Sken * Always get the chip out of the reset state, but only panic if not 560265236Sken * attaching. If attaching and there is an error, that is handled by 561265236Sken * the OS. 562265236Sken */ 563265236Sken error = mpr_transition_operational(sc); 564265236Sken if (error != 0) { 565265236Sken if (attaching) { 566299962Sslm mpr_printf(sc, "%s failed to transition to operational " 567299962Sslm "with error %d\n", __func__, error); 568265236Sken mpr_free(sc); 569265236Sken return (error); 570265236Sken } else { 571265236Sken panic("%s failed to transition to operational with " 572265236Sken "error %d\n", __func__, error); 573265236Sken } 574265236Sken } 575265236Sken 576265236Sken /* 577265236Sken * Finish the queue initialization. 578265236Sken * These are set here instead of in mpr_init_queues() because the 579265236Sken * IOC resets these values during the state transition in 580265236Sken * mpr_transition_operational(). The free index is set to 1 581265236Sken * because the corresponding index in the IOC is set to 0, and the 582265236Sken * IOC treats the queues as full if both are set to the same value. 583265236Sken * Hence the reason that the queue can't hold all of the possible 584265236Sken * replies. 585265236Sken */ 586265236Sken sc->replypostindex = 0; 587265236Sken mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 588265236Sken mpr_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0); 589265236Sken 590265236Sken /* 591265236Sken * Attach the subsystems so they can prepare their event masks. 592265236Sken */ 593265236Sken /* XXX Should be dynamic so that IM/IR and user modules can attach */ 594265236Sken if (attaching) { 595265236Sken if (((error = mpr_attach_log(sc)) != 0) || 596265236Sken ((error = mpr_attach_sas(sc)) != 0) || 597265236Sken ((error = mpr_attach_user(sc)) != 0)) { 598265236Sken mpr_printf(sc, "%s failed to attach all subsystems: " 599265236Sken "error %d\n", __func__, error); 600265236Sken mpr_free(sc); 601265236Sken return (error); 602265236Sken } 603265236Sken 604265236Sken if ((error = mpr_pci_setup_interrupts(sc)) != 0) { 605265236Sken mpr_printf(sc, "%s failed to setup interrupts\n", 606265236Sken __func__); 607265236Sken mpr_free(sc); 608265236Sken return (error); 609265236Sken } 610265236Sken } 611265236Sken 612265236Sken return (error); 613265236Sken} 614265236Sken 615265236Sken/* 616265236Sken * This is called if memory is being free (during detach for example) and when 617265236Sken * buffers need to be reallocated due to a Diag Reset. 618265236Sken */ 619265236Skenstatic void 620265236Skenmpr_iocfacts_free(struct mpr_softc *sc) 621265236Sken{ 622265236Sken struct mpr_command *cm; 623265236Sken int i; 624265236Sken 625265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 626265236Sken 627265236Sken if (sc->free_busaddr != 0) 628265236Sken bus_dmamap_unload(sc->queues_dmat, sc->queues_map); 629265236Sken if (sc->free_queue != NULL) 630265236Sken bus_dmamem_free(sc->queues_dmat, sc->free_queue, 631265236Sken sc->queues_map); 632265236Sken if (sc->queues_dmat != NULL) 633265236Sken bus_dma_tag_destroy(sc->queues_dmat); 634265236Sken 635265236Sken if (sc->chain_busaddr != 0) 636265236Sken bus_dmamap_unload(sc->chain_dmat, sc->chain_map); 637265236Sken if (sc->chain_frames != NULL) 638265236Sken bus_dmamem_free(sc->chain_dmat, sc->chain_frames, 639265236Sken sc->chain_map); 640265236Sken if (sc->chain_dmat != NULL) 641265236Sken bus_dma_tag_destroy(sc->chain_dmat); 642265236Sken 643265236Sken if (sc->sense_busaddr != 0) 644265236Sken bus_dmamap_unload(sc->sense_dmat, sc->sense_map); 645265236Sken if (sc->sense_frames != NULL) 646265236Sken bus_dmamem_free(sc->sense_dmat, sc->sense_frames, 647265236Sken sc->sense_map); 648265236Sken if (sc->sense_dmat != NULL) 649265236Sken bus_dma_tag_destroy(sc->sense_dmat); 650265236Sken 651319436Sslm if (sc->prp_page_busaddr != 0) 652319436Sslm bus_dmamap_unload(sc->prp_page_dmat, sc->prp_page_map); 653319436Sslm if (sc->prp_pages != NULL) 654319436Sslm bus_dmamem_free(sc->prp_page_dmat, sc->prp_pages, 655319436Sslm sc->prp_page_map); 656319436Sslm if (sc->prp_page_dmat != NULL) 657319436Sslm bus_dma_tag_destroy(sc->prp_page_dmat); 658319436Sslm 659265236Sken if (sc->reply_busaddr != 0) 660265236Sken bus_dmamap_unload(sc->reply_dmat, sc->reply_map); 661265236Sken if (sc->reply_frames != NULL) 662265236Sken bus_dmamem_free(sc->reply_dmat, sc->reply_frames, 663265236Sken sc->reply_map); 664265236Sken if (sc->reply_dmat != NULL) 665265236Sken bus_dma_tag_destroy(sc->reply_dmat); 666265236Sken 667265236Sken if (sc->req_busaddr != 0) 668265236Sken bus_dmamap_unload(sc->req_dmat, sc->req_map); 669265236Sken if (sc->req_frames != NULL) 670265236Sken bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map); 671265236Sken if (sc->req_dmat != NULL) 672265236Sken bus_dma_tag_destroy(sc->req_dmat); 673265236Sken 674265236Sken if (sc->chains != NULL) 675265236Sken free(sc->chains, M_MPR); 676319436Sslm if (sc->prps != NULL) 677319436Sslm free(sc->prps, M_MPR); 678265236Sken if (sc->commands != NULL) { 679265236Sken for (i = 1; i < sc->num_reqs; i++) { 680265236Sken cm = &sc->commands[i]; 681265236Sken bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap); 682265236Sken } 683265236Sken free(sc->commands, M_MPR); 684265236Sken } 685265236Sken if (sc->buffer_dmat != NULL) 686265236Sken bus_dma_tag_destroy(sc->buffer_dmat); 687265236Sken} 688265236Sken 689265236Sken/* 690265236Sken * The terms diag reset and hard reset are used interchangeably in the MPI 691265236Sken * docs to mean resetting the controller chip. In this code diag reset 692265236Sken * cleans everything up, and the hard reset function just sends the reset 693265236Sken * sequence to the chip. This should probably be refactored so that every 694265236Sken * subsystem gets a reset notification of some sort, and can clean up 695265236Sken * appropriately. 696265236Sken */ 697265236Skenint 698265236Skenmpr_reinit(struct mpr_softc *sc) 699265236Sken{ 700265236Sken int error; 701265236Sken struct mprsas_softc *sassc; 702265236Sken 703265236Sken sassc = sc->sassc; 704265236Sken 705265236Sken MPR_FUNCTRACE(sc); 706265236Sken 707265236Sken mtx_assert(&sc->mpr_mtx, MA_OWNED); 708265236Sken 709265236Sken if (sc->mpr_flags & MPR_FLAGS_DIAGRESET) { 710265236Sken mpr_dprint(sc, MPR_INIT, "%s reset already in progress\n", 711299962Sslm __func__); 712265236Sken return 0; 713265236Sken } 714265236Sken 715265236Sken mpr_dprint(sc, MPR_INFO, "Reinitializing controller,\n"); 716265236Sken /* make sure the completion callbacks can recognize they're getting 717265236Sken * a NULL cm_reply due to a reset. 718265236Sken */ 719265236Sken sc->mpr_flags |= MPR_FLAGS_DIAGRESET; 720265236Sken 721265236Sken /* 722265236Sken * Mask interrupts here. 723265236Sken */ 724265236Sken mpr_dprint(sc, MPR_INIT, "%s mask interrupts\n", __func__); 725265236Sken mpr_mask_intr(sc); 726265236Sken 727265236Sken error = mpr_diag_reset(sc, CAN_SLEEP); 728265236Sken if (error != 0) { 729265236Sken panic("%s hard reset failed with error %d\n", __func__, error); 730265236Sken } 731265236Sken 732265236Sken /* Restore the PCI state, including the MSI-X registers */ 733265236Sken mpr_pci_restore(sc); 734265236Sken 735265236Sken /* Give the I/O subsystem special priority to get itself prepared */ 736265236Sken mprsas_handle_reinit(sc); 737265236Sken 738265236Sken /* 739265236Sken * Get IOC Facts and allocate all structures based on this information. 740265236Sken * The attach function will also call mpr_iocfacts_allocate at startup. 741265236Sken * If relevant values have changed in IOC Facts, this function will free 742265236Sken * all of the memory based on IOC Facts and reallocate that memory. 743265236Sken */ 744265236Sken if ((error = mpr_iocfacts_allocate(sc, FALSE)) != 0) { 745265236Sken panic("%s IOC Facts based allocation failed with error %d\n", 746265236Sken __func__, error); 747265236Sken } 748265236Sken 749265236Sken /* 750265236Sken * Mapping structures will be re-allocated after getting IOC Page8, so 751265236Sken * free these structures here. 752265236Sken */ 753265236Sken mpr_mapping_exit(sc); 754265236Sken 755265236Sken /* 756265236Sken * The static page function currently read is IOC Page8. Others can be 757265236Sken * added in future. It's possible that the values in IOC Page8 have 758265236Sken * changed after a Diag Reset due to user modification, so always read 759265236Sken * these. Interrupts are masked, so unmask them before getting config 760265236Sken * pages. 761265236Sken */ 762265236Sken mpr_unmask_intr(sc); 763265236Sken sc->mpr_flags &= ~MPR_FLAGS_DIAGRESET; 764265236Sken mpr_base_static_config_pages(sc); 765265236Sken 766265236Sken /* 767265236Sken * Some mapping info is based in IOC Page8 data, so re-initialize the 768265236Sken * mapping tables. 769265236Sken */ 770265236Sken mpr_mapping_initialize(sc); 771265236Sken 772265236Sken /* 773265236Sken * Restart will reload the event masks clobbered by the reset, and 774265236Sken * then enable the port. 775265236Sken */ 776265236Sken mpr_reregister_events(sc); 777265236Sken 778265236Sken /* the end of discovery will release the simq, so we're done. */ 779265236Sken mpr_dprint(sc, MPR_INFO, "%s finished sc %p post %u free %u\n", 780265236Sken __func__, sc, sc->replypostindex, sc->replyfreeindex); 781283990Sslm mprsas_release_simq_reinit(sassc); 782265236Sken 783265236Sken return 0; 784265236Sken} 785265236Sken 786265236Sken/* Wait for the chip to ACK a word that we've put into its FIFO 787265236Sken * Wait for <timeout> seconds. In single loop wait for busy loop 788265236Sken * for 500 microseconds. 789265236Sken * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds. 790265236Sken * */ 791265236Skenstatic int 792265236Skenmpr_wait_db_ack(struct mpr_softc *sc, int timeout, int sleep_flag) 793265236Sken{ 794265236Sken u32 cntdn, count; 795265236Sken u32 int_status; 796265236Sken u32 doorbell; 797265236Sken 798265236Sken count = 0; 799265236Sken cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 800265236Sken do { 801265236Sken int_status = mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 802265236Sken if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 803265236Sken mpr_dprint(sc, MPR_INIT, "%s: successful count(%d), " 804265236Sken "timeout(%d)\n", __func__, count, timeout); 805265236Sken return 0; 806265236Sken } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 807265236Sken doorbell = mpr_regread(sc, MPI2_DOORBELL_OFFSET); 808265236Sken if ((doorbell & MPI2_IOC_STATE_MASK) == 809265236Sken MPI2_IOC_STATE_FAULT) { 810265236Sken mpr_dprint(sc, MPR_FAULT, 811265236Sken "fault_state(0x%04x)!\n", doorbell); 812265236Sken return (EFAULT); 813265236Sken } 814265236Sken } else if (int_status == 0xFFFFFFFF) 815265236Sken goto out; 816265236Sken 817265236Sken /* 818265236Sken * If it can sleep, sleep for 1 milisecond, else busy loop for 819265236Sken * 0.5 milisecond 820265236Sken */ 821265236Sken if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) 822283990Sslm msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, "mprdba", 823283990Sslm hz/1000); 824265236Sken else if (sleep_flag == CAN_SLEEP) 825265236Sken pause("mprdba", hz/1000); 826265236Sken else 827265236Sken DELAY(500); 828265236Sken count++; 829265236Sken } while (--cntdn); 830265236Sken 831319436Sslmout: 832265236Sken mpr_dprint(sc, MPR_FAULT, "%s: failed due to timeout count(%d), " 833265236Sken "int_status(%x)!\n", __func__, count, int_status); 834265236Sken return (ETIMEDOUT); 835265236Sken} 836265236Sken 837265236Sken/* Wait for the chip to signal that the next word in its FIFO can be fetched */ 838265236Skenstatic int 839265236Skenmpr_wait_db_int(struct mpr_softc *sc) 840265236Sken{ 841265236Sken int retry; 842265236Sken 843265236Sken for (retry = 0; retry < MPR_DB_MAX_WAIT; retry++) { 844265236Sken if ((mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & 845265236Sken MPI2_HIS_IOC2SYS_DB_STATUS) != 0) 846265236Sken return (0); 847265236Sken DELAY(2000); 848265236Sken } 849265236Sken return (ETIMEDOUT); 850265236Sken} 851265236Sken 852265236Sken/* Step through the synchronous command state machine, i.e. "Doorbell mode" */ 853265236Skenstatic int 854265236Skenmpr_request_sync(struct mpr_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply, 855265236Sken int req_sz, int reply_sz, int timeout) 856265236Sken{ 857265236Sken uint32_t *data32; 858265236Sken uint16_t *data16; 859265236Sken int i, count, ioc_sz, residual; 860265236Sken int sleep_flags = CAN_SLEEP; 861265236Sken 862265236Sken#if __FreeBSD_version >= 1000029 863265236Sken if (curthread->td_no_sleeping) 864265236Sken#else //__FreeBSD_version < 1000029 865265236Sken if (curthread->td_pflags & TDP_NOSLEEPING) 866265236Sken#endif //__FreeBSD_version >= 1000029 867265236Sken sleep_flags = NO_SLEEP; 868265236Sken 869265236Sken /* Step 1 */ 870265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 871265236Sken 872265236Sken /* Step 2 */ 873265236Sken if (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 874265236Sken return (EBUSY); 875265236Sken 876265236Sken /* Step 3 877265236Sken * Announce that a message is coming through the doorbell. Messages 878265236Sken * are pushed at 32bit words, so round up if needed. 879265236Sken */ 880265236Sken count = (req_sz + 3) / 4; 881265236Sken mpr_regwrite(sc, MPI2_DOORBELL_OFFSET, 882265236Sken (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) | 883265236Sken (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT)); 884265236Sken 885265236Sken /* Step 4 */ 886265236Sken if (mpr_wait_db_int(sc) || 887265236Sken (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) { 888265236Sken mpr_dprint(sc, MPR_FAULT, "Doorbell failed to activate\n"); 889265236Sken return (ENXIO); 890265236Sken } 891265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 892265236Sken if (mpr_wait_db_ack(sc, 5, sleep_flags) != 0) { 893265236Sken mpr_dprint(sc, MPR_FAULT, "Doorbell handshake failed\n"); 894265236Sken return (ENXIO); 895265236Sken } 896265236Sken 897265236Sken /* Step 5 */ 898265236Sken /* Clock out the message data synchronously in 32-bit dwords*/ 899265236Sken data32 = (uint32_t *)req; 900265236Sken for (i = 0; i < count; i++) { 901265236Sken mpr_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i])); 902265236Sken if (mpr_wait_db_ack(sc, 5, sleep_flags) != 0) { 903265236Sken mpr_dprint(sc, MPR_FAULT, 904265236Sken "Timeout while writing doorbell\n"); 905265236Sken return (ENXIO); 906265236Sken } 907265236Sken } 908265236Sken 909265236Sken /* Step 6 */ 910265236Sken /* Clock in the reply in 16-bit words. The total length of the 911265236Sken * message is always in the 4th byte, so clock out the first 2 words 912265236Sken * manually, then loop the rest. 913265236Sken */ 914265236Sken data16 = (uint16_t *)reply; 915265236Sken if (mpr_wait_db_int(sc) != 0) { 916265236Sken mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell 0\n"); 917265236Sken return (ENXIO); 918265236Sken } 919265236Sken data16[0] = 920265236Sken mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 921265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 922265236Sken if (mpr_wait_db_int(sc) != 0) { 923265236Sken mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell 1\n"); 924265236Sken return (ENXIO); 925265236Sken } 926265236Sken data16[1] = 927265236Sken mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 928265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 929265236Sken 930265236Sken /* Number of 32bit words in the message */ 931265236Sken ioc_sz = reply->MsgLength; 932265236Sken 933265236Sken /* 934265236Sken * Figure out how many 16bit words to clock in without overrunning. 935265236Sken * The precision loss with dividing reply_sz can safely be 936265236Sken * ignored because the messages can only be multiples of 32bits. 937265236Sken */ 938265236Sken residual = 0; 939265236Sken count = MIN((reply_sz / 4), ioc_sz) * 2; 940265236Sken if (count < ioc_sz * 2) { 941265236Sken residual = ioc_sz * 2 - count; 942265236Sken mpr_dprint(sc, MPR_ERROR, "Driver error, throwing away %d " 943265236Sken "residual message words\n", residual); 944265236Sken } 945265236Sken 946265236Sken for (i = 2; i < count; i++) { 947265236Sken if (mpr_wait_db_int(sc) != 0) { 948265236Sken mpr_dprint(sc, MPR_FAULT, 949265236Sken "Timeout reading doorbell %d\n", i); 950265236Sken return (ENXIO); 951265236Sken } 952265236Sken data16[i] = mpr_regread(sc, MPI2_DOORBELL_OFFSET) & 953265236Sken MPI2_DOORBELL_DATA_MASK; 954265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 955265236Sken } 956265236Sken 957265236Sken /* 958265236Sken * Pull out residual words that won't fit into the provided buffer. 959265236Sken * This keeps the chip from hanging due to a driver programming 960265236Sken * error. 961265236Sken */ 962265236Sken while (residual--) { 963265236Sken if (mpr_wait_db_int(sc) != 0) { 964265236Sken mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell\n"); 965265236Sken return (ENXIO); 966265236Sken } 967265236Sken (void)mpr_regread(sc, MPI2_DOORBELL_OFFSET); 968265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 969265236Sken } 970265236Sken 971265236Sken /* Step 7 */ 972265236Sken if (mpr_wait_db_int(sc) != 0) { 973265236Sken mpr_dprint(sc, MPR_FAULT, "Timeout waiting to exit doorbell\n"); 974265236Sken return (ENXIO); 975265236Sken } 976265236Sken if (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 977265236Sken mpr_dprint(sc, MPR_FAULT, "Warning, doorbell still active\n"); 978265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 979265236Sken 980265236Sken return (0); 981265236Sken} 982265236Sken 983265236Skenstatic void 984265236Skenmpr_enqueue_request(struct mpr_softc *sc, struct mpr_command *cm) 985265236Sken{ 986319436Sslm request_descriptor rd; 987265236Sken 988265236Sken MPR_FUNCTRACE(sc); 989283990Sslm mpr_dprint(sc, MPR_TRACE, "SMID %u cm %p ccb %p\n", 990265236Sken cm->cm_desc.Default.SMID, cm, cm->cm_ccb); 991265236Sken 992265236Sken if (sc->mpr_flags & MPR_FLAGS_ATTACH_DONE && !(sc->mpr_flags & 993265236Sken MPR_FLAGS_SHUTDOWN)) 994265236Sken mtx_assert(&sc->mpr_mtx, MA_OWNED); 995265236Sken 996265236Sken if (++sc->io_cmds_active > sc->io_cmds_highwater) 997265236Sken sc->io_cmds_highwater++; 998265236Sken 999319436Sslm if (sc->atomic_desc_capable) { 1000319436Sslm rd.u.low = cm->cm_desc.Words.Low; 1001319436Sslm mpr_regwrite(sc, MPI26_ATOMIC_REQUEST_DESCRIPTOR_POST_OFFSET, 1002319436Sslm rd.u.low); 1003319436Sslm } else { 1004319436Sslm rd.u.low = cm->cm_desc.Words.Low; 1005319436Sslm rd.u.high = cm->cm_desc.Words.High; 1006319436Sslm rd.word = htole64(rd.word); 1007319436Sslm mpr_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET, 1008319436Sslm rd.u.low); 1009319436Sslm mpr_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET, 1010319436Sslm rd.u.high); 1011319436Sslm } 1012265236Sken} 1013265236Sken 1014265236Sken/* 1015265236Sken * Just the FACTS, ma'am. 1016265236Sken */ 1017265236Skenstatic int 1018265236Skenmpr_get_iocfacts(struct mpr_softc *sc, MPI2_IOC_FACTS_REPLY *facts) 1019265236Sken{ 1020265236Sken MPI2_DEFAULT_REPLY *reply; 1021265236Sken MPI2_IOC_FACTS_REQUEST request; 1022265236Sken int error, req_sz, reply_sz; 1023265236Sken 1024265236Sken MPR_FUNCTRACE(sc); 1025265236Sken 1026265236Sken req_sz = sizeof(MPI2_IOC_FACTS_REQUEST); 1027265236Sken reply_sz = sizeof(MPI2_IOC_FACTS_REPLY); 1028265236Sken reply = (MPI2_DEFAULT_REPLY *)facts; 1029265236Sken 1030265236Sken bzero(&request, req_sz); 1031265236Sken request.Function = MPI2_FUNCTION_IOC_FACTS; 1032265236Sken error = mpr_request_sync(sc, &request, reply, req_sz, reply_sz, 5); 1033265236Sken 1034265236Sken return (error); 1035265236Sken} 1036265236Sken 1037265236Skenstatic int 1038265236Skenmpr_send_iocinit(struct mpr_softc *sc) 1039265236Sken{ 1040265236Sken MPI2_IOC_INIT_REQUEST init; 1041265236Sken MPI2_DEFAULT_REPLY reply; 1042265236Sken int req_sz, reply_sz, error; 1043265236Sken struct timeval now; 1044265236Sken uint64_t time_in_msec; 1045265236Sken 1046265236Sken MPR_FUNCTRACE(sc); 1047265236Sken 1048265236Sken req_sz = sizeof(MPI2_IOC_INIT_REQUEST); 1049265236Sken reply_sz = sizeof(MPI2_IOC_INIT_REPLY); 1050265236Sken bzero(&init, req_sz); 1051265236Sken bzero(&reply, reply_sz); 1052265236Sken 1053265236Sken /* 1054265236Sken * Fill in the init block. Note that most addresses are 1055265236Sken * deliberately in the lower 32bits of memory. This is a micro- 1056265236Sken * optimzation for PCI/PCIX, though it's not clear if it helps PCIe. 1057265236Sken */ 1058265236Sken init.Function = MPI2_FUNCTION_IOC_INIT; 1059265236Sken init.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 1060265236Sken init.MsgVersion = htole16(MPI2_VERSION); 1061265236Sken init.HeaderVersion = htole16(MPI2_HEADER_VERSION); 1062265236Sken init.SystemRequestFrameSize = htole16(sc->facts->IOCRequestFrameSize); 1063265236Sken init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth); 1064265236Sken init.ReplyFreeQueueDepth = htole16(sc->fqdepth); 1065265236Sken init.SenseBufferAddressHigh = 0; 1066265236Sken init.SystemReplyAddressHigh = 0; 1067265236Sken init.SystemRequestFrameBaseAddress.High = 0; 1068265236Sken init.SystemRequestFrameBaseAddress.Low = 1069265236Sken htole32((uint32_t)sc->req_busaddr); 1070265236Sken init.ReplyDescriptorPostQueueAddress.High = 0; 1071265236Sken init.ReplyDescriptorPostQueueAddress.Low = 1072265236Sken htole32((uint32_t)sc->post_busaddr); 1073265236Sken init.ReplyFreeQueueAddress.High = 0; 1074265236Sken init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr); 1075265236Sken getmicrotime(&now); 1076265236Sken time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000); 1077265236Sken init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF); 1078265236Sken init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF); 1079319436Sslm init.HostPageSize = HOST_PAGE_SIZE_4K; 1080265236Sken 1081265236Sken error = mpr_request_sync(sc, &init, &reply, req_sz, reply_sz, 5); 1082265236Sken if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 1083265236Sken error = ENXIO; 1084265236Sken 1085265236Sken mpr_dprint(sc, MPR_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus); 1086265236Sken return (error); 1087265236Sken} 1088265236Sken 1089265236Skenvoid 1090265236Skenmpr_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1091265236Sken{ 1092265236Sken bus_addr_t *addr; 1093265236Sken 1094265236Sken addr = arg; 1095265236Sken *addr = segs[0].ds_addr; 1096265236Sken} 1097265236Sken 1098265236Skenstatic int 1099265236Skenmpr_alloc_queues(struct mpr_softc *sc) 1100265236Sken{ 1101265236Sken bus_addr_t queues_busaddr; 1102265236Sken uint8_t *queues; 1103265236Sken int qsize, fqsize, pqsize; 1104265236Sken 1105265236Sken /* 1106265236Sken * The reply free queue contains 4 byte entries in multiples of 16 and 1107265236Sken * aligned on a 16 byte boundary. There must always be an unused entry. 1108265236Sken * This queue supplies fresh reply frames for the firmware to use. 1109265236Sken * 1110265236Sken * The reply descriptor post queue contains 8 byte entries in 1111265236Sken * multiples of 16 and aligned on a 16 byte boundary. This queue 1112265236Sken * contains filled-in reply frames sent from the firmware to the host. 1113265236Sken * 1114265236Sken * These two queues are allocated together for simplicity. 1115265236Sken */ 1116265236Sken sc->fqdepth = roundup2((sc->num_replies + 1), 16); 1117265236Sken sc->pqdepth = roundup2((sc->num_replies + 1), 16); 1118265236Sken fqsize= sc->fqdepth * 4; 1119265236Sken pqsize = sc->pqdepth * 8; 1120265236Sken qsize = fqsize + pqsize; 1121265236Sken 1122265236Sken if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1123265236Sken 16, 0, /* algnmnt, boundary */ 1124265236Sken BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1125265236Sken BUS_SPACE_MAXADDR, /* highaddr */ 1126265236Sken NULL, NULL, /* filter, filterarg */ 1127265236Sken qsize, /* maxsize */ 1128265236Sken 1, /* nsegments */ 1129265236Sken qsize, /* maxsegsize */ 1130265236Sken 0, /* flags */ 1131265236Sken NULL, NULL, /* lockfunc, lockarg */ 1132265236Sken &sc->queues_dmat)) { 1133265236Sken device_printf(sc->mpr_dev, "Cannot allocate queues DMA tag\n"); 1134265236Sken return (ENOMEM); 1135265236Sken } 1136265236Sken if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT, 1137265236Sken &sc->queues_map)) { 1138265236Sken device_printf(sc->mpr_dev, "Cannot allocate queues memory\n"); 1139265236Sken return (ENOMEM); 1140265236Sken } 1141265236Sken bzero(queues, qsize); 1142265236Sken bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize, 1143265236Sken mpr_memaddr_cb, &queues_busaddr, 0); 1144265236Sken 1145265236Sken sc->free_queue = (uint32_t *)queues; 1146265236Sken sc->free_busaddr = queues_busaddr; 1147265236Sken sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize); 1148265236Sken sc->post_busaddr = queues_busaddr + fqsize; 1149265236Sken 1150265236Sken return (0); 1151265236Sken} 1152265236Sken 1153265236Skenstatic int 1154265236Skenmpr_alloc_replies(struct mpr_softc *sc) 1155265236Sken{ 1156265236Sken int rsize, num_replies; 1157265236Sken 1158265236Sken /* 1159265236Sken * sc->num_replies should be one less than sc->fqdepth. We need to 1160265236Sken * allocate space for sc->fqdepth replies, but only sc->num_replies 1161265236Sken * replies can be used at once. 1162265236Sken */ 1163265236Sken num_replies = max(sc->fqdepth, sc->num_replies); 1164265236Sken 1165265236Sken rsize = sc->facts->ReplyFrameSize * num_replies * 4; 1166265236Sken if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1167265236Sken 4, 0, /* algnmnt, boundary */ 1168265236Sken BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1169265236Sken BUS_SPACE_MAXADDR, /* highaddr */ 1170265236Sken NULL, NULL, /* filter, filterarg */ 1171265236Sken rsize, /* maxsize */ 1172265236Sken 1, /* nsegments */ 1173265236Sken rsize, /* maxsegsize */ 1174265236Sken 0, /* flags */ 1175265236Sken NULL, NULL, /* lockfunc, lockarg */ 1176265236Sken &sc->reply_dmat)) { 1177265236Sken device_printf(sc->mpr_dev, "Cannot allocate replies DMA tag\n"); 1178265236Sken return (ENOMEM); 1179265236Sken } 1180265236Sken if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames, 1181265236Sken BUS_DMA_NOWAIT, &sc->reply_map)) { 1182265236Sken device_printf(sc->mpr_dev, "Cannot allocate replies memory\n"); 1183265236Sken return (ENOMEM); 1184265236Sken } 1185265236Sken bzero(sc->reply_frames, rsize); 1186265236Sken bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize, 1187265236Sken mpr_memaddr_cb, &sc->reply_busaddr, 0); 1188265236Sken 1189265236Sken return (0); 1190265236Sken} 1191265236Sken 1192265236Skenstatic int 1193265236Skenmpr_alloc_requests(struct mpr_softc *sc) 1194265236Sken{ 1195265236Sken struct mpr_command *cm; 1196265236Sken struct mpr_chain *chain; 1197265236Sken int i, rsize, nsegs; 1198265236Sken 1199265236Sken rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4; 1200265236Sken if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1201265236Sken 16, 0, /* algnmnt, boundary */ 1202265236Sken BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1203265236Sken BUS_SPACE_MAXADDR, /* highaddr */ 1204265236Sken NULL, NULL, /* filter, filterarg */ 1205265236Sken rsize, /* maxsize */ 1206265236Sken 1, /* nsegments */ 1207265236Sken rsize, /* maxsegsize */ 1208265236Sken 0, /* flags */ 1209265236Sken NULL, NULL, /* lockfunc, lockarg */ 1210265236Sken &sc->req_dmat)) { 1211265236Sken device_printf(sc->mpr_dev, "Cannot allocate request DMA tag\n"); 1212265236Sken return (ENOMEM); 1213265236Sken } 1214265236Sken if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames, 1215265236Sken BUS_DMA_NOWAIT, &sc->req_map)) { 1216265236Sken device_printf(sc->mpr_dev, "Cannot allocate request memory\n"); 1217265236Sken return (ENOMEM); 1218265236Sken } 1219265236Sken bzero(sc->req_frames, rsize); 1220265236Sken bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize, 1221265236Sken mpr_memaddr_cb, &sc->req_busaddr, 0); 1222265236Sken 1223299962Sslm /* 1224299962Sslm * Gen3 and beyond uses the IOCMaxChainSegmentSize from IOC Facts to 1225299962Sslm * get the size of a Chain Frame. Previous versions use the size as a 1226299962Sslm * Request Frame for the Chain Frame size. If IOCMaxChainSegmentSize 1227299962Sslm * is 0, use the default value. The IOCMaxChainSegmentSize is the 1228299962Sslm * number of 16-byte elelements that can fit in a Chain Frame, which is 1229299962Sslm * the size of an IEEE Simple SGE. 1230299962Sslm */ 1231299962Sslm if (sc->facts->MsgVersion >= MPI2_VERSION_02_05) { 1232299962Sslm sc->chain_seg_size = 1233299962Sslm htole16(sc->facts->IOCMaxChainSegmentSize); 1234299962Sslm if (sc->chain_seg_size == 0) { 1235299962Sslm sc->chain_frame_size = MPR_DEFAULT_CHAIN_SEG_SIZE * 1236299962Sslm MPR_MAX_CHAIN_ELEMENT_SIZE; 1237299962Sslm } else { 1238299962Sslm sc->chain_frame_size = sc->chain_seg_size * 1239299962Sslm MPR_MAX_CHAIN_ELEMENT_SIZE; 1240299962Sslm } 1241299962Sslm } else { 1242299962Sslm sc->chain_frame_size = sc->facts->IOCRequestFrameSize * 4; 1243299962Sslm } 1244299962Sslm rsize = sc->chain_frame_size * sc->max_chains; 1245265236Sken if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1246265236Sken 16, 0, /* algnmnt, boundary */ 1247265236Sken BUS_SPACE_MAXADDR, /* lowaddr */ 1248265236Sken BUS_SPACE_MAXADDR, /* highaddr */ 1249265236Sken NULL, NULL, /* filter, filterarg */ 1250265236Sken rsize, /* maxsize */ 1251265236Sken 1, /* nsegments */ 1252265236Sken rsize, /* maxsegsize */ 1253265236Sken 0, /* flags */ 1254265236Sken NULL, NULL, /* lockfunc, lockarg */ 1255265236Sken &sc->chain_dmat)) { 1256265236Sken device_printf(sc->mpr_dev, "Cannot allocate chain DMA tag\n"); 1257265236Sken return (ENOMEM); 1258265236Sken } 1259265236Sken if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames, 1260265236Sken BUS_DMA_NOWAIT, &sc->chain_map)) { 1261265236Sken device_printf(sc->mpr_dev, "Cannot allocate chain memory\n"); 1262265236Sken return (ENOMEM); 1263265236Sken } 1264265236Sken bzero(sc->chain_frames, rsize); 1265265236Sken bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize, 1266265236Sken mpr_memaddr_cb, &sc->chain_busaddr, 0); 1267265236Sken 1268265236Sken rsize = MPR_SENSE_LEN * sc->num_reqs; 1269265236Sken if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1270265236Sken 1, 0, /* algnmnt, boundary */ 1271265236Sken BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1272265236Sken BUS_SPACE_MAXADDR, /* highaddr */ 1273265236Sken NULL, NULL, /* filter, filterarg */ 1274265236Sken rsize, /* maxsize */ 1275265236Sken 1, /* nsegments */ 1276265236Sken rsize, /* maxsegsize */ 1277265236Sken 0, /* flags */ 1278265236Sken NULL, NULL, /* lockfunc, lockarg */ 1279265236Sken &sc->sense_dmat)) { 1280265236Sken device_printf(sc->mpr_dev, "Cannot allocate sense DMA tag\n"); 1281265236Sken return (ENOMEM); 1282265236Sken } 1283265236Sken if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames, 1284265236Sken BUS_DMA_NOWAIT, &sc->sense_map)) { 1285265236Sken device_printf(sc->mpr_dev, "Cannot allocate sense memory\n"); 1286265236Sken return (ENOMEM); 1287265236Sken } 1288265236Sken bzero(sc->sense_frames, rsize); 1289265236Sken bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize, 1290265236Sken mpr_memaddr_cb, &sc->sense_busaddr, 0); 1291265236Sken 1292265236Sken sc->chains = malloc(sizeof(struct mpr_chain) * sc->max_chains, M_MPR, 1293265236Sken M_WAITOK | M_ZERO); 1294265236Sken if (!sc->chains) { 1295265236Sken device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n", 1296265236Sken __func__, __LINE__); 1297265236Sken return (ENOMEM); 1298265236Sken } 1299265236Sken for (i = 0; i < sc->max_chains; i++) { 1300265236Sken chain = &sc->chains[i]; 1301265236Sken chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames + 1302299962Sslm i * sc->chain_frame_size); 1303265236Sken chain->chain_busaddr = sc->chain_busaddr + 1304299962Sslm i * sc->chain_frame_size; 1305265236Sken mpr_free_chain(sc, chain); 1306265236Sken sc->chain_free_lowwater++; 1307265236Sken } 1308265236Sken 1309319436Sslm /* 1310319436Sslm * Allocate NVMe PRP Pages for NVMe SGL support only if the FW supports 1311319436Sslm * these devices. 1312319436Sslm */ 1313319436Sslm if ((sc->facts->MsgVersion >= MPI2_VERSION_02_06) && 1314319436Sslm (sc->facts->ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_NVME_DEVICES)) { 1315319436Sslm if (mpr_alloc_nvme_prp_pages(sc) == ENOMEM) 1316319436Sslm return (ENOMEM); 1317319436Sslm } 1318319436Sslm 1319265236Sken /* XXX Need to pick a more precise value */ 1320265236Sken nsegs = (MAXPHYS / PAGE_SIZE) + 1; 1321265236Sken if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1322265236Sken 1, 0, /* algnmnt, boundary */ 1323265236Sken BUS_SPACE_MAXADDR, /* lowaddr */ 1324265236Sken BUS_SPACE_MAXADDR, /* highaddr */ 1325265236Sken NULL, NULL, /* filter, filterarg */ 1326265236Sken BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 1327265236Sken nsegs, /* nsegments */ 1328265236Sken BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 1329265236Sken BUS_DMA_ALLOCNOW, /* flags */ 1330265236Sken busdma_lock_mutex, /* lockfunc */ 1331265236Sken &sc->mpr_mtx, /* lockarg */ 1332265236Sken &sc->buffer_dmat)) { 1333265236Sken device_printf(sc->mpr_dev, "Cannot allocate buffer DMA tag\n"); 1334265236Sken return (ENOMEM); 1335265236Sken } 1336265236Sken 1337265236Sken /* 1338265236Sken * SMID 0 cannot be used as a free command per the firmware spec. 1339265236Sken * Just drop that command instead of risking accounting bugs. 1340265236Sken */ 1341265236Sken sc->commands = malloc(sizeof(struct mpr_command) * sc->num_reqs, 1342265236Sken M_MPR, M_WAITOK | M_ZERO); 1343265236Sken if (!sc->commands) { 1344265236Sken device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n", 1345265236Sken __func__, __LINE__); 1346265236Sken return (ENOMEM); 1347265236Sken } 1348265236Sken for (i = 1; i < sc->num_reqs; i++) { 1349265236Sken cm = &sc->commands[i]; 1350265236Sken cm->cm_req = sc->req_frames + 1351265236Sken i * sc->facts->IOCRequestFrameSize * 4; 1352265236Sken cm->cm_req_busaddr = sc->req_busaddr + 1353265236Sken i * sc->facts->IOCRequestFrameSize * 4; 1354265236Sken cm->cm_sense = &sc->sense_frames[i]; 1355265236Sken cm->cm_sense_busaddr = sc->sense_busaddr + i * MPR_SENSE_LEN; 1356265236Sken cm->cm_desc.Default.SMID = i; 1357265236Sken cm->cm_sc = sc; 1358265236Sken TAILQ_INIT(&cm->cm_chain_list); 1359319436Sslm TAILQ_INIT(&cm->cm_prp_page_list); 1360265236Sken callout_init_mtx(&cm->cm_callout, &sc->mpr_mtx, 0); 1361265236Sken 1362265236Sken /* XXX Is a failure here a critical problem? */ 1363319436Sslm if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) 1364319436Sslm == 0) { 1365265236Sken if (i <= sc->facts->HighPriorityCredit) 1366265236Sken mpr_free_high_priority_command(sc, cm); 1367265236Sken else 1368265236Sken mpr_free_command(sc, cm); 1369319436Sslm } else { 1370265236Sken panic("failed to allocate command %d\n", i); 1371265236Sken sc->num_reqs = i; 1372265236Sken break; 1373265236Sken } 1374265236Sken } 1375265236Sken 1376265236Sken return (0); 1377265236Sken} 1378265236Sken 1379319436Sslm/* 1380319436Sslm * Allocate contiguous buffers for PCIe NVMe devices for building native PRPs, 1381319436Sslm * which are scatter/gather lists for NVMe devices. 1382319436Sslm * 1383319436Sslm * This buffer must be contiguous due to the nature of how NVMe PRPs are built 1384319436Sslm * and translated by FW. 1385319436Sslm * 1386319436Sslm * returns ENOMEM if memory could not be allocated, otherwise returns 0. 1387319436Sslm */ 1388265236Skenstatic int 1389319436Sslmmpr_alloc_nvme_prp_pages(struct mpr_softc *sc) 1390319436Sslm{ 1391319436Sslm int PRPs_per_page, PRPs_required, pages_required; 1392319436Sslm int rsize, i; 1393319436Sslm struct mpr_prp_page *prp_page; 1394319436Sslm 1395319436Sslm /* 1396319436Sslm * Assuming a MAX_IO_SIZE of 1MB and a PAGE_SIZE of 4k, the max number 1397319436Sslm * of PRPs (NVMe's Scatter/Gather Element) needed per I/O is: 1398319436Sslm * MAX_IO_SIZE / PAGE_SIZE = 256 1399319436Sslm * 1400319436Sslm * 1 PRP entry in main frame for PRP list pointer still leaves 255 PRPs 1401319436Sslm * required for the remainder of the 1MB I/O. 512 PRPs can fit into one 1402319436Sslm * page (4096 / 8 = 512), so only one page is required for each I/O. 1403319436Sslm * 1404319436Sslm * Each of these buffers will need to be contiguous. For simplicity, 1405319436Sslm * only one buffer is allocated here, which has all of the space 1406319436Sslm * required for the NVMe Queue Depth. If there are problems allocating 1407319436Sslm * this one buffer, this function will need to change to allocate 1408319436Sslm * individual, contiguous NVME_QDEPTH buffers. 1409319436Sslm * 1410319436Sslm * The real calculation will use the real max io size. Above is just an 1411319436Sslm * example. 1412319436Sslm * 1413319436Sslm */ 1414319436Sslm PRPs_required = sc->maxio / PAGE_SIZE; 1415319436Sslm PRPs_per_page = (PAGE_SIZE / PRP_ENTRY_SIZE) - 1; 1416319436Sslm pages_required = (PRPs_required / PRPs_per_page) + 1; 1417319436Sslm 1418319436Sslm sc->prp_buffer_size = PAGE_SIZE * pages_required; 1419319436Sslm rsize = sc->prp_buffer_size * NVME_QDEPTH; 1420319436Sslm if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1421319436Sslm 4, 0, /* algnmnt, boundary */ 1422319436Sslm BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1423319436Sslm BUS_SPACE_MAXADDR, /* highaddr */ 1424319436Sslm NULL, NULL, /* filter, filterarg */ 1425319436Sslm rsize, /* maxsize */ 1426319436Sslm 1, /* nsegments */ 1427319436Sslm rsize, /* maxsegsize */ 1428319436Sslm 0, /* flags */ 1429319436Sslm NULL, NULL, /* lockfunc, lockarg */ 1430319436Sslm &sc->prp_page_dmat)) { 1431319436Sslm device_printf(sc->mpr_dev, "Cannot allocate NVMe PRP DMA " 1432319436Sslm "tag\n"); 1433319436Sslm return (ENOMEM); 1434319436Sslm } 1435319436Sslm if (bus_dmamem_alloc(sc->prp_page_dmat, (void **)&sc->prp_pages, 1436319436Sslm BUS_DMA_NOWAIT, &sc->prp_page_map)) { 1437319436Sslm device_printf(sc->mpr_dev, "Cannot allocate NVMe PRP memory\n"); 1438319436Sslm return (ENOMEM); 1439319436Sslm } 1440319436Sslm bzero(sc->prp_pages, rsize); 1441319436Sslm bus_dmamap_load(sc->prp_page_dmat, sc->prp_page_map, sc->prp_pages, 1442319436Sslm rsize, mpr_memaddr_cb, &sc->prp_page_busaddr, 0); 1443319436Sslm 1444319436Sslm sc->prps = malloc(sizeof(struct mpr_prp_page) * NVME_QDEPTH, M_MPR, 1445319436Sslm M_WAITOK | M_ZERO); 1446319436Sslm for (i = 0; i < NVME_QDEPTH; i++) { 1447319436Sslm prp_page = &sc->prps[i]; 1448319436Sslm prp_page->prp_page = (uint64_t *)(sc->prp_pages + 1449319436Sslm i * sc->prp_buffer_size); 1450319436Sslm prp_page->prp_page_busaddr = (uint64_t)(sc->prp_page_busaddr + 1451319436Sslm i * sc->prp_buffer_size); 1452319436Sslm mpr_free_prp_page(sc, prp_page); 1453319436Sslm sc->prp_pages_free_lowwater++; 1454319436Sslm } 1455319436Sslm 1456319436Sslm return (0); 1457319436Sslm} 1458319436Sslm 1459319436Sslmstatic int 1460265236Skenmpr_init_queues(struct mpr_softc *sc) 1461265236Sken{ 1462265236Sken int i; 1463265236Sken 1464265236Sken memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8); 1465265236Sken 1466265236Sken /* 1467265236Sken * According to the spec, we need to use one less reply than we 1468265236Sken * have space for on the queue. So sc->num_replies (the number we 1469265236Sken * use) should be less than sc->fqdepth (allocated size). 1470265236Sken */ 1471265236Sken if (sc->num_replies >= sc->fqdepth) 1472265236Sken return (EINVAL); 1473265236Sken 1474265236Sken /* 1475265236Sken * Initialize all of the free queue entries. 1476265236Sken */ 1477319436Sslm for (i = 0; i < sc->fqdepth; i++) { 1478319436Sslm sc->free_queue[i] = sc->reply_busaddr + 1479319436Sslm (i * sc->facts->ReplyFrameSize * 4); 1480319436Sslm } 1481265236Sken sc->replyfreeindex = sc->num_replies; 1482265236Sken 1483265236Sken return (0); 1484265236Sken} 1485265236Sken 1486265236Sken/* Get the driver parameter tunables. Lowest priority are the driver defaults. 1487265236Sken * Next are the global settings, if they exist. Highest are the per-unit 1488265236Sken * settings, if they exist. 1489265236Sken */ 1490322661Skenvoid 1491265236Skenmpr_get_tunables(struct mpr_softc *sc) 1492265236Sken{ 1493265236Sken char tmpstr[80]; 1494265236Sken 1495265236Sken /* XXX default to some debugging for now */ 1496265236Sken sc->mpr_debug = MPR_INFO | MPR_FAULT; 1497265236Sken sc->disable_msix = 0; 1498265236Sken sc->disable_msi = 0; 1499265236Sken sc->max_chains = MPR_CHAIN_FRAMES; 1500303089Sslm sc->max_io_pages = MPR_MAXIO_PAGES; 1501283990Sslm sc->enable_ssu = MPR_SSU_ENABLE_SSD_DISABLE_HDD; 1502283990Sslm sc->spinup_wait_time = DEFAULT_SPINUP_WAIT; 1503319436Sslm sc->use_phynum = 1; 1504265236Sken 1505265236Sken /* 1506265236Sken * Grab the global variables. 1507265236Sken */ 1508265236Sken TUNABLE_INT_FETCH("hw.mpr.debug_level", &sc->mpr_debug); 1509265236Sken TUNABLE_INT_FETCH("hw.mpr.disable_msix", &sc->disable_msix); 1510265236Sken TUNABLE_INT_FETCH("hw.mpr.disable_msi", &sc->disable_msi); 1511265236Sken TUNABLE_INT_FETCH("hw.mpr.max_chains", &sc->max_chains); 1512303089Sslm TUNABLE_INT_FETCH("hw.mpr.max_io_pages", &sc->max_io_pages); 1513283990Sslm TUNABLE_INT_FETCH("hw.mpr.enable_ssu", &sc->enable_ssu); 1514283990Sslm TUNABLE_INT_FETCH("hw.mpr.spinup_wait_time", &sc->spinup_wait_time); 1515319436Sslm TUNABLE_INT_FETCH("hw.mpr.use_phy_num", &sc->use_phynum); 1516265236Sken 1517265236Sken /* Grab the unit-instance variables */ 1518265236Sken snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.debug_level", 1519265236Sken device_get_unit(sc->mpr_dev)); 1520265236Sken TUNABLE_INT_FETCH(tmpstr, &sc->mpr_debug); 1521265236Sken 1522265236Sken snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.disable_msix", 1523265236Sken device_get_unit(sc->mpr_dev)); 1524265236Sken TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix); 1525265236Sken 1526265236Sken snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.disable_msi", 1527265236Sken device_get_unit(sc->mpr_dev)); 1528265236Sken TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi); 1529265236Sken 1530265236Sken snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.max_chains", 1531265236Sken device_get_unit(sc->mpr_dev)); 1532265236Sken TUNABLE_INT_FETCH(tmpstr, &sc->max_chains); 1533265236Sken 1534303089Sslm snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.max_io_pages", 1535303089Sslm device_get_unit(sc->mpr_dev)); 1536303089Sslm TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages); 1537303089Sslm 1538265236Sken bzero(sc->exclude_ids, sizeof(sc->exclude_ids)); 1539265236Sken snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.exclude_ids", 1540265236Sken device_get_unit(sc->mpr_dev)); 1541265236Sken TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids)); 1542283990Sslm 1543283990Sslm snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.enable_ssu", 1544283990Sslm device_get_unit(sc->mpr_dev)); 1545283990Sslm TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu); 1546283990Sslm 1547283990Sslm snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.spinup_wait_time", 1548283990Sslm device_get_unit(sc->mpr_dev)); 1549283990Sslm TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time); 1550319436Sslm 1551319436Sslm snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.use_phy_num", 1552319436Sslm device_get_unit(sc->mpr_dev)); 1553319436Sslm TUNABLE_INT_FETCH(tmpstr, &sc->use_phynum); 1554265236Sken} 1555265236Sken 1556265236Skenstatic void 1557265236Skenmpr_setup_sysctl(struct mpr_softc *sc) 1558265236Sken{ 1559265236Sken struct sysctl_ctx_list *sysctl_ctx = NULL; 1560265236Sken struct sysctl_oid *sysctl_tree = NULL; 1561265236Sken char tmpstr[80], tmpstr2[80]; 1562265236Sken 1563265236Sken /* 1564265236Sken * Setup the sysctl variable so the user can change the debug level 1565265236Sken * on the fly. 1566265236Sken */ 1567265236Sken snprintf(tmpstr, sizeof(tmpstr), "MPR controller %d", 1568265236Sken device_get_unit(sc->mpr_dev)); 1569265236Sken snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mpr_dev)); 1570265236Sken 1571265236Sken sysctl_ctx = device_get_sysctl_ctx(sc->mpr_dev); 1572265236Sken if (sysctl_ctx != NULL) 1573265236Sken sysctl_tree = device_get_sysctl_tree(sc->mpr_dev); 1574265236Sken 1575265236Sken if (sysctl_tree == NULL) { 1576265236Sken sysctl_ctx_init(&sc->sysctl_ctx); 1577265236Sken sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 1578265236Sken SYSCTL_STATIC_CHILDREN(_hw_mpr), OID_AUTO, tmpstr2, 1579265236Sken CTLFLAG_RD, 0, tmpstr); 1580265236Sken if (sc->sysctl_tree == NULL) 1581265236Sken return; 1582265236Sken sysctl_ctx = &sc->sysctl_ctx; 1583265236Sken sysctl_tree = sc->sysctl_tree; 1584265236Sken } 1585265236Sken 1586265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1587265236Sken OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mpr_debug, 0, 1588265236Sken "mpr debug level"); 1589265236Sken 1590265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1591265236Sken OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0, 1592265236Sken "Disable the use of MSI-X interrupts"); 1593265236Sken 1594265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1595265236Sken OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0, 1596265236Sken "Disable the use of MSI interrupts"); 1597265236Sken 1598265236Sken SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1599273736Shselasky OID_AUTO, "firmware_version", CTLFLAG_RW, sc->fw_version, 1600265236Sken strlen(sc->fw_version), "firmware version"); 1601265236Sken 1602265236Sken SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1603265236Sken OID_AUTO, "driver_version", CTLFLAG_RW, MPR_DRIVER_VERSION, 1604265236Sken strlen(MPR_DRIVER_VERSION), "driver version"); 1605265236Sken 1606265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1607265236Sken OID_AUTO, "io_cmds_active", CTLFLAG_RD, 1608265236Sken &sc->io_cmds_active, 0, "number of currently active commands"); 1609265236Sken 1610265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1611265236Sken OID_AUTO, "io_cmds_highwater", CTLFLAG_RD, 1612265236Sken &sc->io_cmds_highwater, 0, "maximum active commands seen"); 1613265236Sken 1614265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1615265236Sken OID_AUTO, "chain_free", CTLFLAG_RD, 1616265236Sken &sc->chain_free, 0, "number of free chain elements"); 1617265236Sken 1618265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1619265236Sken OID_AUTO, "chain_free_lowwater", CTLFLAG_RD, 1620265236Sken &sc->chain_free_lowwater, 0,"lowest number of free chain elements"); 1621265236Sken 1622265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1623265236Sken OID_AUTO, "max_chains", CTLFLAG_RD, 1624265236Sken &sc->max_chains, 0,"maximum chain frames that will be allocated"); 1625265236Sken 1626283990Sslm SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1627303089Sslm OID_AUTO, "max_io_pages", CTLFLAG_RD, 1628303089Sslm &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use " 1629303089Sslm "IOCFacts)"); 1630303089Sslm 1631303089Sslm SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1632283990Sslm OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0, 1633283990Sslm "enable SSU to SATA SSD/HDD at shutdown"); 1634283990Sslm 1635265236Sken SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1636265236Sken OID_AUTO, "chain_alloc_fail", CTLFLAG_RD, 1637265236Sken &sc->chain_alloc_fail, "chain allocation failures"); 1638283990Sslm 1639283990Sslm SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1640283990Sslm OID_AUTO, "spinup_wait_time", CTLFLAG_RD, 1641283990Sslm &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for " 1642283990Sslm "spinup after SATA ID error"); 1643319436Sslm 1644319436Sslm SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1645319436Sslm OID_AUTO, "use_phy_num", CTLFLAG_RD, &sc->use_phynum, 0, 1646319436Sslm "Use the phy number for enumeration"); 1647319436Sslm 1648319436Sslm SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1649319436Sslm OID_AUTO, "prp_pages_free", CTLFLAG_RD, 1650319436Sslm &sc->prp_pages_free, 0, "number of free PRP pages"); 1651319436Sslm 1652319436Sslm SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1653319436Sslm OID_AUTO, "prp_pages_free_lowwater", CTLFLAG_RD, 1654319436Sslm &sc->prp_pages_free_lowwater, 0,"lowest number of free PRP pages"); 1655319436Sslm 1656319436Sslm SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1657319436Sslm OID_AUTO, "prp_page_alloc_fail", CTLFLAG_RD, 1658319436Sslm &sc->prp_page_alloc_fail, "PRP page allocation failures"); 1659265236Sken} 1660265236Sken 1661265236Skenint 1662265236Skenmpr_attach(struct mpr_softc *sc) 1663265236Sken{ 1664265236Sken int error; 1665265236Sken 1666265236Sken MPR_FUNCTRACE(sc); 1667265236Sken 1668265236Sken mtx_init(&sc->mpr_mtx, "MPR lock", NULL, MTX_DEF); 1669265236Sken callout_init_mtx(&sc->periodic, &sc->mpr_mtx, 0); 1670319445Sslm callout_init_mtx(&sc->device_check_callout, &sc->mpr_mtx, 0); 1671265236Sken TAILQ_INIT(&sc->event_list); 1672265236Sken timevalclear(&sc->lastfail); 1673265236Sken 1674265236Sken if ((error = mpr_transition_ready(sc)) != 0) { 1675265236Sken mpr_printf(sc, "%s failed to transition ready\n", __func__); 1676265236Sken return (error); 1677265236Sken } 1678265236Sken 1679265236Sken sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPR, 1680265236Sken M_ZERO|M_NOWAIT); 1681265236Sken if (!sc->facts) { 1682265236Sken device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n", 1683265236Sken __func__, __LINE__); 1684265236Sken return (ENOMEM); 1685265236Sken } 1686265236Sken 1687265236Sken /* 1688265236Sken * Get IOC Facts and allocate all structures based on this information. 1689265236Sken * A Diag Reset will also call mpr_iocfacts_allocate and re-read the IOC 1690265236Sken * Facts. If relevant values have changed in IOC Facts, this function 1691265236Sken * will free all of the memory based on IOC Facts and reallocate that 1692265236Sken * memory. If this fails, any allocated memory should already be freed. 1693265236Sken */ 1694265236Sken if ((error = mpr_iocfacts_allocate(sc, TRUE)) != 0) { 1695265236Sken mpr_dprint(sc, MPR_FAULT, "%s IOC Facts based allocation " 1696265236Sken "failed with error %d\n", __func__, error); 1697265236Sken return (error); 1698265236Sken } 1699265236Sken 1700265236Sken /* Start the periodic watchdog check on the IOC Doorbell */ 1701265236Sken mpr_periodic(sc); 1702265236Sken 1703265236Sken /* 1704265236Sken * The portenable will kick off discovery events that will drive the 1705265236Sken * rest of the initialization process. The CAM/SAS module will 1706265236Sken * hold up the boot sequence until discovery is complete. 1707265236Sken */ 1708265236Sken sc->mpr_ich.ich_func = mpr_startup; 1709265236Sken sc->mpr_ich.ich_arg = sc; 1710265236Sken if (config_intrhook_establish(&sc->mpr_ich) != 0) { 1711265236Sken mpr_dprint(sc, MPR_ERROR, "Cannot establish MPR config hook\n"); 1712265236Sken error = EINVAL; 1713265236Sken } 1714265236Sken 1715265236Sken /* 1716265236Sken * Allow IR to shutdown gracefully when shutdown occurs. 1717265236Sken */ 1718265236Sken sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final, 1719265236Sken mprsas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT); 1720265236Sken 1721265236Sken if (sc->shutdown_eh == NULL) 1722265236Sken mpr_dprint(sc, MPR_ERROR, "shutdown event registration " 1723265236Sken "failed\n"); 1724265236Sken 1725265236Sken mpr_setup_sysctl(sc); 1726265236Sken 1727265236Sken sc->mpr_flags |= MPR_FLAGS_ATTACH_DONE; 1728265236Sken 1729265236Sken return (error); 1730265236Sken} 1731265236Sken 1732265236Sken/* Run through any late-start handlers. */ 1733265236Skenstatic void 1734265236Skenmpr_startup(void *arg) 1735265236Sken{ 1736265236Sken struct mpr_softc *sc; 1737265236Sken 1738265236Sken sc = (struct mpr_softc *)arg; 1739265236Sken 1740265236Sken mpr_lock(sc); 1741265236Sken mpr_unmask_intr(sc); 1742265236Sken 1743265236Sken /* initialize device mapping tables */ 1744265236Sken mpr_base_static_config_pages(sc); 1745265236Sken mpr_mapping_initialize(sc); 1746265236Sken mprsas_startup(sc); 1747265236Sken mpr_unlock(sc); 1748265236Sken} 1749265236Sken 1750265236Sken/* Periodic watchdog. Is called with the driver lock already held. */ 1751265236Skenstatic void 1752265236Skenmpr_periodic(void *arg) 1753265236Sken{ 1754265236Sken struct mpr_softc *sc; 1755265236Sken uint32_t db; 1756265236Sken 1757265236Sken sc = (struct mpr_softc *)arg; 1758265236Sken if (sc->mpr_flags & MPR_FLAGS_SHUTDOWN) 1759265236Sken return; 1760265236Sken 1761265236Sken db = mpr_regread(sc, MPI2_DOORBELL_OFFSET); 1762265236Sken if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 1763265236Sken if ((db & MPI2_DOORBELL_FAULT_CODE_MASK) == 1764265236Sken IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED) { 1765265236Sken panic("TEMPERATURE FAULT: STOPPING."); 1766265236Sken } 1767265236Sken mpr_dprint(sc, MPR_FAULT, "IOC Fault 0x%08x, Resetting\n", db); 1768265236Sken mpr_reinit(sc); 1769265236Sken } 1770265236Sken 1771265236Sken callout_reset(&sc->periodic, MPR_PERIODIC_DELAY * hz, mpr_periodic, sc); 1772265236Sken} 1773265236Sken 1774265236Skenstatic void 1775265236Skenmpr_log_evt_handler(struct mpr_softc *sc, uintptr_t data, 1776265236Sken MPI2_EVENT_NOTIFICATION_REPLY *event) 1777265236Sken{ 1778265236Sken MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry; 1779265236Sken 1780322661Sken MPR_DPRINT_EVENT(sc, generic, event); 1781265236Sken 1782265236Sken switch (event->Event) { 1783265236Sken case MPI2_EVENT_LOG_DATA: 1784265236Sken mpr_dprint(sc, MPR_EVENT, "MPI2_EVENT_LOG_DATA:\n"); 1785265236Sken if (sc->mpr_debug & MPR_EVENT) 1786265236Sken hexdump(event->EventData, event->EventDataLength, NULL, 1787265236Sken 0); 1788265236Sken break; 1789265236Sken case MPI2_EVENT_LOG_ENTRY_ADDED: 1790265236Sken entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData; 1791265236Sken mpr_dprint(sc, MPR_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event " 1792265236Sken "0x%x Sequence %d:\n", entry->LogEntryQualifier, 1793265236Sken entry->LogSequence); 1794265236Sken break; 1795265236Sken default: 1796265236Sken break; 1797265236Sken } 1798265236Sken return; 1799265236Sken} 1800265236Sken 1801265236Skenstatic int 1802265236Skenmpr_attach_log(struct mpr_softc *sc) 1803265236Sken{ 1804265236Sken uint8_t events[16]; 1805265236Sken 1806265236Sken bzero(events, 16); 1807265236Sken setbit(events, MPI2_EVENT_LOG_DATA); 1808265236Sken setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED); 1809265236Sken 1810265236Sken mpr_register_events(sc, events, mpr_log_evt_handler, NULL, 1811265236Sken &sc->mpr_log_eh); 1812265236Sken 1813265236Sken return (0); 1814265236Sken} 1815265236Sken 1816265236Skenstatic int 1817265236Skenmpr_detach_log(struct mpr_softc *sc) 1818265236Sken{ 1819265236Sken 1820265236Sken if (sc->mpr_log_eh != NULL) 1821265236Sken mpr_deregister_events(sc, sc->mpr_log_eh); 1822265236Sken return (0); 1823265236Sken} 1824265236Sken 1825265236Sken/* 1826265236Sken * Free all of the driver resources and detach submodules. Should be called 1827265236Sken * without the lock held. 1828265236Sken */ 1829265236Skenint 1830265236Skenmpr_free(struct mpr_softc *sc) 1831265236Sken{ 1832265236Sken int error; 1833265236Sken 1834265236Sken /* Turn off the watchdog */ 1835265236Sken mpr_lock(sc); 1836265236Sken sc->mpr_flags |= MPR_FLAGS_SHUTDOWN; 1837265236Sken mpr_unlock(sc); 1838265236Sken /* Lock must not be held for this */ 1839265236Sken callout_drain(&sc->periodic); 1840319445Sslm callout_drain(&sc->device_check_callout); 1841265236Sken 1842265236Sken if (((error = mpr_detach_log(sc)) != 0) || 1843265236Sken ((error = mpr_detach_sas(sc)) != 0)) 1844265236Sken return (error); 1845265236Sken 1846265236Sken mpr_detach_user(sc); 1847265236Sken 1848265236Sken /* Put the IOC back in the READY state. */ 1849265236Sken mpr_lock(sc); 1850265236Sken if ((error = mpr_transition_ready(sc)) != 0) { 1851265236Sken mpr_unlock(sc); 1852265236Sken return (error); 1853265236Sken } 1854265236Sken mpr_unlock(sc); 1855265236Sken 1856265236Sken if (sc->facts != NULL) 1857265236Sken free(sc->facts, M_MPR); 1858265236Sken 1859265236Sken /* 1860265236Sken * Free all buffers that are based on IOC Facts. A Diag Reset may need 1861265236Sken * to free these buffers too. 1862265236Sken */ 1863265236Sken mpr_iocfacts_free(sc); 1864265236Sken 1865265236Sken if (sc->sysctl_tree != NULL) 1866265236Sken sysctl_ctx_free(&sc->sysctl_ctx); 1867265236Sken 1868265236Sken /* Deregister the shutdown function */ 1869265236Sken if (sc->shutdown_eh != NULL) 1870265236Sken EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh); 1871265236Sken 1872265236Sken mtx_destroy(&sc->mpr_mtx); 1873265236Sken 1874265236Sken return (0); 1875265236Sken} 1876265236Sken 1877265236Skenstatic __inline void 1878265236Skenmpr_complete_command(struct mpr_softc *sc, struct mpr_command *cm) 1879265236Sken{ 1880265236Sken MPR_FUNCTRACE(sc); 1881265236Sken 1882265236Sken if (cm == NULL) { 1883265236Sken mpr_dprint(sc, MPR_ERROR, "Completing NULL command\n"); 1884265236Sken return; 1885265236Sken } 1886265236Sken 1887265236Sken if (cm->cm_flags & MPR_CM_FLAGS_POLLED) 1888265236Sken cm->cm_flags |= MPR_CM_FLAGS_COMPLETE; 1889265236Sken 1890265236Sken if (cm->cm_complete != NULL) { 1891265236Sken mpr_dprint(sc, MPR_TRACE, 1892299962Sslm "%s cm %p calling cm_complete %p data %p reply %p\n", 1893299962Sslm __func__, cm, cm->cm_complete, cm->cm_complete_data, 1894299962Sslm cm->cm_reply); 1895265236Sken cm->cm_complete(sc, cm); 1896265236Sken } 1897265236Sken 1898265236Sken if (cm->cm_flags & MPR_CM_FLAGS_WAKEUP) { 1899265236Sken mpr_dprint(sc, MPR_TRACE, "waking up %p\n", cm); 1900265236Sken wakeup(cm); 1901265236Sken } 1902265236Sken 1903265236Sken if (sc->io_cmds_active != 0) { 1904265236Sken sc->io_cmds_active--; 1905265236Sken } else { 1906265236Sken mpr_dprint(sc, MPR_ERROR, "Warning: io_cmds_active is " 1907265236Sken "out of sync - resynching to 0\n"); 1908265236Sken } 1909265236Sken} 1910265236Sken 1911265236Skenstatic void 1912265236Skenmpr_sas_log_info(struct mpr_softc *sc , u32 log_info) 1913265236Sken{ 1914265236Sken union loginfo_type { 1915265236Sken u32 loginfo; 1916265236Sken struct { 1917265236Sken u32 subcode:16; 1918265236Sken u32 code:8; 1919265236Sken u32 originator:4; 1920265236Sken u32 bus_type:4; 1921265236Sken } dw; 1922265236Sken }; 1923265236Sken union loginfo_type sas_loginfo; 1924265236Sken char *originator_str = NULL; 1925265236Sken 1926265236Sken sas_loginfo.loginfo = log_info; 1927265236Sken if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 1928265236Sken return; 1929265236Sken 1930265236Sken /* each nexus loss loginfo */ 1931265236Sken if (log_info == 0x31170000) 1932265236Sken return; 1933265236Sken 1934265236Sken /* eat the loginfos associated with task aborts */ 1935265236Sken if ((log_info == 30050000) || (log_info == 0x31140000) || 1936265236Sken (log_info == 0x31130000)) 1937265236Sken return; 1938265236Sken 1939265236Sken switch (sas_loginfo.dw.originator) { 1940265236Sken case 0: 1941265236Sken originator_str = "IOP"; 1942265236Sken break; 1943265236Sken case 1: 1944265236Sken originator_str = "PL"; 1945265236Sken break; 1946265236Sken case 2: 1947265236Sken originator_str = "IR"; 1948265236Sken break; 1949265236Sken } 1950265236Sken 1951299962Sslm mpr_dprint(sc, MPR_LOG, "log_info(0x%08x): originator(%s), " 1952299962Sslm "code(0x%02x), sub_code(0x%04x)\n", log_info, originator_str, 1953299962Sslm sas_loginfo.dw.code, sas_loginfo.dw.subcode); 1954265236Sken} 1955265236Sken 1956265236Skenstatic void 1957265236Skenmpr_display_reply_info(struct mpr_softc *sc, uint8_t *reply) 1958265236Sken{ 1959265236Sken MPI2DefaultReply_t *mpi_reply; 1960265236Sken u16 sc_status; 1961265236Sken 1962265236Sken mpi_reply = (MPI2DefaultReply_t*)reply; 1963265236Sken sc_status = le16toh(mpi_reply->IOCStatus); 1964265236Sken if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 1965265236Sken mpr_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo)); 1966265236Sken} 1967265236Sken 1968265236Skenvoid 1969265236Skenmpr_intr(void *data) 1970265236Sken{ 1971265236Sken struct mpr_softc *sc; 1972265236Sken uint32_t status; 1973265236Sken 1974265236Sken sc = (struct mpr_softc *)data; 1975265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 1976265236Sken 1977265236Sken /* 1978265236Sken * Check interrupt status register to flush the bus. This is 1979265236Sken * needed for both INTx interrupts and driver-driven polling 1980265236Sken */ 1981265236Sken status = mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 1982265236Sken if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0) 1983265236Sken return; 1984265236Sken 1985265236Sken mpr_lock(sc); 1986265236Sken mpr_intr_locked(data); 1987265236Sken mpr_unlock(sc); 1988265236Sken return; 1989265236Sken} 1990265236Sken 1991265236Sken/* 1992265236Sken * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the 1993265236Sken * chip. Hopefully this theory is correct. 1994265236Sken */ 1995265236Skenvoid 1996265236Skenmpr_intr_msi(void *data) 1997265236Sken{ 1998265236Sken struct mpr_softc *sc; 1999265236Sken 2000265236Sken sc = (struct mpr_softc *)data; 2001265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 2002265236Sken mpr_lock(sc); 2003265236Sken mpr_intr_locked(data); 2004265236Sken mpr_unlock(sc); 2005265236Sken return; 2006265236Sken} 2007265236Sken 2008265236Sken/* 2009265236Sken * The locking is overly broad and simplistic, but easy to deal with for now. 2010265236Sken */ 2011265236Skenvoid 2012265236Skenmpr_intr_locked(void *data) 2013265236Sken{ 2014265236Sken MPI2_REPLY_DESCRIPTORS_UNION *desc; 2015265236Sken struct mpr_softc *sc; 2016265236Sken struct mpr_command *cm = NULL; 2017265236Sken uint8_t flags; 2018265236Sken u_int pq; 2019265236Sken MPI2_DIAG_RELEASE_REPLY *rel_rep; 2020265236Sken mpr_fw_diagnostic_buffer_t *pBuffer; 2021265236Sken 2022265236Sken sc = (struct mpr_softc *)data; 2023265236Sken 2024265236Sken pq = sc->replypostindex; 2025265236Sken mpr_dprint(sc, MPR_TRACE, 2026265236Sken "%s sc %p starting with replypostindex %u\n", 2027265236Sken __func__, sc, sc->replypostindex); 2028265236Sken 2029265236Sken for ( ;; ) { 2030265236Sken cm = NULL; 2031265236Sken desc = &sc->post_queue[sc->replypostindex]; 2032265236Sken flags = desc->Default.ReplyFlags & 2033265236Sken MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 2034265236Sken if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) || 2035265236Sken (le32toh(desc->Words.High) == 0xffffffff)) 2036265236Sken break; 2037265236Sken 2038265236Sken /* increment the replypostindex now, so that event handlers 2039265236Sken * and cm completion handlers which decide to do a diag 2040265236Sken * reset can zero it without it getting incremented again 2041265236Sken * afterwards, and we break out of this loop on the next 2042265236Sken * iteration since the reply post queue has been cleared to 2043265236Sken * 0xFF and all descriptors look unused (which they are). 2044265236Sken */ 2045265236Sken if (++sc->replypostindex >= sc->pqdepth) 2046265236Sken sc->replypostindex = 0; 2047265236Sken 2048265236Sken switch (flags) { 2049265236Sken case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS: 2050265236Sken case MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS: 2051319436Sslm case MPI26_RPY_DESCRIPT_FLAGS_PCIE_ENCAPSULATED_SUCCESS: 2052265236Sken cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)]; 2053265236Sken cm->cm_reply = NULL; 2054265236Sken break; 2055265236Sken case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY: 2056265236Sken { 2057265236Sken uint32_t baddr; 2058265236Sken uint8_t *reply; 2059265236Sken 2060265236Sken /* 2061265236Sken * Re-compose the reply address from the address 2062265236Sken * sent back from the chip. The ReplyFrameAddress 2063265236Sken * is the lower 32 bits of the physical address of 2064265236Sken * particular reply frame. Convert that address to 2065265236Sken * host format, and then use that to provide the 2066265236Sken * offset against the virtual address base 2067265236Sken * (sc->reply_frames). 2068265236Sken */ 2069265236Sken baddr = le32toh(desc->AddressReply.ReplyFrameAddress); 2070265236Sken reply = sc->reply_frames + 2071265236Sken (baddr - ((uint32_t)sc->reply_busaddr)); 2072265236Sken /* 2073265236Sken * Make sure the reply we got back is in a valid 2074265236Sken * range. If not, go ahead and panic here, since 2075265236Sken * we'll probably panic as soon as we deference the 2076265236Sken * reply pointer anyway. 2077265236Sken */ 2078265236Sken if ((reply < sc->reply_frames) 2079265236Sken || (reply > (sc->reply_frames + 2080265236Sken (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) { 2081265236Sken printf("%s: WARNING: reply %p out of range!\n", 2082265236Sken __func__, reply); 2083265236Sken printf("%s: reply_frames %p, fqdepth %d, " 2084265236Sken "frame size %d\n", __func__, 2085265236Sken sc->reply_frames, sc->fqdepth, 2086265236Sken sc->facts->ReplyFrameSize * 4); 2087265236Sken printf("%s: baddr %#x,\n", __func__, baddr); 2088265236Sken /* LSI-TODO. See Linux Code for Graceful exit */ 2089265236Sken panic("Reply address out of range"); 2090265236Sken } 2091265236Sken if (le16toh(desc->AddressReply.SMID) == 0) { 2092265236Sken if (((MPI2_DEFAULT_REPLY *)reply)->Function == 2093265236Sken MPI2_FUNCTION_DIAG_BUFFER_POST) { 2094265236Sken /* 2095265236Sken * If SMID is 0 for Diag Buffer Post, 2096265236Sken * this implies that the reply is due to 2097265236Sken * a release function with a status that 2098265236Sken * the buffer has been released. Set 2099265236Sken * the buffer flags accordingly. 2100265236Sken */ 2101265236Sken rel_rep = 2102265236Sken (MPI2_DIAG_RELEASE_REPLY *)reply; 2103299962Sslm if ((le16toh(rel_rep->IOCStatus) & 2104299962Sslm MPI2_IOCSTATUS_MASK) == 2105265236Sken MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED) 2106299962Sslm { 2107265236Sken pBuffer = 2108265236Sken &sc->fw_diag_buffer_list[ 2109265236Sken rel_rep->BufferType]; 2110265236Sken pBuffer->valid_data = TRUE; 2111265236Sken pBuffer->owned_by_firmware = 2112265236Sken FALSE; 2113265236Sken pBuffer->immediate = FALSE; 2114265236Sken } 2115265236Sken } else 2116265236Sken mpr_dispatch_event(sc, baddr, 2117265236Sken (MPI2_EVENT_NOTIFICATION_REPLY *) 2118265236Sken reply); 2119265236Sken } else { 2120265236Sken cm = &sc->commands[ 2121265236Sken le16toh(desc->AddressReply.SMID)]; 2122265236Sken cm->cm_reply = reply; 2123265236Sken cm->cm_reply_data = 2124265236Sken le32toh(desc->AddressReply. 2125265236Sken ReplyFrameAddress); 2126265236Sken } 2127265236Sken break; 2128265236Sken } 2129265236Sken case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS: 2130265236Sken case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER: 2131265236Sken case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS: 2132265236Sken default: 2133265236Sken /* Unhandled */ 2134265236Sken mpr_dprint(sc, MPR_ERROR, "Unhandled reply 0x%x\n", 2135265236Sken desc->Default.ReplyFlags); 2136265236Sken cm = NULL; 2137265236Sken break; 2138265236Sken } 2139265236Sken 2140265236Sken if (cm != NULL) { 2141265236Sken // Print Error reply frame 2142265236Sken if (cm->cm_reply) 2143265236Sken mpr_display_reply_info(sc,cm->cm_reply); 2144265236Sken mpr_complete_command(sc, cm); 2145265236Sken } 2146265236Sken 2147265236Sken desc->Words.Low = 0xffffffff; 2148265236Sken desc->Words.High = 0xffffffff; 2149265236Sken } 2150265236Sken 2151265236Sken if (pq != sc->replypostindex) { 2152265236Sken mpr_dprint(sc, MPR_TRACE, 2153265236Sken "%s sc %p writing postindex %d\n", 2154265236Sken __func__, sc, sc->replypostindex); 2155265236Sken mpr_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 2156265236Sken sc->replypostindex); 2157265236Sken } 2158265236Sken 2159265236Sken return; 2160265236Sken} 2161265236Sken 2162265236Skenstatic void 2163265236Skenmpr_dispatch_event(struct mpr_softc *sc, uintptr_t data, 2164265236Sken MPI2_EVENT_NOTIFICATION_REPLY *reply) 2165265236Sken{ 2166265236Sken struct mpr_event_handle *eh; 2167265236Sken int event, handled = 0; 2168265236Sken 2169265236Sken event = le16toh(reply->Event); 2170265236Sken TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2171265236Sken if (isset(eh->mask, event)) { 2172265236Sken eh->callback(sc, data, reply); 2173265236Sken handled++; 2174265236Sken } 2175265236Sken } 2176265236Sken 2177265236Sken if (handled == 0) 2178265236Sken mpr_dprint(sc, MPR_EVENT, "Unhandled event 0x%x\n", 2179265236Sken le16toh(event)); 2180265236Sken 2181265236Sken /* 2182265236Sken * This is the only place that the event/reply should be freed. 2183265236Sken * Anything wanting to hold onto the event data should have 2184265236Sken * already copied it into their own storage. 2185265236Sken */ 2186265236Sken mpr_free_reply(sc, data); 2187265236Sken} 2188265236Sken 2189265236Skenstatic void 2190265236Skenmpr_reregister_events_complete(struct mpr_softc *sc, struct mpr_command *cm) 2191265236Sken{ 2192265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 2193265236Sken 2194265236Sken if (cm->cm_reply) 2195322661Sken MPR_DPRINT_EVENT(sc, generic, 2196265236Sken (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply); 2197265236Sken 2198265236Sken mpr_free_command(sc, cm); 2199265236Sken 2200265236Sken /* next, send a port enable */ 2201265236Sken mprsas_startup(sc); 2202265236Sken} 2203265236Sken 2204265236Sken/* 2205265236Sken * For both register_events and update_events, the caller supplies a bitmap 2206265236Sken * of events that it _wants_. These functions then turn that into a bitmask 2207265236Sken * suitable for the controller. 2208265236Sken */ 2209265236Skenint 2210265236Skenmpr_register_events(struct mpr_softc *sc, uint8_t *mask, 2211265236Sken mpr_evt_callback_t *cb, void *data, struct mpr_event_handle **handle) 2212265236Sken{ 2213265236Sken struct mpr_event_handle *eh; 2214265236Sken int error = 0; 2215265236Sken 2216265236Sken eh = malloc(sizeof(struct mpr_event_handle), M_MPR, M_WAITOK|M_ZERO); 2217265236Sken if (!eh) { 2218265236Sken device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n", 2219265236Sken __func__, __LINE__); 2220265236Sken return (ENOMEM); 2221265236Sken } 2222265236Sken eh->callback = cb; 2223265236Sken eh->data = data; 2224265236Sken TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list); 2225265236Sken if (mask != NULL) 2226265236Sken error = mpr_update_events(sc, eh, mask); 2227265236Sken *handle = eh; 2228265236Sken 2229265236Sken return (error); 2230265236Sken} 2231265236Sken 2232265236Skenint 2233265236Skenmpr_update_events(struct mpr_softc *sc, struct mpr_event_handle *handle, 2234265236Sken uint8_t *mask) 2235265236Sken{ 2236265236Sken MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2237322661Sken MPI2_EVENT_NOTIFICATION_REPLY *reply = NULL; 2238322661Sken struct mpr_command *cm = NULL; 2239265236Sken struct mpr_event_handle *eh; 2240265236Sken int error, i; 2241265236Sken 2242265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 2243265236Sken 2244265236Sken if ((mask != NULL) && (handle != NULL)) 2245265236Sken bcopy(mask, &handle->mask[0], 16); 2246265236Sken memset(sc->event_mask, 0xff, 16); 2247265236Sken 2248265236Sken TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2249265236Sken for (i = 0; i < 16; i++) 2250265236Sken sc->event_mask[i] &= ~eh->mask[i]; 2251265236Sken } 2252265236Sken 2253265236Sken if ((cm = mpr_alloc_command(sc)) == NULL) 2254265236Sken return (EBUSY); 2255265236Sken evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2256265236Sken evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2257265236Sken evtreq->MsgFlags = 0; 2258265236Sken evtreq->SASBroadcastPrimitiveMasks = 0; 2259265236Sken#ifdef MPR_DEBUG_ALL_EVENTS 2260265236Sken { 2261265236Sken u_char fullmask[16]; 2262265236Sken memset(fullmask, 0x00, 16); 2263265236Sken bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16); 2264265236Sken } 2265265236Sken#else 2266265236Sken bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16); 2267265236Sken#endif 2268265236Sken cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2269265236Sken cm->cm_data = NULL; 2270265236Sken 2271322661Sken error = mpr_request_polled(sc, &cm); 2272322661Sken if (cm != NULL) 2273322661Sken reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply; 2274265236Sken if ((reply == NULL) || 2275265236Sken (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 2276265236Sken error = ENXIO; 2277265236Sken 2278283990Sslm if (reply) 2279322661Sken MPR_DPRINT_EVENT(sc, generic, reply); 2280265236Sken 2281265236Sken mpr_dprint(sc, MPR_TRACE, "%s finished error %d\n", __func__, error); 2282265236Sken 2283322661Sken if (cm != NULL) 2284322661Sken mpr_free_command(sc, cm); 2285265236Sken return (error); 2286265236Sken} 2287265236Sken 2288265236Skenstatic int 2289265236Skenmpr_reregister_events(struct mpr_softc *sc) 2290265236Sken{ 2291265236Sken MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2292265236Sken struct mpr_command *cm; 2293265236Sken struct mpr_event_handle *eh; 2294265236Sken int error, i; 2295265236Sken 2296265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 2297265236Sken 2298265236Sken /* first, reregister events */ 2299265236Sken 2300265236Sken memset(sc->event_mask, 0xff, 16); 2301265236Sken 2302265236Sken TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2303265236Sken for (i = 0; i < 16; i++) 2304265236Sken sc->event_mask[i] &= ~eh->mask[i]; 2305265236Sken } 2306265236Sken 2307265236Sken if ((cm = mpr_alloc_command(sc)) == NULL) 2308265236Sken return (EBUSY); 2309265236Sken evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2310265236Sken evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2311265236Sken evtreq->MsgFlags = 0; 2312265236Sken evtreq->SASBroadcastPrimitiveMasks = 0; 2313265236Sken#ifdef MPR_DEBUG_ALL_EVENTS 2314265236Sken { 2315265236Sken u_char fullmask[16]; 2316265236Sken memset(fullmask, 0x00, 16); 2317265236Sken bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16); 2318265236Sken } 2319265236Sken#else 2320265236Sken bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16); 2321265236Sken#endif 2322265236Sken cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2323265236Sken cm->cm_data = NULL; 2324265236Sken cm->cm_complete = mpr_reregister_events_complete; 2325265236Sken 2326265236Sken error = mpr_map_command(sc, cm); 2327265236Sken 2328265236Sken mpr_dprint(sc, MPR_TRACE, "%s finished with error %d\n", __func__, 2329265236Sken error); 2330265236Sken return (error); 2331265236Sken} 2332265236Sken 2333265236Skenint 2334265236Skenmpr_deregister_events(struct mpr_softc *sc, struct mpr_event_handle *handle) 2335265236Sken{ 2336265236Sken 2337265236Sken TAILQ_REMOVE(&sc->event_list, handle, eh_list); 2338265236Sken free(handle, M_MPR); 2339265236Sken return (mpr_update_events(sc, NULL, NULL)); 2340265236Sken} 2341265236Sken 2342319436Sslm/** 2343319436Sslm* mpr_build_nvme_prp - This function is called for NVMe end devices to build a 2344319436Sslm* native SGL (NVMe PRP). The native SGL is built starting in the first PRP entry 2345319436Sslm* of the NVMe message (PRP1). If the data buffer is small enough to be described 2346319436Sslm* entirely using PRP1, then PRP2 is not used. If needed, PRP2 is used to 2347319436Sslm* describe a larger data buffer. If the data buffer is too large to describe 2348319436Sslm* using the two PRP entriess inside the NVMe message, then PRP1 describes the 2349319436Sslm* first data memory segment, and PRP2 contains a pointer to a PRP list located 2350319436Sslm* elsewhere in memory to describe the remaining data memory segments. The PRP 2351319436Sslm* list will be contiguous. 2352319436Sslm 2353319436Sslm* The native SGL for NVMe devices is a Physical Region Page (PRP). A PRP 2354319436Sslm* consists of a list of PRP entries to describe a number of noncontigous 2355319436Sslm* physical memory segments as a single memory buffer, just as a SGL does. Note 2356319436Sslm* however, that this function is only used by the IOCTL call, so the memory 2357319436Sslm* given will be guaranteed to be contiguous. There is no need to translate 2358319436Sslm* non-contiguous SGL into a PRP in this case. All PRPs will describe contiguous 2359319436Sslm* space that is one page size each. 2360319436Sslm* 2361319436Sslm* Each NVMe message contains two PRP entries. The first (PRP1) either contains 2362319436Sslm* a PRP list pointer or a PRP element, depending upon the command. PRP2 contains 2363319436Sslm* the second PRP element if the memory being described fits within 2 PRP 2364319436Sslm* entries, or a PRP list pointer if the PRP spans more than two entries. 2365319436Sslm* 2366319436Sslm* A PRP list pointer contains the address of a PRP list, structured as a linear 2367319436Sslm* array of PRP entries. Each PRP entry in this list describes a segment of 2368319436Sslm* physical memory. 2369319436Sslm* 2370319436Sslm* Each 64-bit PRP entry comprises an address and an offset field. The address 2371319436Sslm* always points to the beginning of a PAGE_SIZE physical memory page, and the 2372319436Sslm* offset describes where within that page the memory segment begins. Only the 2373319436Sslm* first element in a PRP list may contain a non-zero offest, implying that all 2374319436Sslm* memory segments following the first begin at the start of a PAGE_SIZE page. 2375319436Sslm* 2376319436Sslm* Each PRP element normally describes a chunck of PAGE_SIZE physical memory, 2377319436Sslm* with exceptions for the first and last elements in the list. If the memory 2378319436Sslm* being described by the list begins at a non-zero offset within the first page, 2379319436Sslm* then the first PRP element will contain a non-zero offset indicating where the 2380319436Sslm* region begins within the page. The last memory segment may end before the end 2381319436Sslm* of the PAGE_SIZE segment, depending upon the overall size of the memory being 2382319436Sslm* described by the PRP list. 2383319436Sslm* 2384319436Sslm* Since PRP entries lack any indication of size, the overall data buffer length 2385319436Sslm* is used to determine where the end of the data memory buffer is located, and 2386319436Sslm* how many PRP entries are required to describe it. 2387319436Sslm* 2388319436Sslm* Returns nothing. 2389319436Sslm*/ 2390319436Sslmvoid 2391319436Sslmmpr_build_nvme_prp(struct mpr_softc *sc, struct mpr_command *cm, 2392319436Sslm Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request, void *data, 2393319436Sslm uint32_t data_in_sz, uint32_t data_out_sz) 2394319436Sslm{ 2395319436Sslm int prp_size = PRP_ENTRY_SIZE; 2396319436Sslm uint64_t *prp_entry, *prp1_entry, *prp2_entry; 2397319436Sslm uint64_t *prp_entry_phys, *prp_page, *prp_page_phys; 2398319436Sslm uint32_t offset, entry_len, page_mask_result, page_mask; 2399319436Sslm bus_addr_t paddr; 2400319436Sslm size_t length; 2401319436Sslm struct mpr_prp_page *prp_page_info = NULL; 2402319436Sslm 2403319436Sslm /* 2404319436Sslm * Not all commands require a data transfer. If no data, just return 2405319436Sslm * without constructing any PRP. 2406319436Sslm */ 2407319436Sslm if (!data_in_sz && !data_out_sz) 2408319436Sslm return; 2409319436Sslm 2410319436Sslm /* 2411319436Sslm * Set pointers to PRP1 and PRP2, which are in the NVMe command. PRP1 is 2412319436Sslm * located at a 24 byte offset from the start of the NVMe command. Then 2413319436Sslm * set the current PRP entry pointer to PRP1. 2414319436Sslm */ 2415319436Sslm prp1_entry = (uint64_t *)(nvme_encap_request->NVMe_Command + 2416319436Sslm NVME_CMD_PRP1_OFFSET); 2417319436Sslm prp2_entry = (uint64_t *)(nvme_encap_request->NVMe_Command + 2418319436Sslm NVME_CMD_PRP2_OFFSET); 2419319436Sslm prp_entry = prp1_entry; 2420319436Sslm 2421319436Sslm /* 2422319436Sslm * For the PRP entries, use the specially allocated buffer of 2423319436Sslm * contiguous memory. PRP Page allocation failures should not happen 2424319436Sslm * because there should be enough PRP page buffers to account for the 2425319436Sslm * possible NVMe QDepth. 2426319436Sslm */ 2427319436Sslm prp_page_info = mpr_alloc_prp_page(sc); 2428319436Sslm KASSERT(prp_page_info != NULL, ("%s: There are no PRP Pages left to be " 2429319436Sslm "used for building a native NVMe SGL.\n", __func__)); 2430319436Sslm prp_page = (uint64_t *)prp_page_info->prp_page; 2431319436Sslm prp_page_phys = (uint64_t *)(uintptr_t)prp_page_info->prp_page_busaddr; 2432319436Sslm 2433319436Sslm /* 2434319436Sslm * Insert the allocated PRP page into the command's PRP page list. This 2435319436Sslm * will be freed when the command is freed. 2436319436Sslm */ 2437319436Sslm TAILQ_INSERT_TAIL(&cm->cm_prp_page_list, prp_page_info, prp_page_link); 2438319436Sslm 2439319436Sslm /* 2440319436Sslm * Check if we are within 1 entry of a page boundary we don't want our 2441319436Sslm * first entry to be a PRP List entry. 2442319436Sslm */ 2443319436Sslm page_mask = PAGE_SIZE - 1; 2444319436Sslm page_mask_result = (uintptr_t)((uint8_t *)prp_page + prp_size) & 2445319436Sslm page_mask; 2446319436Sslm if (!page_mask_result) 2447319436Sslm { 2448319436Sslm /* Bump up to next page boundary. */ 2449319436Sslm prp_page = (uint64_t *)((uint8_t *)prp_page + prp_size); 2450319436Sslm prp_page_phys = (uint64_t *)((uint8_t *)prp_page_phys + 2451319436Sslm prp_size); 2452319436Sslm } 2453319436Sslm 2454319436Sslm /* 2455319436Sslm * Set PRP physical pointer, which initially points to the current PRP 2456319436Sslm * DMA memory page. 2457319436Sslm */ 2458319436Sslm prp_entry_phys = prp_page_phys; 2459319436Sslm 2460319436Sslm /* Get physical address and length of the data buffer. */ 2461319436Sslm paddr = (bus_addr_t)data; 2462319436Sslm if (data_in_sz) 2463319436Sslm length = data_in_sz; 2464319436Sslm else 2465319436Sslm length = data_out_sz; 2466319436Sslm 2467319436Sslm /* Loop while the length is not zero. */ 2468319436Sslm while (length) 2469319436Sslm { 2470319436Sslm /* 2471319436Sslm * Check if we need to put a list pointer here if we are at page 2472319436Sslm * boundary - prp_size (8 bytes). 2473319436Sslm */ 2474319436Sslm page_mask_result = (uintptr_t)((uint8_t *)prp_entry_phys + 2475319436Sslm prp_size) & page_mask; 2476319436Sslm if (!page_mask_result) 2477319436Sslm { 2478319436Sslm /* 2479319436Sslm * This is the last entry in a PRP List, so we need to 2480319436Sslm * put a PRP list pointer here. What this does is: 2481319436Sslm * - bump the current memory pointer to the next 2482319436Sslm * address, which will be the next full page. 2483319436Sslm * - set the PRP Entry to point to that page. This is 2484319436Sslm * now the PRP List pointer. 2485319436Sslm * - bump the PRP Entry pointer the start of the next 2486319436Sslm * page. Since all of this PRP memory is contiguous, 2487319436Sslm * no need to get a new page - it's just the next 2488319436Sslm * address. 2489319436Sslm */ 2490319436Sslm prp_entry_phys++; 2491319436Sslm *prp_entry = 2492319436Sslm htole64((uint64_t)(uintptr_t)prp_entry_phys); 2493319436Sslm prp_entry++; 2494319436Sslm } 2495319436Sslm 2496319436Sslm /* Need to handle if entry will be part of a page. */ 2497319436Sslm offset = (uint32_t)paddr & page_mask; 2498319436Sslm entry_len = PAGE_SIZE - offset; 2499319436Sslm 2500319436Sslm if (prp_entry == prp1_entry) 2501319436Sslm { 2502319436Sslm /* 2503319436Sslm * Must fill in the first PRP pointer (PRP1) before 2504319436Sslm * moving on. 2505319436Sslm */ 2506319436Sslm *prp1_entry = htole64((uint64_t)paddr); 2507319436Sslm 2508319436Sslm /* 2509319436Sslm * Now point to the second PRP entry within the 2510319436Sslm * command (PRP2). 2511319436Sslm */ 2512319436Sslm prp_entry = prp2_entry; 2513319436Sslm } 2514319436Sslm else if (prp_entry == prp2_entry) 2515319436Sslm { 2516319436Sslm /* 2517319436Sslm * Should the PRP2 entry be a PRP List pointer or just a 2518319436Sslm * regular PRP pointer? If there is more than one more 2519319436Sslm * page of data, must use a PRP List pointer. 2520319436Sslm */ 2521319436Sslm if (length > PAGE_SIZE) 2522319436Sslm { 2523319436Sslm /* 2524319436Sslm * PRP2 will contain a PRP List pointer because 2525319436Sslm * more PRP's are needed with this command. The 2526319436Sslm * list will start at the beginning of the 2527319436Sslm * contiguous buffer. 2528319436Sslm */ 2529319436Sslm *prp2_entry = 2530319436Sslm htole64( 2531319436Sslm (uint64_t)(uintptr_t)prp_entry_phys); 2532319436Sslm 2533319436Sslm /* 2534319436Sslm * The next PRP Entry will be the start of the 2535319436Sslm * first PRP List. 2536319436Sslm */ 2537319436Sslm prp_entry = prp_page; 2538319436Sslm } 2539319436Sslm else 2540319436Sslm { 2541319436Sslm /* 2542319436Sslm * After this, the PRP Entries are complete. 2543319436Sslm * This command uses 2 PRP's and no PRP list. 2544319436Sslm */ 2545319436Sslm *prp2_entry = htole64((uint64_t)paddr); 2546319436Sslm } 2547319436Sslm } 2548319436Sslm else 2549319436Sslm { 2550319436Sslm /* 2551319436Sslm * Put entry in list and bump the addresses. 2552319436Sslm * 2553319436Sslm * After PRP1 and PRP2 are filled in, this will fill in 2554319436Sslm * all remaining PRP entries in a PRP List, one per each 2555319436Sslm * time through the loop. 2556319436Sslm */ 2557319436Sslm *prp_entry = htole64((uint64_t)paddr); 2558319436Sslm prp_entry++; 2559319436Sslm prp_entry_phys++; 2560319436Sslm } 2561319436Sslm 2562319436Sslm /* 2563319436Sslm * Bump the phys address of the command's data buffer by the 2564319436Sslm * entry_len. 2565319436Sslm */ 2566319436Sslm paddr += entry_len; 2567319436Sslm 2568319436Sslm /* Decrement length accounting for last partial page. */ 2569319436Sslm if (entry_len > length) 2570319436Sslm length = 0; 2571319436Sslm else 2572319436Sslm length -= entry_len; 2573319436Sslm } 2574319436Sslm} 2575319436Sslm 2576265236Sken/* 2577319436Sslm * mpr_check_pcie_native_sgl - This function is called for PCIe end devices to 2578319436Sslm * determine if the driver needs to build a native SGL. If so, that native SGL 2579319436Sslm * is built in the contiguous buffers allocated especially for PCIe SGL 2580319436Sslm * creation. If the driver will not build a native SGL, return TRUE and a 2581319436Sslm * normal IEEE SGL will be built. Currently this routine supports NVMe devices 2582319436Sslm * only. 2583319436Sslm * 2584319436Sslm * Returns FALSE (0) if native SGL was built, TRUE (1) if no SGL was built. 2585319436Sslm */ 2586319436Sslmstatic int 2587319436Sslmmpr_check_pcie_native_sgl(struct mpr_softc *sc, struct mpr_command *cm, 2588319436Sslm bus_dma_segment_t *segs, int segs_left) 2589319436Sslm{ 2590319436Sslm uint32_t i, sge_dwords, length, offset, entry_len; 2591319436Sslm uint32_t num_entries, buff_len = 0, sges_in_segment; 2592319436Sslm uint32_t page_mask, page_mask_result, *curr_buff; 2593319436Sslm uint32_t *ptr_sgl, *ptr_first_sgl, first_page_offset; 2594319436Sslm uint32_t first_page_data_size, end_residual; 2595319436Sslm uint64_t *msg_phys; 2596319436Sslm bus_addr_t paddr; 2597319436Sslm int build_native_sgl = 0, first_prp_entry; 2598319436Sslm int prp_size = PRP_ENTRY_SIZE; 2599319436Sslm Mpi25IeeeSgeChain64_t *main_chain_element = NULL; 2600319436Sslm struct mpr_prp_page *prp_page_info = NULL; 2601319436Sslm 2602319436Sslm mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 2603319436Sslm 2604319436Sslm /* 2605319436Sslm * Add up the sizes of each segment length to get the total transfer 2606319436Sslm * size, which will be checked against the Maximum Data Transfer Size. 2607319436Sslm * If the data transfer length exceeds the MDTS for this device, just 2608319436Sslm * return 1 so a normal IEEE SGL will be built. F/W will break the I/O 2609319436Sslm * up into multiple I/O's. [nvme_mdts = 0 means unlimited] 2610319436Sslm */ 2611319436Sslm for (i = 0; i < segs_left; i++) 2612319436Sslm buff_len += htole32(segs[i].ds_len); 2613319436Sslm if ((cm->cm_targ->MDTS > 0) && (buff_len > cm->cm_targ->MDTS)) 2614319436Sslm return 1; 2615319436Sslm 2616319436Sslm /* Create page_mask (to get offset within page) */ 2617319436Sslm page_mask = PAGE_SIZE - 1; 2618319436Sslm 2619319436Sslm /* 2620319436Sslm * Check if the number of elements exceeds the max number that can be 2621319436Sslm * put in the main message frame (H/W can only translate an SGL that 2622319436Sslm * is contained entirely in the main message frame). 2623319436Sslm */ 2624319436Sslm sges_in_segment = (sc->facts->IOCRequestFrameSize - 2625319436Sslm offsetof(Mpi25SCSIIORequest_t, SGL)) / sizeof(MPI25_SGE_IO_UNION); 2626319436Sslm if (segs_left > sges_in_segment) 2627319436Sslm build_native_sgl = 1; 2628319436Sslm else 2629319436Sslm { 2630319436Sslm /* 2631319436Sslm * NVMe uses one PRP for each physical page (or part of physical 2632319436Sslm * page). 2633319436Sslm * if 4 pages or less then IEEE is OK 2634319436Sslm * if > 5 pages then we need to build a native SGL 2635319436Sslm * if > 4 and <= 5 pages, then check the physical address of 2636319436Sslm * the first SG entry, then if this first size in the page 2637319436Sslm * is >= the residual beyond 4 pages then use IEEE, 2638319436Sslm * otherwise use native SGL 2639319436Sslm */ 2640319436Sslm if (buff_len > (PAGE_SIZE * 5)) 2641319436Sslm build_native_sgl = 1; 2642319436Sslm else if ((buff_len > (PAGE_SIZE * 4)) && 2643319436Sslm (buff_len <= (PAGE_SIZE * 5)) ) 2644319436Sslm { 2645319436Sslm msg_phys = (uint64_t *)segs[0].ds_addr; 2646319436Sslm first_page_offset = 2647319436Sslm ((uint32_t)(uint64_t)(uintptr_t)msg_phys & 2648319436Sslm page_mask); 2649319436Sslm first_page_data_size = PAGE_SIZE - first_page_offset; 2650319436Sslm end_residual = buff_len % PAGE_SIZE; 2651319436Sslm 2652319436Sslm /* 2653319436Sslm * If offset into first page pushes the end of the data 2654319436Sslm * beyond end of the 5th page, we need the extra PRP 2655319436Sslm * list. 2656319436Sslm */ 2657319436Sslm if (first_page_data_size < end_residual) 2658319436Sslm build_native_sgl = 1; 2659319436Sslm 2660319436Sslm /* 2661319436Sslm * Check if first SG entry size is < residual beyond 4 2662319436Sslm * pages. 2663319436Sslm */ 2664319436Sslm if (htole32(segs[0].ds_len) < 2665319436Sslm (buff_len - (PAGE_SIZE * 4))) 2666319436Sslm build_native_sgl = 1; 2667319436Sslm } 2668319436Sslm } 2669319436Sslm 2670319436Sslm /* check if native SGL is needed */ 2671319436Sslm if (!build_native_sgl) 2672319436Sslm return 1; 2673319436Sslm 2674319436Sslm /* 2675319436Sslm * Native SGL is needed. 2676319436Sslm * Put a chain element in main message frame that points to the first 2677319436Sslm * chain buffer. 2678319436Sslm * 2679319436Sslm * NOTE: The ChainOffset field must be 0 when using a chain pointer to 2680319436Sslm * a native SGL. 2681319436Sslm */ 2682319436Sslm 2683319436Sslm /* Set main message chain element pointer */ 2684319436Sslm main_chain_element = (pMpi25IeeeSgeChain64_t)cm->cm_sge; 2685319436Sslm 2686319436Sslm /* 2687319436Sslm * For NVMe the chain element needs to be the 2nd SGL entry in the main 2688319436Sslm * message. 2689319436Sslm */ 2690319436Sslm main_chain_element = (Mpi25IeeeSgeChain64_t *) 2691319436Sslm ((uint8_t *)main_chain_element + sizeof(MPI25_IEEE_SGE_CHAIN64)); 2692319436Sslm 2693319436Sslm /* 2694319436Sslm * For the PRP entries, use the specially allocated buffer of 2695319436Sslm * contiguous memory. PRP Page allocation failures should not happen 2696319436Sslm * because there should be enough PRP page buffers to account for the 2697319436Sslm * possible NVMe QDepth. 2698319436Sslm */ 2699319436Sslm prp_page_info = mpr_alloc_prp_page(sc); 2700319436Sslm KASSERT(prp_page_info != NULL, ("%s: There are no PRP Pages left to be " 2701319436Sslm "used for building a native NVMe SGL.\n", __func__)); 2702319436Sslm curr_buff = (uint32_t *)prp_page_info->prp_page; 2703319436Sslm msg_phys = (uint64_t *)(uintptr_t)prp_page_info->prp_page_busaddr; 2704319436Sslm 2705319436Sslm /* 2706319436Sslm * Insert the allocated PRP page into the command's PRP page list. This 2707319436Sslm * will be freed when the command is freed. 2708319436Sslm */ 2709319436Sslm TAILQ_INSERT_TAIL(&cm->cm_prp_page_list, prp_page_info, prp_page_link); 2710319436Sslm 2711319436Sslm /* 2712319436Sslm * Check if we are within 1 entry of a page boundary we don't want our 2713319436Sslm * first entry to be a PRP List entry. 2714319436Sslm */ 2715319436Sslm page_mask_result = (uintptr_t)((uint8_t *)curr_buff + prp_size) & 2716319436Sslm page_mask; 2717319436Sslm if (!page_mask_result) { 2718319436Sslm /* Bump up to next page boundary. */ 2719319436Sslm curr_buff = (uint32_t *)((uint8_t *)curr_buff + prp_size); 2720319436Sslm msg_phys = (uint64_t *)((uint8_t *)msg_phys + prp_size); 2721319436Sslm } 2722319436Sslm 2723319436Sslm /* Fill in the chain element and make it an NVMe segment type. */ 2724319436Sslm main_chain_element->Address.High = 2725319436Sslm htole32((uint32_t)((uint64_t)(uintptr_t)msg_phys >> 32)); 2726319436Sslm main_chain_element->Address.Low = 2727319436Sslm htole32((uint32_t)(uintptr_t)msg_phys); 2728319436Sslm main_chain_element->NextChainOffset = 0; 2729319436Sslm main_chain_element->Flags = MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT | 2730319436Sslm MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR | 2731319436Sslm MPI26_IEEE_SGE_FLAGS_NSF_NVME_PRP; 2732319436Sslm 2733319436Sslm /* Set SGL pointer to start of contiguous PCIe buffer. */ 2734319436Sslm ptr_sgl = curr_buff; 2735319436Sslm sge_dwords = 2; 2736319436Sslm num_entries = 0; 2737319436Sslm 2738319436Sslm /* 2739319436Sslm * NVMe has a very convoluted PRP format. One PRP is required for each 2740319436Sslm * page or partial page. We need to split up OS SG entries if they are 2741319436Sslm * longer than one page or cross a page boundary. We also have to insert 2742319436Sslm * a PRP list pointer entry as the last entry in each physical page of 2743319436Sslm * the PRP list. 2744319436Sslm * 2745319436Sslm * NOTE: The first PRP "entry" is actually placed in the first SGL entry 2746319436Sslm * in the main message in IEEE 64 format. The 2nd entry in the main 2747319436Sslm * message is the chain element, and the rest of the PRP entries are 2748319436Sslm * built in the contiguous PCIe buffer. 2749319436Sslm */ 2750319436Sslm first_prp_entry = 1; 2751319436Sslm ptr_first_sgl = (uint32_t *)cm->cm_sge; 2752319436Sslm 2753319436Sslm for (i = 0; i < segs_left; i++) { 2754319436Sslm /* Get physical address and length of this SG entry. */ 2755319436Sslm paddr = segs[i].ds_addr; 2756319436Sslm length = segs[i].ds_len; 2757319436Sslm 2758319436Sslm /* 2759319436Sslm * Check whether a given SGE buffer lies on a non-PAGED 2760319436Sslm * boundary if this is not the first page. If so, this is not 2761319436Sslm * expected so have FW build the SGL. 2762319436Sslm */ 2763319436Sslm if (i) { 2764319436Sslm if ((uint32_t)paddr & page_mask) { 2765319436Sslm mpr_dprint(sc, MPR_ERROR, "Unaligned SGE while " 2766319436Sslm "building NVMe PRPs, low address is 0x%x\n", 2767319436Sslm (uint32_t)paddr); 2768319436Sslm return 1; 2769319436Sslm } 2770319436Sslm } 2771319436Sslm 2772319436Sslm /* Apart from last SGE, if any other SGE boundary is not page 2773319436Sslm * aligned then it means that hole exists. Existence of hole 2774319436Sslm * leads to data corruption. So fallback to IEEE SGEs. 2775319436Sslm */ 2776319436Sslm if (i != (segs_left - 1)) { 2777319436Sslm if (((uint32_t)paddr + length) & page_mask) { 2778319436Sslm mpr_dprint(sc, MPR_ERROR, "Unaligned SGE " 2779319436Sslm "boundary while building NVMe PRPs, low " 2780319436Sslm "address: 0x%x and length: %u\n", 2781319436Sslm (uint32_t)paddr, length); 2782319436Sslm return 1; 2783319436Sslm } 2784319436Sslm } 2785319436Sslm 2786319436Sslm /* Loop while the length is not zero. */ 2787319436Sslm while (length) { 2788319436Sslm /* 2789319436Sslm * Check if we need to put a list pointer here if we are 2790319436Sslm * at page boundary - prp_size. 2791319436Sslm */ 2792319436Sslm page_mask_result = (uintptr_t)((uint8_t *)ptr_sgl + 2793319436Sslm prp_size) & page_mask; 2794319436Sslm if (!page_mask_result) { 2795319436Sslm /* 2796319436Sslm * Need to put a PRP list pointer here. 2797319436Sslm */ 2798319436Sslm msg_phys = (uint64_t *)((uint8_t *)msg_phys + 2799319436Sslm prp_size); 2800319436Sslm *ptr_sgl = htole32((uintptr_t)msg_phys); 2801319436Sslm *(ptr_sgl+1) = htole32((uint64_t)(uintptr_t) 2802319436Sslm msg_phys >> 32); 2803319436Sslm ptr_sgl += sge_dwords; 2804319436Sslm num_entries++; 2805319436Sslm } 2806319436Sslm 2807319436Sslm /* Need to handle if entry will be part of a page. */ 2808319436Sslm offset = (uint32_t)paddr & page_mask; 2809319436Sslm entry_len = PAGE_SIZE - offset; 2810319436Sslm if (first_prp_entry) { 2811319436Sslm /* 2812319436Sslm * Put IEEE entry in first SGE in main message. 2813319436Sslm * (Simple element, System addr, not end of 2814319436Sslm * list.) 2815319436Sslm */ 2816319436Sslm *ptr_first_sgl = htole32((uint32_t)paddr); 2817319436Sslm *(ptr_first_sgl + 1) = 2818319436Sslm htole32((uint32_t)((uint64_t)paddr >> 32)); 2819319436Sslm *(ptr_first_sgl + 2) = htole32(entry_len); 2820319436Sslm *(ptr_first_sgl + 3) = 0; 2821319436Sslm 2822319436Sslm /* No longer the first PRP entry. */ 2823319436Sslm first_prp_entry = 0; 2824319436Sslm } else { 2825319436Sslm /* Put entry in list. */ 2826319436Sslm *ptr_sgl = htole32((uint32_t)paddr); 2827319436Sslm *(ptr_sgl + 1) = 2828319436Sslm htole32((uint32_t)((uint64_t)paddr >> 32)); 2829319436Sslm 2830319436Sslm /* Bump ptr_sgl, msg_phys, and num_entries. */ 2831319436Sslm ptr_sgl += sge_dwords; 2832319436Sslm msg_phys = (uint64_t *)((uint8_t *)msg_phys + 2833319436Sslm prp_size); 2834319436Sslm num_entries++; 2835319436Sslm } 2836319436Sslm 2837319436Sslm /* Bump the phys address by the entry_len. */ 2838319436Sslm paddr += entry_len; 2839319436Sslm 2840319436Sslm /* Decrement length accounting for last partial page. */ 2841319436Sslm if (entry_len > length) 2842319436Sslm length = 0; 2843319436Sslm else 2844319436Sslm length -= entry_len; 2845319436Sslm } 2846319436Sslm } 2847319436Sslm 2848319436Sslm /* Set chain element Length. */ 2849319436Sslm main_chain_element->Length = htole32(num_entries * prp_size); 2850319436Sslm 2851319436Sslm /* Return 0, indicating we built a native SGL. */ 2852319436Sslm return 0; 2853319436Sslm} 2854319436Sslm 2855319436Sslm/* 2856265236Sken * Add a chain element as the next SGE for the specified command. 2857265236Sken * Reset cm_sge and cm_sgesize to indicate all the available space. Chains are 2858265236Sken * only required for IEEE commands. Therefore there is no code for commands 2859283990Sslm * that have the MPR_CM_FLAGS_SGE_SIMPLE flag set (and those commands 2860283990Sslm * shouldn't be requesting chains). 2861265236Sken */ 2862265236Skenstatic int 2863265236Skenmpr_add_chain(struct mpr_command *cm, int segsleft) 2864265236Sken{ 2865265236Sken struct mpr_softc *sc = cm->cm_sc; 2866265236Sken MPI2_REQUEST_HEADER *req; 2867265236Sken MPI25_IEEE_SGE_CHAIN64 *ieee_sgc; 2868265236Sken struct mpr_chain *chain; 2869299962Sslm int sgc_size, current_segs, rem_segs, segs_per_frame; 2870265236Sken uint8_t next_chain_offset = 0; 2871265236Sken 2872265236Sken /* 2873265236Sken * Fail if a command is requesting a chain for SIMPLE SGE's. For SAS3 2874265236Sken * only IEEE commands should be requesting chains. Return some error 2875265236Sken * code other than 0. 2876265236Sken */ 2877265236Sken if (cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE) { 2878265236Sken mpr_dprint(sc, MPR_ERROR, "A chain element cannot be added to " 2879265236Sken "an MPI SGL.\n"); 2880265236Sken return(ENOBUFS); 2881265236Sken } 2882265236Sken 2883265236Sken sgc_size = sizeof(MPI25_IEEE_SGE_CHAIN64); 2884265236Sken if (cm->cm_sglsize < sgc_size) 2885265236Sken panic("MPR: Need SGE Error Code\n"); 2886265236Sken 2887265236Sken chain = mpr_alloc_chain(cm->cm_sc); 2888265236Sken if (chain == NULL) 2889265236Sken return (ENOBUFS); 2890265236Sken 2891265236Sken /* 2892265236Sken * Note: a double-linked list is used to make it easier to walk for 2893265236Sken * debugging. 2894265236Sken */ 2895265236Sken TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link); 2896265236Sken 2897265236Sken /* 2898265236Sken * Need to know if the number of frames left is more than 1 or not. If 2899265236Sken * more than 1 frame is required, NextChainOffset will need to be set, 2900265236Sken * which will just be the last segment of the frame. 2901265236Sken */ 2902265236Sken rem_segs = 0; 2903265236Sken if (cm->cm_sglsize < (sgc_size * segsleft)) { 2904265236Sken /* 2905265236Sken * rem_segs is the number of segements remaining after the 2906265236Sken * segments that will go into the current frame. Since it is 2907265236Sken * known that at least one more frame is required, account for 2908265236Sken * the chain element. To know if more than one more frame is 2909265236Sken * required, just check if there will be a remainder after using 2910265236Sken * the current frame (with this chain) and the next frame. If 2911265236Sken * so the NextChainOffset must be the last element of the next 2912265236Sken * frame. 2913265236Sken */ 2914265236Sken current_segs = (cm->cm_sglsize / sgc_size) - 1; 2915265236Sken rem_segs = segsleft - current_segs; 2916299962Sslm segs_per_frame = sc->chain_frame_size / sgc_size; 2917265236Sken if (rem_segs > segs_per_frame) { 2918265236Sken next_chain_offset = segs_per_frame - 1; 2919265236Sken } 2920265236Sken } 2921265236Sken ieee_sgc = &((MPI25_SGE_IO_UNION *)cm->cm_sge)->IeeeChain; 2922299962Sslm ieee_sgc->Length = next_chain_offset ? 2923299962Sslm htole32((uint32_t)sc->chain_frame_size) : 2924265236Sken htole32((uint32_t)rem_segs * (uint32_t)sgc_size); 2925265236Sken ieee_sgc->NextChainOffset = next_chain_offset; 2926265236Sken ieee_sgc->Flags = (MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT | 2927265236Sken MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR); 2928265236Sken ieee_sgc->Address.Low = htole32(chain->chain_busaddr); 2929265236Sken ieee_sgc->Address.High = htole32(chain->chain_busaddr >> 32); 2930265236Sken cm->cm_sge = &((MPI25_SGE_IO_UNION *)chain->chain)->IeeeSimple; 2931265236Sken req = (MPI2_REQUEST_HEADER *)cm->cm_req; 2932299962Sslm req->ChainOffset = (sc->chain_frame_size - sgc_size) >> 4; 2933265236Sken 2934299962Sslm cm->cm_sglsize = sc->chain_frame_size; 2935265236Sken return (0); 2936265236Sken} 2937265236Sken 2938265236Sken/* 2939265236Sken * Add one scatter-gather element to the scatter-gather list for a command. 2940283990Sslm * Maintain cm_sglsize and cm_sge as the remaining size and pointer to the 2941283990Sslm * next SGE to fill in, respectively. In Gen3, the MPI SGL does not have a 2942283990Sslm * chain, so don't consider any chain additions. 2943265236Sken */ 2944265236Skenint 2945265236Skenmpr_push_sge(struct mpr_command *cm, MPI2_SGE_SIMPLE64 *sge, size_t len, 2946265236Sken int segsleft) 2947265236Sken{ 2948265236Sken uint32_t saved_buf_len, saved_address_low, saved_address_high; 2949265236Sken u32 sge_flags; 2950265236Sken 2951265236Sken /* 2952265236Sken * case 1: >=1 more segment, no room for anything (error) 2953265236Sken * case 2: 1 more segment and enough room for it 2954265236Sken */ 2955265236Sken 2956265236Sken if (cm->cm_sglsize < (segsleft * sizeof(MPI2_SGE_SIMPLE64))) { 2957265236Sken mpr_dprint(cm->cm_sc, MPR_ERROR, 2958265236Sken "%s: warning: Not enough room for MPI SGL in frame.\n", 2959265236Sken __func__); 2960265236Sken return(ENOBUFS); 2961265236Sken } 2962265236Sken 2963265236Sken KASSERT(segsleft == 1, 2964265236Sken ("segsleft cannot be more than 1 for an MPI SGL; segsleft = %d\n", 2965265236Sken segsleft)); 2966265236Sken 2967265236Sken /* 2968265236Sken * There is one more segment left to add for the MPI SGL and there is 2969265236Sken * enough room in the frame to add it. This is the normal case because 2970265236Sken * MPI SGL's don't have chains, otherwise something is wrong. 2971265236Sken * 2972265236Sken * If this is a bi-directional request, need to account for that 2973265236Sken * here. Save the pre-filled sge values. These will be used 2974265236Sken * either for the 2nd SGL or for a single direction SGL. If 2975265236Sken * cm_out_len is non-zero, this is a bi-directional request, so 2976265236Sken * fill in the OUT SGL first, then the IN SGL, otherwise just 2977265236Sken * fill in the IN SGL. Note that at this time, when filling in 2978265236Sken * 2 SGL's for a bi-directional request, they both use the same 2979265236Sken * DMA buffer (same cm command). 2980265236Sken */ 2981265236Sken saved_buf_len = sge->FlagsLength & 0x00FFFFFF; 2982265236Sken saved_address_low = sge->Address.Low; 2983265236Sken saved_address_high = sge->Address.High; 2984265236Sken if (cm->cm_out_len) { 2985265236Sken sge->FlagsLength = cm->cm_out_len | 2986265236Sken ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2987265236Sken MPI2_SGE_FLAGS_END_OF_BUFFER | 2988265236Sken MPI2_SGE_FLAGS_HOST_TO_IOC | 2989265236Sken MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2990265236Sken MPI2_SGE_FLAGS_SHIFT); 2991265236Sken cm->cm_sglsize -= len; 2992265236Sken /* Endian Safe code */ 2993265236Sken sge_flags = sge->FlagsLength; 2994265236Sken sge->FlagsLength = htole32(sge_flags); 2995265236Sken sge->Address.High = htole32(sge->Address.High); 2996265236Sken sge->Address.Low = htole32(sge->Address.Low); 2997265236Sken bcopy(sge, cm->cm_sge, len); 2998265236Sken cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2999265236Sken } 3000265236Sken sge->FlagsLength = saved_buf_len | 3001265236Sken ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 3002265236Sken MPI2_SGE_FLAGS_END_OF_BUFFER | 3003265236Sken MPI2_SGE_FLAGS_LAST_ELEMENT | 3004265236Sken MPI2_SGE_FLAGS_END_OF_LIST | 3005265236Sken MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 3006265236Sken MPI2_SGE_FLAGS_SHIFT); 3007265236Sken if (cm->cm_flags & MPR_CM_FLAGS_DATAIN) { 3008265236Sken sge->FlagsLength |= 3009265236Sken ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) << 3010265236Sken MPI2_SGE_FLAGS_SHIFT); 3011265236Sken } else { 3012265236Sken sge->FlagsLength |= 3013265236Sken ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) << 3014265236Sken MPI2_SGE_FLAGS_SHIFT); 3015265236Sken } 3016265236Sken sge->Address.Low = saved_address_low; 3017265236Sken sge->Address.High = saved_address_high; 3018265236Sken 3019265236Sken cm->cm_sglsize -= len; 3020265236Sken /* Endian Safe code */ 3021265236Sken sge_flags = sge->FlagsLength; 3022265236Sken sge->FlagsLength = htole32(sge_flags); 3023265236Sken sge->Address.High = htole32(sge->Address.High); 3024265236Sken sge->Address.Low = htole32(sge->Address.Low); 3025265236Sken bcopy(sge, cm->cm_sge, len); 3026265236Sken cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 3027265236Sken return (0); 3028265236Sken} 3029265236Sken 3030265236Sken/* 3031265236Sken * Add one IEEE scatter-gather element (chain or simple) to the IEEE scatter- 3032265236Sken * gather list for a command. Maintain cm_sglsize and cm_sge as the 3033265236Sken * remaining size and pointer to the next SGE to fill in, respectively. 3034265236Sken */ 3035265236Skenint 3036265236Skenmpr_push_ieee_sge(struct mpr_command *cm, void *sgep, int segsleft) 3037265236Sken{ 3038265236Sken MPI2_IEEE_SGE_SIMPLE64 *sge = sgep; 3039265236Sken int error, ieee_sge_size = sizeof(MPI25_SGE_IO_UNION); 3040265236Sken uint32_t saved_buf_len, saved_address_low, saved_address_high; 3041265236Sken uint32_t sge_length; 3042265236Sken 3043265236Sken /* 3044265236Sken * case 1: No room for chain or segment (error). 3045265236Sken * case 2: Two or more segments left but only room for chain. 3046265236Sken * case 3: Last segment and room for it, so set flags. 3047265236Sken */ 3048265236Sken 3049265236Sken /* 3050265236Sken * There should be room for at least one element, or there is a big 3051265236Sken * problem. 3052265236Sken */ 3053265236Sken if (cm->cm_sglsize < ieee_sge_size) 3054265236Sken panic("MPR: Need SGE Error Code\n"); 3055265236Sken 3056265236Sken if ((segsleft >= 2) && (cm->cm_sglsize < (ieee_sge_size * 2))) { 3057265236Sken if ((error = mpr_add_chain(cm, segsleft)) != 0) 3058265236Sken return (error); 3059265236Sken } 3060265236Sken 3061265236Sken if (segsleft == 1) { 3062265236Sken /* 3063265236Sken * If this is a bi-directional request, need to account for that 3064265236Sken * here. Save the pre-filled sge values. These will be used 3065265236Sken * either for the 2nd SGL or for a single direction SGL. If 3066265236Sken * cm_out_len is non-zero, this is a bi-directional request, so 3067265236Sken * fill in the OUT SGL first, then the IN SGL, otherwise just 3068265236Sken * fill in the IN SGL. Note that at this time, when filling in 3069265236Sken * 2 SGL's for a bi-directional request, they both use the same 3070265236Sken * DMA buffer (same cm command). 3071265236Sken */ 3072265236Sken saved_buf_len = sge->Length; 3073265236Sken saved_address_low = sge->Address.Low; 3074265236Sken saved_address_high = sge->Address.High; 3075265236Sken if (cm->cm_out_len) { 3076265236Sken sge->Length = cm->cm_out_len; 3077265236Sken sge->Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT | 3078265236Sken MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR); 3079265236Sken cm->cm_sglsize -= ieee_sge_size; 3080265236Sken /* Endian Safe code */ 3081265236Sken sge_length = sge->Length; 3082265236Sken sge->Length = htole32(sge_length); 3083265236Sken sge->Address.High = htole32(sge->Address.High); 3084265236Sken sge->Address.Low = htole32(sge->Address.Low); 3085265236Sken bcopy(sgep, cm->cm_sge, ieee_sge_size); 3086265236Sken cm->cm_sge = 3087265236Sken (MPI25_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + 3088265236Sken ieee_sge_size); 3089265236Sken } 3090265236Sken sge->Length = saved_buf_len; 3091265236Sken sge->Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT | 3092265236Sken MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR | 3093265236Sken MPI25_IEEE_SGE_FLAGS_END_OF_LIST); 3094265236Sken sge->Address.Low = saved_address_low; 3095265236Sken sge->Address.High = saved_address_high; 3096265236Sken } 3097265236Sken 3098265236Sken cm->cm_sglsize -= ieee_sge_size; 3099265236Sken /* Endian Safe code */ 3100265236Sken sge_length = sge->Length; 3101265236Sken sge->Length = htole32(sge_length); 3102265236Sken sge->Address.High = htole32(sge->Address.High); 3103265236Sken sge->Address.Low = htole32(sge->Address.Low); 3104265236Sken bcopy(sgep, cm->cm_sge, ieee_sge_size); 3105265236Sken cm->cm_sge = (MPI25_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + 3106265236Sken ieee_sge_size); 3107265236Sken return (0); 3108265236Sken} 3109265236Sken 3110265236Sken/* 3111265236Sken * Add one dma segment to the scatter-gather list for a command. 3112265236Sken */ 3113265236Skenint 3114265236Skenmpr_add_dmaseg(struct mpr_command *cm, vm_paddr_t pa, size_t len, u_int flags, 3115265236Sken int segsleft) 3116265236Sken{ 3117265236Sken MPI2_SGE_SIMPLE64 sge; 3118265236Sken MPI2_IEEE_SGE_SIMPLE64 ieee_sge; 3119265236Sken 3120265236Sken if (!(cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE)) { 3121265236Sken ieee_sge.Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT | 3122265236Sken MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR); 3123265236Sken ieee_sge.Length = len; 3124265236Sken mpr_from_u64(pa, &ieee_sge.Address); 3125265236Sken 3126265236Sken return (mpr_push_ieee_sge(cm, &ieee_sge, segsleft)); 3127265236Sken } else { 3128265236Sken /* 3129265236Sken * This driver always uses 64-bit address elements for 3130265236Sken * simplicity. 3131265236Sken */ 3132265236Sken flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 3133265236Sken MPI2_SGE_FLAGS_64_BIT_ADDRESSING; 3134265236Sken /* Set Endian safe macro in mpr_push_sge */ 3135265236Sken sge.FlagsLength = len | (flags << MPI2_SGE_FLAGS_SHIFT); 3136265236Sken mpr_from_u64(pa, &sge.Address); 3137265236Sken 3138265236Sken return (mpr_push_sge(cm, &sge, sizeof sge, segsleft)); 3139265236Sken } 3140265236Sken} 3141265236Sken 3142265236Skenstatic void 3143265236Skenmpr_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 3144265236Sken{ 3145265236Sken struct mpr_softc *sc; 3146265236Sken struct mpr_command *cm; 3147265236Sken u_int i, dir, sflags; 3148265236Sken 3149265236Sken cm = (struct mpr_command *)arg; 3150265236Sken sc = cm->cm_sc; 3151265236Sken 3152265236Sken /* 3153265236Sken * In this case, just print out a warning and let the chip tell the 3154265236Sken * user they did the wrong thing. 3155265236Sken */ 3156265236Sken if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) { 3157299962Sslm mpr_dprint(sc, MPR_ERROR, "%s: warning: busdma returned %d " 3158299962Sslm "segments, more than the %d allowed\n", __func__, nsegs, 3159299962Sslm cm->cm_max_segs); 3160265236Sken } 3161265236Sken 3162265236Sken /* 3163265236Sken * Set up DMA direction flags. Bi-directional requests are also handled 3164265236Sken * here. In that case, both direction flags will be set. 3165265236Sken */ 3166265236Sken sflags = 0; 3167265236Sken if (cm->cm_flags & MPR_CM_FLAGS_SMP_PASS) { 3168265236Sken /* 3169265236Sken * We have to add a special case for SMP passthrough, there 3170265236Sken * is no easy way to generically handle it. The first 3171265236Sken * S/G element is used for the command (therefore the 3172265236Sken * direction bit needs to be set). The second one is used 3173265236Sken * for the reply. We'll leave it to the caller to make 3174265236Sken * sure we only have two buffers. 3175265236Sken */ 3176265236Sken /* 3177265236Sken * Even though the busdma man page says it doesn't make 3178265236Sken * sense to have both direction flags, it does in this case. 3179265236Sken * We have one s/g element being accessed in each direction. 3180265236Sken */ 3181265236Sken dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD; 3182265236Sken 3183265236Sken /* 3184265236Sken * Set the direction flag on the first buffer in the SMP 3185265236Sken * passthrough request. We'll clear it for the second one. 3186265236Sken */ 3187265236Sken sflags |= MPI2_SGE_FLAGS_DIRECTION | 3188265236Sken MPI2_SGE_FLAGS_END_OF_BUFFER; 3189265236Sken } else if (cm->cm_flags & MPR_CM_FLAGS_DATAOUT) { 3190265236Sken sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC; 3191265236Sken dir = BUS_DMASYNC_PREWRITE; 3192265236Sken } else 3193265236Sken dir = BUS_DMASYNC_PREREAD; 3194265236Sken 3195319436Sslm /* Check if a native SG list is needed for an NVMe PCIe device. */ 3196319436Sslm if (cm->cm_targ && cm->cm_targ->is_nvme && 3197319436Sslm mpr_check_pcie_native_sgl(sc, cm, segs, nsegs) == 0) { 3198319436Sslm /* A native SG list was built, skip to end. */ 3199319436Sslm goto out; 3200319436Sslm } 3201319436Sslm 3202265236Sken for (i = 0; i < nsegs; i++) { 3203265236Sken if ((cm->cm_flags & MPR_CM_FLAGS_SMP_PASS) && (i != 0)) { 3204265236Sken sflags &= ~MPI2_SGE_FLAGS_DIRECTION; 3205265236Sken } 3206265236Sken error = mpr_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len, 3207265236Sken sflags, nsegs - i); 3208265236Sken if (error != 0) { 3209265236Sken /* Resource shortage, roll back! */ 3210265236Sken if (ratecheck(&sc->lastfail, &mpr_chainfail_interval)) 3211265236Sken mpr_dprint(sc, MPR_INFO, "Out of chain frames, " 3212265236Sken "consider increasing hw.mpr.max_chains.\n"); 3213265236Sken cm->cm_flags |= MPR_CM_FLAGS_CHAIN_FAILED; 3214265236Sken mpr_complete_command(sc, cm); 3215265236Sken return; 3216265236Sken } 3217265236Sken } 3218265236Sken 3219319436Sslmout: 3220265236Sken bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); 3221265236Sken mpr_enqueue_request(sc, cm); 3222265236Sken 3223265236Sken return; 3224265236Sken} 3225265236Sken 3226265236Skenstatic void 3227265236Skenmpr_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, 3228265236Sken int error) 3229265236Sken{ 3230265236Sken mpr_data_cb(arg, segs, nsegs, error); 3231265236Sken} 3232265236Sken 3233265236Sken/* 3234265236Sken * This is the routine to enqueue commands ansynchronously. 3235265236Sken * Note that the only error path here is from bus_dmamap_load(), which can 3236265236Sken * return EINPROGRESS if it is waiting for resources. Other than this, it's 3237265236Sken * assumed that if you have a command in-hand, then you have enough credits 3238265236Sken * to use it. 3239265236Sken */ 3240265236Skenint 3241265236Skenmpr_map_command(struct mpr_softc *sc, struct mpr_command *cm) 3242265236Sken{ 3243265236Sken int error = 0; 3244265236Sken 3245265236Sken if (cm->cm_flags & MPR_CM_FLAGS_USE_UIO) { 3246265236Sken error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap, 3247265236Sken &cm->cm_uio, mpr_data_cb2, cm, 0); 3248265236Sken } else if (cm->cm_flags & MPR_CM_FLAGS_USE_CCB) { 3249265236Sken error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap, 3250265236Sken cm->cm_data, mpr_data_cb, cm, 0); 3251265236Sken } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { 3252265236Sken error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap, 3253265236Sken cm->cm_data, cm->cm_length, mpr_data_cb, cm, 0); 3254265236Sken } else { 3255265236Sken /* Add a zero-length element as needed */ 3256265236Sken if (cm->cm_sge != NULL) 3257265236Sken mpr_add_dmaseg(cm, 0, 0, 0, 1); 3258265236Sken mpr_enqueue_request(sc, cm); 3259265236Sken } 3260265236Sken 3261265236Sken return (error); 3262265236Sken} 3263265236Sken 3264265236Sken/* 3265265236Sken * This is the routine to enqueue commands synchronously. An error of 3266265236Sken * EINPROGRESS from mpr_map_command() is ignored since the command will 3267265236Sken * be executed and enqueued automatically. Other errors come from msleep(). 3268265236Sken */ 3269265236Skenint 3270322661Skenmpr_wait_command(struct mpr_softc *sc, struct mpr_command **cmp, int timeout, 3271265236Sken int sleep_flag) 3272265236Sken{ 3273265236Sken int error, rc; 3274265236Sken struct timeval cur_time, start_time; 3275322661Sken struct mpr_command *cm = *cmp; 3276265236Sken 3277265236Sken if (sc->mpr_flags & MPR_FLAGS_DIAGRESET) 3278265236Sken return EBUSY; 3279265236Sken 3280265236Sken cm->cm_complete = NULL; 3281265236Sken cm->cm_flags |= (MPR_CM_FLAGS_WAKEUP + MPR_CM_FLAGS_POLLED); 3282265236Sken error = mpr_map_command(sc, cm); 3283265236Sken if ((error != 0) && (error != EINPROGRESS)) 3284265236Sken return (error); 3285265236Sken 3286265236Sken // Check for context and wait for 50 mSec at a time until time has 3287265236Sken // expired or the command has finished. If msleep can't be used, need 3288265236Sken // to poll. 3289265236Sken#if __FreeBSD_version >= 1000029 3290265236Sken if (curthread->td_no_sleeping) 3291265236Sken#else //__FreeBSD_version < 1000029 3292265236Sken if (curthread->td_pflags & TDP_NOSLEEPING) 3293265236Sken#endif //__FreeBSD_version >= 1000029 3294265236Sken sleep_flag = NO_SLEEP; 3295321416Sken getmicrouptime(&start_time); 3296265236Sken if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) { 3297265236Sken error = msleep(cm, &sc->mpr_mtx, 0, "mprwait", timeout*hz); 3298321416Sken if (error == EWOULDBLOCK) { 3299321416Sken /* 3300321416Sken * Record the actual elapsed time in the case of a 3301321416Sken * timeout for the message below. 3302321416Sken */ 3303321416Sken getmicrouptime(&cur_time); 3304321416Sken timevalsub(&cur_time, &start_time); 3305321416Sken } 3306265236Sken } else { 3307265236Sken while ((cm->cm_flags & MPR_CM_FLAGS_COMPLETE) == 0) { 3308265236Sken mpr_intr_locked(sc); 3309265236Sken if (sleep_flag == CAN_SLEEP) 3310265236Sken pause("mprwait", hz/20); 3311265236Sken else 3312265236Sken DELAY(50000); 3313265236Sken 3314321416Sken getmicrouptime(&cur_time); 3315321416Sken timevalsub(&cur_time, &start_time); 3316321416Sken if (cur_time.tv_sec > timeout) { 3317265236Sken error = EWOULDBLOCK; 3318265236Sken break; 3319265236Sken } 3320265236Sken } 3321265236Sken } 3322265236Sken 3323265236Sken if (error == EWOULDBLOCK) { 3324321416Sken mpr_dprint(sc, MPR_FAULT, "Calling Reinit from %s, timeout=%d," 3325321416Sken " elapsed=%jd\n", __func__, timeout, 3326321416Sken (intmax_t)cur_time.tv_sec); 3327265236Sken rc = mpr_reinit(sc); 3328265236Sken mpr_dprint(sc, MPR_FAULT, "Reinit %s\n", (rc == 0) ? "success" : 3329265236Sken "failed"); 3330322661Sken if (sc->mpr_flags & MPR_FLAGS_REALLOCATED) { 3331322661Sken /* 3332322661Sken * Tell the caller that we freed the command in a 3333322661Sken * reinit. 3334322661Sken */ 3335322661Sken *cmp = NULL; 3336322661Sken } 3337265236Sken error = ETIMEDOUT; 3338265236Sken } 3339265236Sken return (error); 3340265236Sken} 3341265236Sken 3342265236Sken/* 3343265236Sken * This is the routine to enqueue a command synchonously and poll for 3344265236Sken * completion. Its use should be rare. 3345265236Sken */ 3346265236Skenint 3347322661Skenmpr_request_polled(struct mpr_softc *sc, struct mpr_command **cmp) 3348265236Sken{ 3349322661Sken int error, rc; 3350265236Sken struct timeval cur_time, start_time; 3351322661Sken struct mpr_command *cm = *cmp; 3352265236Sken 3353265236Sken error = 0; 3354265236Sken 3355265236Sken cm->cm_flags |= MPR_CM_FLAGS_POLLED; 3356265236Sken cm->cm_complete = NULL; 3357265236Sken mpr_map_command(sc, cm); 3358265236Sken 3359322661Sken getmicrouptime(&start_time); 3360265236Sken while ((cm->cm_flags & MPR_CM_FLAGS_COMPLETE) == 0) { 3361265236Sken mpr_intr_locked(sc); 3362265236Sken 3363265236Sken if (mtx_owned(&sc->mpr_mtx)) 3364265236Sken msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, 3365265236Sken "mprpoll", hz/20); 3366265236Sken else 3367265236Sken pause("mprpoll", hz/20); 3368265236Sken 3369265236Sken /* 3370265236Sken * Check for real-time timeout and fail if more than 60 seconds. 3371265236Sken */ 3372322661Sken getmicrouptime(&cur_time); 3373322661Sken timevalsub(&cur_time, &start_time); 3374322661Sken if (cur_time.tv_sec > 60) { 3375265236Sken mpr_dprint(sc, MPR_FAULT, "polling failed\n"); 3376265236Sken error = ETIMEDOUT; 3377265236Sken break; 3378265236Sken } 3379265236Sken } 3380265236Sken 3381283990Sslm if (error) { 3382265236Sken mpr_dprint(sc, MPR_FAULT, "Calling Reinit from %s\n", __func__); 3383265236Sken rc = mpr_reinit(sc); 3384299962Sslm mpr_dprint(sc, MPR_FAULT, "Reinit %s\n", (rc == 0) ? "success" : 3385299962Sslm "failed"); 3386322661Sken 3387322661Sken if (sc->mpr_flags & MPR_FLAGS_REALLOCATED) { 3388322661Sken /* 3389322661Sken * Tell the caller that we freed the command in a 3390322661Sken * reinit. 3391322661Sken */ 3392322661Sken *cmp = NULL; 3393322661Sken } 3394265236Sken } 3395265236Sken return (error); 3396265236Sken} 3397265236Sken 3398265236Sken/* 3399265236Sken * The MPT driver had a verbose interface for config pages. In this driver, 3400265236Sken * reduce it to much simplier terms, similar to the Linux driver. 3401265236Sken */ 3402265236Skenint 3403265236Skenmpr_read_config_page(struct mpr_softc *sc, struct mpr_config_params *params) 3404265236Sken{ 3405265236Sken MPI2_CONFIG_REQUEST *req; 3406265236Sken struct mpr_command *cm; 3407265236Sken int error; 3408265236Sken 3409265236Sken if (sc->mpr_flags & MPR_FLAGS_BUSY) { 3410265236Sken return (EBUSY); 3411265236Sken } 3412265236Sken 3413265236Sken cm = mpr_alloc_command(sc); 3414265236Sken if (cm == NULL) { 3415265236Sken return (EBUSY); 3416265236Sken } 3417265236Sken 3418265236Sken req = (MPI2_CONFIG_REQUEST *)cm->cm_req; 3419265236Sken req->Function = MPI2_FUNCTION_CONFIG; 3420265236Sken req->Action = params->action; 3421265236Sken req->SGLFlags = 0; 3422265236Sken req->ChainOffset = 0; 3423265236Sken req->PageAddress = params->page_address; 3424265236Sken if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3425265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; 3426265236Sken 3427265236Sken hdr = ¶ms->hdr.Ext; 3428265236Sken req->ExtPageType = hdr->ExtPageType; 3429265236Sken req->ExtPageLength = hdr->ExtPageLength; 3430265236Sken req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; 3431265236Sken req->Header.PageLength = 0; /* Must be set to zero */ 3432265236Sken req->Header.PageNumber = hdr->PageNumber; 3433265236Sken req->Header.PageVersion = hdr->PageVersion; 3434265236Sken } else { 3435265236Sken MPI2_CONFIG_PAGE_HEADER *hdr; 3436265236Sken 3437265236Sken hdr = ¶ms->hdr.Struct; 3438265236Sken req->Header.PageType = hdr->PageType; 3439265236Sken req->Header.PageNumber = hdr->PageNumber; 3440265236Sken req->Header.PageLength = hdr->PageLength; 3441265236Sken req->Header.PageVersion = hdr->PageVersion; 3442265236Sken } 3443265236Sken 3444265236Sken cm->cm_data = params->buffer; 3445265236Sken cm->cm_length = params->length; 3446283990Sslm if (cm->cm_data != NULL) { 3447283990Sslm cm->cm_sge = &req->PageBufferSGE; 3448283990Sslm cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); 3449283990Sslm cm->cm_flags = MPR_CM_FLAGS_SGE_SIMPLE | MPR_CM_FLAGS_DATAIN; 3450283990Sslm } else 3451283990Sslm cm->cm_sge = NULL; 3452265236Sken cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 3453265236Sken 3454265236Sken cm->cm_complete_data = params; 3455265236Sken if (params->callback != NULL) { 3456265236Sken cm->cm_complete = mpr_config_complete; 3457265236Sken return (mpr_map_command(sc, cm)); 3458265236Sken } else { 3459322661Sken error = mpr_wait_command(sc, &cm, 0, CAN_SLEEP); 3460265236Sken if (error) { 3461265236Sken mpr_dprint(sc, MPR_FAULT, 3462265236Sken "Error %d reading config page\n", error); 3463322661Sken if (cm != NULL) 3464322661Sken mpr_free_command(sc, cm); 3465265236Sken return (error); 3466265236Sken } 3467265236Sken mpr_config_complete(sc, cm); 3468265236Sken } 3469265236Sken 3470265236Sken return (0); 3471265236Sken} 3472265236Sken 3473265236Skenint 3474265236Skenmpr_write_config_page(struct mpr_softc *sc, struct mpr_config_params *params) 3475265236Sken{ 3476265236Sken return (EINVAL); 3477265236Sken} 3478265236Sken 3479265236Skenstatic void 3480265236Skenmpr_config_complete(struct mpr_softc *sc, struct mpr_command *cm) 3481265236Sken{ 3482265236Sken MPI2_CONFIG_REPLY *reply; 3483265236Sken struct mpr_config_params *params; 3484265236Sken 3485265236Sken MPR_FUNCTRACE(sc); 3486265236Sken params = cm->cm_complete_data; 3487265236Sken 3488265236Sken if (cm->cm_data != NULL) { 3489265236Sken bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, 3490265236Sken BUS_DMASYNC_POSTREAD); 3491265236Sken bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); 3492265236Sken } 3493265236Sken 3494265236Sken /* 3495265236Sken * XXX KDM need to do more error recovery? This results in the 3496265236Sken * device in question not getting probed. 3497265236Sken */ 3498265236Sken if ((cm->cm_flags & MPR_CM_FLAGS_ERROR_MASK) != 0) { 3499265236Sken params->status = MPI2_IOCSTATUS_BUSY; 3500265236Sken goto done; 3501265236Sken } 3502265236Sken 3503265236Sken reply = (MPI2_CONFIG_REPLY *)cm->cm_reply; 3504265236Sken if (reply == NULL) { 3505265236Sken params->status = MPI2_IOCSTATUS_BUSY; 3506265236Sken goto done; 3507265236Sken } 3508265236Sken params->status = reply->IOCStatus; 3509283990Sslm if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3510265236Sken params->hdr.Ext.ExtPageType = reply->ExtPageType; 3511265236Sken params->hdr.Ext.ExtPageLength = reply->ExtPageLength; 3512283990Sslm params->hdr.Ext.PageType = reply->Header.PageType; 3513283990Sslm params->hdr.Ext.PageNumber = reply->Header.PageNumber; 3514283990Sslm params->hdr.Ext.PageVersion = reply->Header.PageVersion; 3515265236Sken } else { 3516265236Sken params->hdr.Struct.PageType = reply->Header.PageType; 3517265236Sken params->hdr.Struct.PageNumber = reply->Header.PageNumber; 3518265236Sken params->hdr.Struct.PageLength = reply->Header.PageLength; 3519265236Sken params->hdr.Struct.PageVersion = reply->Header.PageVersion; 3520265236Sken } 3521265236Sken 3522265236Skendone: 3523265236Sken mpr_free_command(sc, cm); 3524265236Sken if (params->callback != NULL) 3525265236Sken params->callback(sc, params); 3526265236Sken 3527265236Sken return; 3528265236Sken} 3529