1163516Simp/*- 2163516Simp * Copyright (c) 2006 Bernd Walter. All rights reserved. 3163516Simp * Copyright (c) 2006 M. Warner Losh. All rights reserved. 4318495Smarius * Copyright (c) 2017 Marius Strobl <marius@FreeBSD.org> 5163516Simp * 6163516Simp * Redistribution and use in source and binary forms, with or without 7163516Simp * modification, are permitted provided that the following conditions 8163516Simp * are met: 9163516Simp * 1. Redistributions of source code must retain the above copyright 10163516Simp * notice, this list of conditions and the following disclaimer. 11163516Simp * 2. Redistributions in binary form must reproduce the above copyright 12163516Simp * notice, this list of conditions and the following disclaimer in the 13163516Simp * documentation and/or other materials provided with the distribution. 14163516Simp * 15163516Simp * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16163516Simp * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17163516Simp * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18163516Simp * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19163516Simp * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20163516Simp * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21163516Simp * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22163516Simp * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23163516Simp * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24163516Simp * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25170002Simp * 26170002Simp * Portions of this software may have been developed with reference to 27170002Simp * the SD Simplified Specification. The following disclaimer may apply: 28170002Simp * 29170002Simp * The following conditions apply to the release of the simplified 30170002Simp * specification ("Simplified Specification") by the SD Card Association and 31170002Simp * the SD Group. The Simplified Specification is a subset of the complete SD 32170002Simp * Specification which is owned by the SD Card Association and the SD 33170002Simp * Group. This Simplified Specification is provided on a non-confidential 34170002Simp * basis subject to the disclaimers below. Any implementation of the 35170002Simp * Simplified Specification may require a license from the SD Card 36170002Simp * Association, SD Group, SD-3C LLC or other third parties. 37170002Simp * 38170002Simp * Disclaimers: 39170002Simp * 40170002Simp * The information contained in the Simplified Specification is presented only 41170002Simp * as a standard specification for SD Cards and SD Host/Ancillary products and 42170002Simp * is provided "AS-IS" without any representations or warranties of any 43170002Simp * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD 44170002Simp * Card Association for any damages, any infringements of patents or other 45170002Simp * right of the SD Group, SD-3C LLC, the SD Card Association or any third 46170002Simp * parties, which may result from its use. No license is granted by 47170002Simp * implication, estoppel or otherwise under any patent or other rights of the 48170002Simp * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing 49170002Simp * herein shall be construed as an obligation by the SD Group, the SD-3C LLC 50170002Simp * or the SD Card Association to disclose or distribute any technical 51170002Simp * information, know-how or other confidential information to any third party. 52163516Simp */ 53163516Simp 54163516Simp#include <sys/cdefs.h> 55163516Simp__FBSDID("$FreeBSD: stable/10/sys/dev/mmc/mmc.c 340741 2018-11-21 18:54:38Z marius $"); 56163516Simp 57163516Simp#include <sys/param.h> 58163516Simp#include <sys/systm.h> 59163516Simp#include <sys/kernel.h> 60163516Simp#include <sys/malloc.h> 61163516Simp#include <sys/lock.h> 62163516Simp#include <sys/module.h> 63163516Simp#include <sys/mutex.h> 64163516Simp#include <sys/bus.h> 65183704Smav#include <sys/endian.h> 66187875Smav#include <sys/sysctl.h> 67276288Sian#include <sys/time.h> 68163516Simp 69318198Smarius#include <dev/mmc/bridge.h> 70318198Smarius#include <dev/mmc/mmc_private.h> 71318198Smarius#include <dev/mmc/mmc_subr.h> 72163516Simp#include <dev/mmc/mmcreg.h> 73163516Simp#include <dev/mmc/mmcbrvar.h> 74163516Simp#include <dev/mmc/mmcvar.h> 75318198Smarius 76163516Simp#include "mmcbr_if.h" 77163516Simp#include "mmcbus_if.h" 78163516Simp 79318495SmariusCTASSERT(bus_timing_max <= sizeof(uint32_t) * NBBY); 80318495Smarius 81163516Simp/* 82163516Simp * Per-card data 83163516Simp */ 84163516Simpstruct mmc_ivars { 85163516Simp uint32_t raw_cid[4]; /* Raw bits of the CID */ 86163516Simp uint32_t raw_csd[4]; /* Raw bits of the CSD */ 87183704Smav uint32_t raw_scr[2]; /* Raw bits of the SCR */ 88318198Smarius uint8_t raw_ext_csd[MMC_EXTCSD_SIZE]; /* Raw bits of the EXT_CSD */ 89184033Smav uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */ 90163516Simp uint16_t rca; 91322120Smarius u_char read_only; /* True when the device is read-only */ 92322120Smarius u_char high_cap; /* High Capacity device (block addressed) */ 93163516Simp enum mmc_card_mode mode; 94322120Smarius enum mmc_bus_width bus_width; /* Bus width to use */ 95163516Simp struct mmc_cid cid; /* cid decoded */ 96163516Simp struct mmc_csd csd; /* csd decoded */ 97183704Smav struct mmc_scr scr; /* scr decoded */ 98184033Smav struct mmc_sd_status sd_status; /* SD_STATUS decoded */ 99183731Smav uint32_t sec_count; /* Card capacity in 512byte blocks */ 100318495Smarius uint32_t timings; /* Mask of bus timings supported */ 101318495Smarius uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */ 102318495Smarius uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */ 103183704Smav uint32_t tran_speed; /* Max speed in normal mode */ 104183704Smav uint32_t hs_tran_speed; /* Max speed in high speed mode */ 105184033Smav uint32_t erase_sector; /* Card native erase sector size */ 106318198Smarius uint32_t cmd6_time; /* Generic switch timeout [us] */ 107322389Smarius uint32_t quirks; /* Quirks as per mmc_quirk->quirks */ 108234524Smarius char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ 109269795Sian char card_sn_string[16];/* Formatted serial # for disk->d_ident */ 110163516Simp}; 111163516Simp 112318198Smarius#define CMD_RETRIES 3 113163516Simp 114322389Smariusstatic const struct mmc_quirk mmc_quirks[] = { 115322389Smarius /* 116322389Smarius * For some SanDisk iNAND devices, the CMD38 argument needs to be 117322389Smarius * provided in EXT_CSD[113]. 118322389Smarius */ 119322389Smarius { 0x2, 0x100, "SEM02G", MMC_QUIRK_INAND_CMD38 }, 120322389Smarius { 0x2, 0x100, "SEM04G", MMC_QUIRK_INAND_CMD38 }, 121322389Smarius { 0x2, 0x100, "SEM08G", MMC_QUIRK_INAND_CMD38 }, 122322389Smarius { 0x2, 0x100, "SEM16G", MMC_QUIRK_INAND_CMD38 }, 123322389Smarius { 0x2, 0x100, "SEM32G", MMC_QUIRK_INAND_CMD38 }, 124322389Smarius 125322389Smarius /* 126322389Smarius * Disable TRIM for Kingston eMMCs where a firmware bug can lead to 127322389Smarius * unrecoverable data corruption. 128322389Smarius */ 129322389Smarius { 0x70, MMC_QUIRK_OID_ANY, "V10008", MMC_QUIRK_BROKEN_TRIM }, 130322389Smarius { 0x70, MMC_QUIRK_OID_ANY, "V10016", MMC_QUIRK_BROKEN_TRIM }, 131322389Smarius 132322389Smarius { 0x0, 0x0, NULL, 0x0 } 133322389Smarius}; 134322389Smarius 135227309Sedstatic SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD, NULL, "mmc driver"); 136187875Smav 137188044Simpstatic int mmc_debug; 138318157SmariusTUNABLE_INT("hw.mmc.debug", &mmc_debug); 139318198SmariusSYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RWTUN, &mmc_debug, 0, 140318198Smarius "Debug level"); 141187875Smav 142163516Simp/* bus entry points */ 143236491Smariusstatic int mmc_acquire_bus(device_t busdev, device_t dev); 144163516Simpstatic int mmc_attach(device_t dev); 145236491Smariusstatic int mmc_child_location_str(device_t dev, device_t child, char *buf, 146236491Smarius size_t buflen); 147163516Simpstatic int mmc_detach(device_t dev); 148236491Smariusstatic int mmc_probe(device_t dev); 149236491Smariusstatic int mmc_read_ivar(device_t bus, device_t child, int which, 150236491Smarius uintptr_t *result); 151236491Smariusstatic int mmc_release_bus(device_t busdev, device_t dev); 152236491Smariusstatic int mmc_resume(device_t dev); 153322120Smariusstatic void mmc_retune_pause(device_t busdev, device_t dev, bool retune); 154322120Smariusstatic void mmc_retune_unpause(device_t busdev, device_t dev); 155185721Smavstatic int mmc_suspend(device_t dev); 156322120Smariusstatic int mmc_wait_for_request(device_t busdev, device_t dev, 157236491Smarius struct mmc_request *req); 158236491Smariusstatic int mmc_write_ivar(device_t bus, device_t child, int which, 159236491Smarius uintptr_t value); 160163516Simp 161318198Smarius#define MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 162163516Simp#define MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 163318198Smarius#define MMC_LOCK_INIT(_sc) \ 164318198Smarius mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->dev), \ 165163516Simp "mmc", MTX_DEF) 166318198Smarius#define MMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx); 167318198Smarius#define MMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED); 168318198Smarius#define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED); 169163516Simp 170236491Smariusstatic int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid); 171236491Smariusstatic void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr); 172236491Smariusstatic void mmc_app_decode_sd_status(uint32_t *raw_sd_status, 173236491Smarius struct mmc_sd_status *sd_status); 174236491Smariusstatic int mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, 175236491Smarius uint32_t *rawsdstatus); 176236491Smariusstatic int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, 177236491Smarius uint32_t *rawscr); 178183763Smavstatic int mmc_calculate_clock(struct mmc_softc *sc); 179318198Smariusstatic void mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, 180318198Smarius bool is_4_41p); 181236491Smariusstatic void mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid); 182236491Smariusstatic void mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd); 183322120Smariusstatic int mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd); 184236491Smariusstatic void mmc_delayed_attach(void *xsc); 185322120Smariusstatic int mmc_delete_cards(struct mmc_softc *sc, bool final); 186236491Smariusstatic void mmc_discover_cards(struct mmc_softc *sc); 187236491Smariusstatic void mmc_format_card_id_string(struct mmc_ivars *ivar); 188236491Smariusstatic void mmc_go_discovery(struct mmc_softc *sc); 189236491Smariusstatic uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start, 190236491Smarius int size); 191236491Smariusstatic int mmc_highest_voltage(uint32_t ocr); 192322120Smariusstatic bool mmc_host_timing(device_t dev, enum mmc_bus_timing timing); 193236491Smariusstatic void mmc_idle_cards(struct mmc_softc *sc); 194236491Smariusstatic void mmc_ms_delay(int ms); 195236491Smariusstatic void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard); 196183449Simpstatic void mmc_power_down(struct mmc_softc *sc); 197236491Smariusstatic void mmc_power_up(struct mmc_softc *sc); 198236491Smariusstatic void mmc_rescan_cards(struct mmc_softc *sc); 199322120Smariusstatic int mmc_retune(device_t busdev, device_t dev, bool reset); 200236491Smariusstatic void mmc_scan(struct mmc_softc *sc); 201236491Smariusstatic int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, 202236491Smarius uint8_t value, uint8_t *res); 203236491Smariusstatic int mmc_select_card(struct mmc_softc *sc, uint16_t rca); 204236491Smariusstatic uint32_t mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr); 205236491Smariusstatic int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, 206236491Smarius uint32_t *rocr); 207236491Smariusstatic int mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd); 208236491Smariusstatic int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs); 209236491Smariusstatic int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, 210236491Smarius uint32_t *rocr); 211236491Smariusstatic int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp); 212236491Smariusstatic int mmc_set_blocklen(struct mmc_softc *sc, uint32_t len); 213322120Smariusstatic int mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar, 214322120Smarius enum mmc_bus_timing timing); 215318495Smariusstatic int mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar); 216236491Smariusstatic int mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp); 217318198Smariusstatic int mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar, 218318495Smarius enum mmc_bus_timing timing); 219322120Smariusstatic int mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar, 220322120Smarius enum mmc_bus_timing timing); 221322120Smariusstatic int mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar, 222322120Smarius uint32_t clock); 223322120Smariusstatic int mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar, 224322120Smarius uint32_t max_dtr, enum mmc_bus_timing max_timing); 225236491Smariusstatic int mmc_test_bus_width(struct mmc_softc *sc); 226318495Smariusstatic uint32_t mmc_timing_to_dtr(struct mmc_ivars *ivar, 227318495Smarius enum mmc_bus_timing timing); 228318495Smariusstatic const char *mmc_timing_to_string(enum mmc_bus_timing timing); 229322120Smariusstatic void mmc_update_child_list(struct mmc_softc *sc); 230163516Simpstatic int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 231163516Simp uint32_t arg, uint32_t flags, uint32_t *resp, int retries); 232236491Smariusstatic int mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req); 233236491Smariusstatic void mmc_wakeup(struct mmc_request *req); 234163516Simp 235163516Simpstatic void 236163516Simpmmc_ms_delay(int ms) 237163516Simp{ 238236491Smarius 239163516Simp DELAY(1000 * ms); /* XXX BAD */ 240163516Simp} 241163516Simp 242163516Simpstatic int 243163516Simpmmc_probe(device_t dev) 244163516Simp{ 245163516Simp 246183445Simp device_set_desc(dev, "MMC/SD bus"); 247163516Simp return (0); 248163516Simp} 249163516Simp 250163516Simpstatic int 251163516Simpmmc_attach(device_t dev) 252163516Simp{ 253163516Simp struct mmc_softc *sc; 254163516Simp 255163516Simp sc = device_get_softc(dev); 256163516Simp sc->dev = dev; 257163516Simp MMC_LOCK_INIT(sc); 258163516Simp 259163516Simp /* We'll probe and attach our children later, but before / mount */ 260163516Simp sc->config_intrhook.ich_func = mmc_delayed_attach; 261163516Simp sc->config_intrhook.ich_arg = sc; 262163516Simp if (config_intrhook_establish(&sc->config_intrhook) != 0) 263163516Simp device_printf(dev, "config_intrhook_establish failed\n"); 264163516Simp return (0); 265163516Simp} 266163516Simp 267163516Simpstatic int 268163516Simpmmc_detach(device_t dev) 269163516Simp{ 270169567Simp struct mmc_softc *sc = device_get_softc(dev); 271185721Smav int err; 272169567Simp 273322120Smarius err = mmc_delete_cards(sc, true); 274322120Smarius if (err != 0) 275185721Smav return (err); 276183449Simp mmc_power_down(sc); 277169567Simp MMC_LOCK_DESTROY(sc); 278169567Simp 279183467Simp return (0); 280163516Simp} 281163516Simp 282163516Simpstatic int 283185721Smavmmc_suspend(device_t dev) 284185721Smav{ 285185721Smav struct mmc_softc *sc = device_get_softc(dev); 286185721Smav int err; 287185721Smav 288185721Smav err = bus_generic_suspend(dev); 289322120Smarius if (err != 0) 290318198Smarius return (err); 291322120Smarius /* 292322120Smarius * We power down with the bus acquired here, mainly so that no device 293322120Smarius * is selected any longer and sc->last_rca gets set to 0. Otherwise, 294322120Smarius * the deselect as part of the bus acquisition in mmc_scan() may fail 295322120Smarius * during resume, as the bus isn't powered up again before later in 296322120Smarius * mmc_go_discovery(). 297322120Smarius */ 298322120Smarius err = mmc_acquire_bus(dev, dev); 299322120Smarius if (err != 0) 300322120Smarius return (err); 301185721Smav mmc_power_down(sc); 302322120Smarius err = mmc_release_bus(dev, dev); 303322120Smarius return (err); 304185721Smav} 305185721Smav 306185721Smavstatic int 307185721Smavmmc_resume(device_t dev) 308185721Smav{ 309185721Smav struct mmc_softc *sc = device_get_softc(dev); 310185721Smav 311185721Smav mmc_scan(sc); 312185721Smav return (bus_generic_resume(dev)); 313185721Smav} 314185721Smav 315185721Smavstatic int 316163516Simpmmc_acquire_bus(device_t busdev, device_t dev) 317163516Simp{ 318163516Simp struct mmc_softc *sc; 319183704Smav struct mmc_ivars *ivar; 320322120Smarius int err; 321322120Smarius uint16_t rca; 322318495Smarius enum mmc_bus_timing timing; 323163516Simp 324183452Simp err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev); 325163516Simp if (err) 326163516Simp return (err); 327163516Simp sc = device_get_softc(busdev); 328163516Simp MMC_LOCK(sc); 329163516Simp if (sc->owner) 330236156Smarius panic("mmc: host bridge didn't serialize us."); 331163516Simp sc->owner = dev; 332163516Simp MMC_UNLOCK(sc); 333163516Simp 334163516Simp if (busdev != dev) { 335183453Simp /* 336183453Simp * Keep track of the last rca that we've selected. If 337183453Simp * we're asked to do it again, don't. We never 338183453Simp * unselect unless the bus code itself wants the mmc 339183453Simp * bus, and constantly reselecting causes problems. 340183453Simp */ 341318198Smarius ivar = device_get_ivars(dev); 342318198Smarius rca = ivar->rca; 343163516Simp if (sc->last_rca != rca) { 344318495Smarius if (mmc_select_card(sc, rca) != MMC_ERR_NONE) { 345322120Smarius device_printf(busdev, "Card at relative " 346322120Smarius "address %d failed to select\n", rca); 347318495Smarius return (ENXIO); 348318495Smarius } 349163516Simp sc->last_rca = rca; 350318495Smarius timing = mmcbr_get_timing(busdev); 351322120Smarius /* 352322120Smarius * For eMMC modes, setting/updating bus width and VCCQ 353322120Smarius * only really is necessary if there actually is more 354322120Smarius * than one device on the bus as generally that already 355322120Smarius * had to be done by mmc_calculate_clock() or one of 356322120Smarius * its calees. Moreover, setting the bus width anew 357322120Smarius * can trigger re-tuning (via a CRC error on the next 358322120Smarius * CMD), even if not switching between devices an the 359322120Smarius * previously selected one is still tuned. Obviously, 360322120Smarius * we need to re-tune the host controller if devices 361322120Smarius * are actually switched, though. 362322120Smarius */ 363322120Smarius if (timing >= bus_timing_mmc_ddr52 && 364322120Smarius sc->child_count == 1) 365322120Smarius return (0); 366183704Smav /* Prepare bus width for the new card. */ 367187875Smav if (bootverbose || mmc_debug) { 368183763Smav device_printf(busdev, 369318495Smarius "setting bus width to %d bits %s timing\n", 370183775Simp (ivar->bus_width == bus_width_4) ? 4 : 371318495Smarius (ivar->bus_width == bus_width_8) ? 8 : 1, 372318495Smarius mmc_timing_to_string(timing)); 373183763Smav } 374322120Smarius if (mmc_set_card_bus_width(sc, ivar, timing) != 375322120Smarius MMC_ERR_NONE) { 376322120Smarius device_printf(busdev, "Card at relative " 377322120Smarius "address %d failed to set bus width\n", 378318495Smarius rca); 379318495Smarius return (ENXIO); 380318495Smarius } 381322120Smarius mmcbr_set_bus_width(busdev, ivar->bus_width); 382322120Smarius mmcbr_update_ios(busdev); 383322120Smarius if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) { 384322120Smarius device_printf(busdev, "Failed to set VCCQ " 385322120Smarius "for card at relative address %d\n", rca); 386318495Smarius return (ENXIO); 387318495Smarius } 388322120Smarius if (timing >= bus_timing_mmc_hs200 && 389322120Smarius mmc_retune(busdev, dev, true) != 0) { 390322120Smarius device_printf(busdev, "Card at relative " 391322120Smarius "address %d failed to re-tune\n", rca); 392318495Smarius return (ENXIO); 393318495Smarius } 394163516Simp } 395163516Simp } else { 396183453Simp /* 397183453Simp * If there's a card selected, stand down. 398183453Simp */ 399163516Simp if (sc->last_rca != 0) { 400322120Smarius if (mmc_select_card(sc, 0) != MMC_ERR_NONE) 401322120Smarius return (ENXIO); 402163516Simp sc->last_rca = 0; 403163516Simp } 404163516Simp } 405163516Simp 406163516Simp return (0); 407163516Simp} 408163516Simp 409163516Simpstatic int 410163516Simpmmc_release_bus(device_t busdev, device_t dev) 411163516Simp{ 412163516Simp struct mmc_softc *sc; 413163516Simp int err; 414163516Simp 415163516Simp sc = device_get_softc(busdev); 416163516Simp 417163516Simp MMC_LOCK(sc); 418163516Simp if (!sc->owner) 419163516Simp panic("mmc: releasing unowned bus."); 420163516Simp if (sc->owner != dev) 421163516Simp panic("mmc: you don't own the bus. game over."); 422163516Simp MMC_UNLOCK(sc); 423183452Simp err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev); 424163516Simp if (err) 425163516Simp return (err); 426163516Simp MMC_LOCK(sc); 427163516Simp sc->owner = NULL; 428163516Simp MMC_UNLOCK(sc); 429163516Simp return (0); 430163516Simp} 431163516Simp 432163516Simpstatic uint32_t 433163516Simpmmc_select_vdd(struct mmc_softc *sc, uint32_t ocr) 434163516Simp{ 435183446Simp 436183467Simp return (ocr & MMC_OCR_VOLTAGE); 437163516Simp} 438163516Simp 439163516Simpstatic int 440163516Simpmmc_highest_voltage(uint32_t ocr) 441163516Simp{ 442163516Simp int i; 443163516Simp 444245755Sgonzo for (i = MMC_OCR_MAX_VOLTAGE_SHIFT; 445245755Sgonzo i >= MMC_OCR_MIN_VOLTAGE_SHIFT; i--) 446163516Simp if (ocr & (1 << i)) 447183467Simp return (i); 448163516Simp return (-1); 449163516Simp} 450163516Simp 451163516Simpstatic void 452163516Simpmmc_wakeup(struct mmc_request *req) 453163516Simp{ 454163516Simp struct mmc_softc *sc; 455163516Simp 456163516Simp sc = (struct mmc_softc *)req->done_data; 457163516Simp MMC_LOCK(sc); 458163516Simp req->flags |= MMC_REQ_DONE; 459185721Smav MMC_UNLOCK(sc); 460163516Simp wakeup(req); 461163516Simp} 462163516Simp 463163516Simpstatic int 464163516Simpmmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req) 465163516Simp{ 466163516Simp 467163516Simp req->done = mmc_wakeup; 468163516Simp req->done_data = sc; 469322120Smarius if (__predict_false(mmc_debug > 1)) { 470187875Smav device_printf(sc->dev, "REQUEST: CMD%d arg %#x flags %#x", 471187875Smav req->cmd->opcode, req->cmd->arg, req->cmd->flags); 472187875Smav if (req->cmd->data) { 473187875Smav printf(" data %d\n", (int)req->cmd->data->len); 474187875Smav } else 475187875Smav printf("\n"); 476187875Smav } 477163516Simp MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req); 478163516Simp MMC_LOCK(sc); 479185721Smav while ((req->flags & MMC_REQ_DONE) == 0) 480185721Smav msleep(req, &sc->sc_mtx, 0, "mmcreq", 0); 481163516Simp MMC_UNLOCK(sc); 482322120Smarius if (__predict_false(mmc_debug > 2 || (mmc_debug > 0 && 483322120Smarius req->cmd->error != MMC_ERR_NONE))) 484312400Smarius device_printf(sc->dev, "CMD%d RESULT: %d\n", 485254431Sian req->cmd->opcode, req->cmd->error); 486185721Smav return (0); 487163516Simp} 488163516Simp 489163516Simpstatic int 490322120Smariusmmc_wait_for_request(device_t busdev, device_t dev, struct mmc_request *req) 491163516Simp{ 492322120Smarius struct mmc_softc *sc; 493322120Smarius struct mmc_ivars *ivar; 494322120Smarius int err, i; 495322120Smarius enum mmc_retune_req retune_req; 496163516Simp 497322120Smarius sc = device_get_softc(busdev); 498322120Smarius KASSERT(sc->owner != NULL, 499322120Smarius ("%s: Request from %s without bus being acquired.", __func__, 500322120Smarius device_get_nameunit(dev))); 501322120Smarius 502322120Smarius /* 503322120Smarius * Unless no device is selected or re-tuning is already ongoing, 504322120Smarius * execute re-tuning if a) the bridge is requesting to do so and 505322120Smarius * re-tuning hasn't been otherwise paused, or b) if a child asked 506322120Smarius * to be re-tuned prior to pausing (see also mmc_retune_pause()). 507322120Smarius */ 508322120Smarius if (__predict_false(sc->last_rca != 0 && sc->retune_ongoing == 0 && 509322120Smarius (((retune_req = mmcbr_get_retune_req(busdev)) != retune_req_none && 510322120Smarius sc->retune_paused == 0) || sc->retune_needed == 1))) { 511322120Smarius if (__predict_false(mmc_debug > 1)) { 512322120Smarius device_printf(busdev, 513322120Smarius "Re-tuning with%s circuit reset required\n", 514322120Smarius retune_req == retune_req_reset ? "" : "out"); 515322120Smarius } 516322120Smarius if (device_get_parent(dev) == busdev) 517322120Smarius ivar = device_get_ivars(dev); 518322120Smarius else { 519322120Smarius for (i = 0; i < sc->child_count; i++) { 520322120Smarius ivar = device_get_ivars(sc->child_list[i]); 521322120Smarius if (ivar->rca == sc->last_rca) 522322120Smarius break; 523322120Smarius } 524322120Smarius if (ivar->rca != sc->last_rca) 525322120Smarius return (EINVAL); 526322120Smarius } 527322120Smarius sc->retune_ongoing = 1; 528322120Smarius err = mmc_retune(busdev, dev, retune_req == retune_req_reset); 529322120Smarius sc->retune_ongoing = 0; 530322120Smarius switch (err) { 531322120Smarius case MMC_ERR_NONE: 532322120Smarius case MMC_ERR_FAILED: /* Re-tune error but still might work */ 533322120Smarius break; 534322120Smarius case MMC_ERR_BADCRC: /* Switch failure on HS400 recovery */ 535322120Smarius return (ENXIO); 536322120Smarius case MMC_ERR_INVALID: /* Driver implementation b0rken */ 537322120Smarius default: /* Unknown error, should not happen */ 538322120Smarius return (EINVAL); 539322120Smarius } 540322120Smarius sc->retune_needed = 0; 541322120Smarius } 542183467Simp return (mmc_wait_for_req(sc, req)); 543163516Simp} 544163516Simp 545163516Simpstatic int 546163516Simpmmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 547163516Simp uint32_t arg, uint32_t flags, uint32_t *resp, int retries) 548163516Simp{ 549163516Simp struct mmc_command cmd; 550163516Simp int err; 551163516Simp 552163516Simp memset(&cmd, 0, sizeof(cmd)); 553163516Simp cmd.opcode = opcode; 554163516Simp cmd.arg = arg; 555163516Simp cmd.flags = flags; 556183470Simp cmd.data = NULL; 557318198Smarius err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, retries); 558163516Simp if (err) 559163516Simp return (err); 560163516Simp if (resp) { 561163516Simp if (flags & MMC_RSP_136) 562163516Simp memcpy(resp, cmd.resp, 4 * sizeof(uint32_t)); 563163516Simp else 564163516Simp *resp = cmd.resp[0]; 565163516Simp } 566163516Simp return (0); 567163516Simp} 568163516Simp 569163516Simpstatic void 570163516Simpmmc_idle_cards(struct mmc_softc *sc) 571163516Simp{ 572163516Simp device_t dev; 573163516Simp struct mmc_command cmd; 574312400Smarius 575163516Simp dev = sc->dev; 576163516Simp mmcbr_set_chip_select(dev, cs_high); 577163516Simp mmcbr_update_ios(dev); 578163516Simp mmc_ms_delay(1); 579163516Simp 580163516Simp memset(&cmd, 0, sizeof(cmd)); 581163516Simp cmd.opcode = MMC_GO_IDLE_STATE; 582163516Simp cmd.arg = 0; 583163516Simp cmd.flags = MMC_RSP_NONE | MMC_CMD_BC; 584183470Simp cmd.data = NULL; 585318198Smarius mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 586163516Simp mmc_ms_delay(1); 587163516Simp 588163516Simp mmcbr_set_chip_select(dev, cs_dontcare); 589163516Simp mmcbr_update_ios(dev); 590163516Simp mmc_ms_delay(1); 591163516Simp} 592163516Simp 593163516Simpstatic int 594163516Simpmmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 595163516Simp{ 596163516Simp struct mmc_command cmd; 597163516Simp int err = MMC_ERR_NONE, i; 598163516Simp 599163516Simp memset(&cmd, 0, sizeof(cmd)); 600163516Simp cmd.opcode = ACMD_SD_SEND_OP_COND; 601163516Simp cmd.arg = ocr; 602163516Simp cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 603183470Simp cmd.data = NULL; 604163516Simp 605216941Spjd for (i = 0; i < 1000; i++) { 606318198Smarius err = mmc_wait_for_app_cmd(sc->dev, sc->dev, 0, &cmd, 607318198Smarius CMD_RETRIES); 608163516Simp if (err != MMC_ERR_NONE) 609163516Simp break; 610183709Smav if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 611183709Smav (ocr & MMC_OCR_VOLTAGE) == 0) 612163516Simp break; 613163516Simp err = MMC_ERR_TIMEOUT; 614163516Simp mmc_ms_delay(10); 615163516Simp } 616163516Simp if (rocr && err == MMC_ERR_NONE) 617163516Simp *rocr = cmd.resp[0]; 618183467Simp return (err); 619163516Simp} 620163516Simp 621163516Simpstatic int 622163516Simpmmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 623163516Simp{ 624163516Simp struct mmc_command cmd; 625163516Simp int err = MMC_ERR_NONE, i; 626163516Simp 627163516Simp memset(&cmd, 0, sizeof(cmd)); 628163516Simp cmd.opcode = MMC_SEND_OP_COND; 629163516Simp cmd.arg = ocr; 630163516Simp cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 631183470Simp cmd.data = NULL; 632163516Simp 633216941Spjd for (i = 0; i < 1000; i++) { 634318198Smarius err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 635163516Simp if (err != MMC_ERR_NONE) 636163516Simp break; 637183709Smav if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 638183709Smav (ocr & MMC_OCR_VOLTAGE) == 0) 639163516Simp break; 640163516Simp err = MMC_ERR_TIMEOUT; 641163516Simp mmc_ms_delay(10); 642163516Simp } 643163516Simp if (rocr && err == MMC_ERR_NONE) 644163516Simp *rocr = cmd.resp[0]; 645183467Simp return (err); 646163516Simp} 647163516Simp 648183704Smavstatic int 649183704Smavmmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs) 650183704Smav{ 651183704Smav struct mmc_command cmd; 652183704Smav int err; 653183704Smav 654183704Smav memset(&cmd, 0, sizeof(cmd)); 655183704Smav cmd.opcode = SD_SEND_IF_COND; 656183704Smav cmd.arg = (vhs << 8) + 0xAA; 657183704Smav cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR; 658183704Smav cmd.data = NULL; 659183704Smav 660318198Smarius err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 661183704Smav return (err); 662183704Smav} 663183704Smav 664163516Simpstatic void 665163516Simpmmc_power_up(struct mmc_softc *sc) 666163516Simp{ 667163516Simp device_t dev; 668318495Smarius enum mmc_vccq vccq; 669163516Simp 670163516Simp dev = sc->dev; 671163516Simp mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev))); 672163516Simp mmcbr_set_bus_mode(dev, opendrain); 673163516Simp mmcbr_set_chip_select(dev, cs_dontcare); 674163516Simp mmcbr_set_bus_width(dev, bus_width_1); 675163516Simp mmcbr_set_power_mode(dev, power_up); 676163516Simp mmcbr_set_clock(dev, 0); 677163516Simp mmcbr_update_ios(dev); 678318495Smarius for (vccq = vccq_330; ; vccq--) { 679318495Smarius mmcbr_set_vccq(dev, vccq); 680318495Smarius if (mmcbr_switch_vccq(dev) == 0 || vccq == vccq_120) 681318495Smarius break; 682318495Smarius } 683163516Simp mmc_ms_delay(1); 684163516Simp 685318495Smarius mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY); 686183704Smav mmcbr_set_timing(dev, bus_timing_normal); 687163516Simp mmcbr_set_power_mode(dev, power_on); 688163516Simp mmcbr_update_ios(dev); 689163516Simp mmc_ms_delay(2); 690163516Simp} 691163516Simp 692183449Simpstatic void 693183449Simpmmc_power_down(struct mmc_softc *sc) 694183449Simp{ 695183449Simp device_t dev = sc->dev; 696183449Simp 697183449Simp mmcbr_set_bus_mode(dev, opendrain); 698183449Simp mmcbr_set_chip_select(dev, cs_dontcare); 699183449Simp mmcbr_set_bus_width(dev, bus_width_1); 700183449Simp mmcbr_set_power_mode(dev, power_off); 701183449Simp mmcbr_set_clock(dev, 0); 702183704Smav mmcbr_set_timing(dev, bus_timing_normal); 703183449Simp mmcbr_update_ios(dev); 704183449Simp} 705183449Simp 706183704Smavstatic int 707183704Smavmmc_select_card(struct mmc_softc *sc, uint16_t rca) 708183704Smav{ 709322120Smarius int err, flags; 710183775Simp 711183775Simp flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC; 712322120Smarius sc->retune_paused++; 713322120Smarius err = mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16, 714322120Smarius flags, NULL, CMD_RETRIES); 715322120Smarius sc->retune_paused--; 716322120Smarius return (err); 717183704Smav} 718183704Smav 719183704Smavstatic int 720188044Simpmmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value, 721188044Simp uint8_t *res) 722183704Smav{ 723183704Smav int err; 724183704Smav struct mmc_command cmd; 725183704Smav struct mmc_data data; 726183704Smav 727254432Sian memset(&cmd, 0, sizeof(cmd)); 728254432Sian memset(&data, 0, sizeof(data)); 729188044Simp memset(res, 0, 64); 730183704Smav 731183704Smav cmd.opcode = SD_SWITCH_FUNC; 732183704Smav cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 733188044Simp cmd.arg = mode << 31; /* 0 - check, 1 - set */ 734183704Smav cmd.arg |= 0x00FFFFFF; 735183705Smav cmd.arg &= ~(0xF << (grp * 4)); 736183705Smav cmd.arg |= value << (grp * 4); 737183704Smav cmd.data = &data; 738183704Smav 739183704Smav data.data = res; 740183704Smav data.len = 64; 741183704Smav data.flags = MMC_DATA_READ; 742183704Smav 743318198Smarius err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 744183704Smav return (err); 745183704Smav} 746183704Smav 747183704Smavstatic int 748322120Smariusmmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar, 749322120Smarius enum mmc_bus_timing timing) 750183704Smav{ 751187546Simp struct mmc_command cmd; 752183704Smav int err; 753187546Simp uint8_t value; 754183704Smav 755183704Smav if (mmcbr_get_mode(sc->dev) == mode_sd) { 756254432Sian memset(&cmd, 0, sizeof(cmd)); 757234524Smarius cmd.opcode = ACMD_SET_CLR_CARD_DETECT; 758234524Smarius cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 759234524Smarius cmd.arg = SD_CLR_CARD_DETECT; 760318198Smarius err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd, 761318198Smarius CMD_RETRIES); 762234524Smarius if (err != 0) 763234524Smarius return (err); 764254432Sian memset(&cmd, 0, sizeof(cmd)); 765183704Smav cmd.opcode = ACMD_SET_BUS_WIDTH; 766183704Smav cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 767318198Smarius switch (ivar->bus_width) { 768183704Smav case bus_width_1: 769183704Smav cmd.arg = SD_BUS_WIDTH_1; 770183704Smav break; 771183704Smav case bus_width_4: 772183704Smav cmd.arg = SD_BUS_WIDTH_4; 773183704Smav break; 774183704Smav default: 775183704Smav return (MMC_ERR_INVALID); 776183704Smav } 777318198Smarius err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd, 778318198Smarius CMD_RETRIES); 779183704Smav } else { 780318198Smarius switch (ivar->bus_width) { 781183704Smav case bus_width_1: 782322120Smarius if (timing == bus_timing_mmc_hs400 || 783322120Smarius timing == bus_timing_mmc_hs400es) 784322120Smarius return (MMC_ERR_INVALID); 785183704Smav value = EXT_CSD_BUS_WIDTH_1; 786183704Smav break; 787183704Smav case bus_width_4: 788322120Smarius switch (timing) { 789318495Smarius case bus_timing_mmc_ddr52: 790322120Smarius value = EXT_CSD_BUS_WIDTH_4_DDR; 791322120Smarius break; 792318495Smarius case bus_timing_mmc_hs400: 793318495Smarius case bus_timing_mmc_hs400es: 794322120Smarius return (MMC_ERR_INVALID); 795318495Smarius default: 796318495Smarius value = EXT_CSD_BUS_WIDTH_4; 797318495Smarius break; 798318495Smarius } 799183704Smav break; 800183704Smav case bus_width_8: 801322120Smarius value = 0; 802322120Smarius switch (timing) { 803322120Smarius case bus_timing_mmc_hs400es: 804322120Smarius value = EXT_CSD_BUS_WIDTH_ES; 805322120Smarius /* FALLTHROUGH */ 806318495Smarius case bus_timing_mmc_ddr52: 807318495Smarius case bus_timing_mmc_hs400: 808322120Smarius value |= EXT_CSD_BUS_WIDTH_8_DDR; 809318495Smarius break; 810318495Smarius default: 811318495Smarius value = EXT_CSD_BUS_WIDTH_8; 812318495Smarius break; 813318495Smarius } 814183704Smav break; 815183704Smav default: 816183704Smav return (MMC_ERR_INVALID); 817183704Smav } 818318198Smarius err = mmc_switch(sc->dev, sc->dev, ivar->rca, 819318198Smarius EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value, 820318198Smarius ivar->cmd6_time, true); 821183704Smav } 822183704Smav return (err); 823183704Smav} 824183704Smav 825183704Smavstatic int 826318495Smariusmmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar) 827183704Smav{ 828318495Smarius device_t dev; 829318495Smarius const uint8_t *ext_csd; 830318495Smarius uint32_t clock; 831318495Smarius uint8_t value; 832340741Smarius enum mmc_bus_timing timing; 833340741Smarius enum mmc_bus_width bus_width; 834183704Smav 835318495Smarius dev = sc->dev; 836340741Smarius timing = mmcbr_get_timing(dev); 837340741Smarius bus_width = ivar->bus_width; 838340741Smarius if (mmcbr_get_mode(dev) != mode_mmc || ivar->csd.spec_vers < 4 || 839340741Smarius timing == bus_timing_normal || bus_width == bus_width_1) 840318495Smarius return (MMC_ERR_NONE); 841318495Smarius 842318495Smarius value = 0; 843318495Smarius ext_csd = ivar->raw_ext_csd; 844318495Smarius clock = mmcbr_get_clock(dev); 845318495Smarius switch (1 << mmcbr_get_vdd(dev)) { 846318495Smarius case MMC_OCR_LOW_VOLTAGE: 847318495Smarius if (clock <= MMC_TYPE_HS_26_MAX) 848318495Smarius value = ext_csd[EXT_CSD_PWR_CL_26_195]; 849318495Smarius else if (clock <= MMC_TYPE_HS_52_MAX) { 850340741Smarius if (timing >= bus_timing_mmc_ddr52 && 851340741Smarius bus_width >= bus_width_4) 852318495Smarius value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR]; 853318495Smarius else 854318495Smarius value = ext_csd[EXT_CSD_PWR_CL_52_195]; 855318495Smarius } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) 856318495Smarius value = ext_csd[EXT_CSD_PWR_CL_200_195]; 857183704Smav break; 858318495Smarius case MMC_OCR_270_280: 859318495Smarius case MMC_OCR_280_290: 860318495Smarius case MMC_OCR_290_300: 861318495Smarius case MMC_OCR_300_310: 862318495Smarius case MMC_OCR_310_320: 863318495Smarius case MMC_OCR_320_330: 864318495Smarius case MMC_OCR_330_340: 865318495Smarius case MMC_OCR_340_350: 866318495Smarius case MMC_OCR_350_360: 867318495Smarius if (clock <= MMC_TYPE_HS_26_MAX) 868318495Smarius value = ext_csd[EXT_CSD_PWR_CL_26_360]; 869318495Smarius else if (clock <= MMC_TYPE_HS_52_MAX) { 870340741Smarius if (timing == bus_timing_mmc_ddr52 && 871340741Smarius bus_width >= bus_width_4) 872318495Smarius value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR]; 873318495Smarius else 874318495Smarius value = ext_csd[EXT_CSD_PWR_CL_52_360]; 875318495Smarius } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) { 876340741Smarius if (bus_width == bus_width_8) 877318495Smarius value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR]; 878318495Smarius else 879318495Smarius value = ext_csd[EXT_CSD_PWR_CL_200_360]; 880318495Smarius } 881183704Smav break; 882183704Smav default: 883318495Smarius device_printf(dev, "No power class support for VDD 0x%x\n", 884318495Smarius 1 << mmcbr_get_vdd(dev)); 885183704Smav return (MMC_ERR_INVALID); 886183704Smav } 887318495Smarius 888340741Smarius if (bus_width == bus_width_8) 889318495Smarius value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >> 890318495Smarius EXT_CSD_POWER_CLASS_8BIT_SHIFT; 891318495Smarius else 892318495Smarius value = (value & EXT_CSD_POWER_CLASS_4BIT_MASK) >> 893318495Smarius EXT_CSD_POWER_CLASS_4BIT_SHIFT; 894318495Smarius 895318495Smarius if (value == 0) 896318495Smarius return (MMC_ERR_NONE); 897318495Smarius 898318495Smarius return (mmc_switch(dev, dev, ivar->rca, EXT_CSD_CMD_SET_NORMAL, 899318495Smarius EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true)); 900318495Smarius} 901318495Smarius 902318495Smariusstatic int 903318495Smariusmmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar, 904318495Smarius enum mmc_bus_timing timing) 905318495Smarius{ 906318495Smarius u_char switch_res[64]; 907318495Smarius uint8_t value; 908318495Smarius int err; 909318495Smarius 910318198Smarius if (mmcbr_get_mode(sc->dev) == mode_sd) { 911318495Smarius switch (timing) { 912318495Smarius case bus_timing_normal: 913318495Smarius value = SD_SWITCH_NORMAL_MODE; 914318495Smarius break; 915318495Smarius case bus_timing_hs: 916318495Smarius value = SD_SWITCH_HS_MODE; 917318495Smarius break; 918318495Smarius default: 919318495Smarius return (MMC_ERR_INVALID); 920318495Smarius } 921188044Simp err = mmc_sd_switch(sc, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1, 922188044Simp value, switch_res); 923318198Smarius if (err != MMC_ERR_NONE) 924318198Smarius return (err); 925318198Smarius if ((switch_res[16] & 0xf) != value) 926318198Smarius return (MMC_ERR_FAILED); 927318198Smarius mmcbr_set_timing(sc->dev, timing); 928318198Smarius mmcbr_update_ios(sc->dev); 929318198Smarius } else { 930318495Smarius switch (timing) { 931318495Smarius case bus_timing_normal: 932318495Smarius value = EXT_CSD_HS_TIMING_BC; 933318495Smarius break; 934318495Smarius case bus_timing_hs: 935318495Smarius case bus_timing_mmc_ddr52: 936318495Smarius value = EXT_CSD_HS_TIMING_HS; 937318495Smarius break; 938322120Smarius case bus_timing_mmc_hs200: 939322120Smarius value = EXT_CSD_HS_TIMING_HS200; 940322120Smarius break; 941322120Smarius case bus_timing_mmc_hs400: 942322120Smarius case bus_timing_mmc_hs400es: 943322120Smarius value = EXT_CSD_HS_TIMING_HS400; 944322120Smarius break; 945318495Smarius default: 946318495Smarius return (MMC_ERR_INVALID); 947318495Smarius } 948318198Smarius err = mmc_switch(sc->dev, sc->dev, ivar->rca, 949318198Smarius EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, value, 950318198Smarius ivar->cmd6_time, false); 951318198Smarius if (err != MMC_ERR_NONE) 952318198Smarius return (err); 953318198Smarius mmcbr_set_timing(sc->dev, timing); 954318198Smarius mmcbr_update_ios(sc->dev); 955318198Smarius err = mmc_switch_status(sc->dev, sc->dev, ivar->rca, 956318198Smarius ivar->cmd6_time); 957318198Smarius } 958183704Smav return (err); 959183704Smav} 960183704Smav 961322120Smariusstatic int 962322120Smariusmmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar, 963322120Smarius enum mmc_bus_timing timing) 964322120Smarius{ 965322120Smarius 966322120Smarius if (isset(&ivar->vccq_120, timing)) 967322120Smarius mmcbr_set_vccq(sc->dev, vccq_120); 968322120Smarius else if (isset(&ivar->vccq_180, timing)) 969322120Smarius mmcbr_set_vccq(sc->dev, vccq_180); 970322120Smarius else 971322120Smarius mmcbr_set_vccq(sc->dev, vccq_330); 972322120Smarius if (mmcbr_switch_vccq(sc->dev) != 0) 973322120Smarius return (MMC_ERR_INVALID); 974322120Smarius else 975322120Smarius return (MMC_ERR_NONE); 976322120Smarius} 977322120Smarius 978318198Smariusstatic const uint8_t p8[8] = { 979318198Smarius 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 980318198Smarius}; 981318198Smarius 982318198Smariusstatic const uint8_t p8ok[8] = { 983318198Smarius 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 984318198Smarius}; 985318198Smarius 986318198Smariusstatic const uint8_t p4[4] = { 987318198Smarius 0x5A, 0x00, 0x00, 0x00 988318198Smarius}; 989318198Smarius 990318198Smariusstatic const uint8_t p4ok[4] = { 991318198Smarius 0xA5, 0x00, 0x00, 0x00 992318198Smarius}; 993318198Smarius 994183704Smavstatic int 995183704Smavmmc_test_bus_width(struct mmc_softc *sc) 996183704Smav{ 997183704Smav struct mmc_command cmd; 998183704Smav struct mmc_data data; 999318198Smarius uint8_t buf[8]; 1000183704Smav int err; 1001183704Smav 1002183704Smav if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) { 1003183704Smav mmcbr_set_bus_width(sc->dev, bus_width_8); 1004183704Smav mmcbr_update_ios(sc->dev); 1005183704Smav 1006276288Sian sc->squelched++; /* Errors are expected, squelch reporting. */ 1007254432Sian memset(&cmd, 0, sizeof(cmd)); 1008254432Sian memset(&data, 0, sizeof(data)); 1009183704Smav cmd.opcode = MMC_BUSTEST_W; 1010183704Smav cmd.arg = 0; 1011183704Smav cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1012183704Smav cmd.data = &data; 1013183704Smav 1014318198Smarius data.data = __DECONST(void *, p8); 1015183704Smav data.len = 8; 1016183704Smav data.flags = MMC_DATA_WRITE; 1017318198Smarius mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1018312400Smarius 1019254432Sian memset(&cmd, 0, sizeof(cmd)); 1020254432Sian memset(&data, 0, sizeof(data)); 1021183704Smav cmd.opcode = MMC_BUSTEST_R; 1022183704Smav cmd.arg = 0; 1023183704Smav cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1024183704Smav cmd.data = &data; 1025183704Smav 1026183704Smav data.data = buf; 1027183704Smav data.len = 8; 1028183704Smav data.flags = MMC_DATA_READ; 1029318198Smarius err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1030276288Sian sc->squelched--; 1031312400Smarius 1032183704Smav mmcbr_set_bus_width(sc->dev, bus_width_1); 1033183704Smav mmcbr_update_ios(sc->dev); 1034183704Smav 1035183704Smav if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0) 1036183704Smav return (bus_width_8); 1037183704Smav } 1038183704Smav 1039183704Smav if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) { 1040183704Smav mmcbr_set_bus_width(sc->dev, bus_width_4); 1041183704Smav mmcbr_update_ios(sc->dev); 1042183704Smav 1043276288Sian sc->squelched++; /* Errors are expected, squelch reporting. */ 1044254432Sian memset(&cmd, 0, sizeof(cmd)); 1045254432Sian memset(&data, 0, sizeof(data)); 1046183704Smav cmd.opcode = MMC_BUSTEST_W; 1047183704Smav cmd.arg = 0; 1048183704Smav cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1049183704Smav cmd.data = &data; 1050183704Smav 1051318198Smarius data.data = __DECONST(void *, p4); 1052183704Smav data.len = 4; 1053183704Smav data.flags = MMC_DATA_WRITE; 1054318198Smarius mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1055312400Smarius 1056254432Sian memset(&cmd, 0, sizeof(cmd)); 1057254432Sian memset(&data, 0, sizeof(data)); 1058183704Smav cmd.opcode = MMC_BUSTEST_R; 1059183704Smav cmd.arg = 0; 1060183704Smav cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1061183704Smav cmd.data = &data; 1062183704Smav 1063183704Smav data.data = buf; 1064183704Smav data.len = 4; 1065183704Smav data.flags = MMC_DATA_READ; 1066318198Smarius err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1067276288Sian sc->squelched--; 1068183704Smav 1069183704Smav mmcbr_set_bus_width(sc->dev, bus_width_1); 1070183704Smav mmcbr_update_ios(sc->dev); 1071183704Smav 1072183704Smav if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0) 1073183704Smav return (bus_width_4); 1074183704Smav } 1075183704Smav return (bus_width_1); 1076183704Smav} 1077183704Smav 1078163516Simpstatic uint32_t 1079184033Smavmmc_get_bits(uint32_t *bits, int bit_len, int start, int size) 1080163516Simp{ 1081183729Simp const int i = (bit_len / 32) - (start / 32) - 1; 1082163516Simp const int shift = start & 31; 1083163516Simp uint32_t retval = bits[i] >> shift; 1084318198Smarius 1085163516Simp if (size + shift > 32) 1086163516Simp retval |= bits[i - 1] << (32 - shift); 1087217509Smav return (retval & ((1llu << size) - 1)); 1088163516Simp} 1089163516Simp 1090163516Simpstatic void 1091183729Simpmmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid) 1092163516Simp{ 1093163516Simp int i; 1094163516Simp 1095183729Simp /* There's no version info, so we take it on faith */ 1096163516Simp memset(cid, 0, sizeof(*cid)); 1097184033Smav cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 1098184033Smav cid->oid = mmc_get_bits(raw_cid, 128, 104, 16); 1099183729Simp for (i = 0; i < 5; i++) 1100184033Smav cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 1101187875Smav cid->pnm[5] = 0; 1102184033Smav cid->prv = mmc_get_bits(raw_cid, 128, 56, 8); 1103184033Smav cid->psn = mmc_get_bits(raw_cid, 128, 24, 32); 1104187875Smav cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000; 1105184033Smav cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4); 1106163516Simp} 1107163516Simp 1108183729Simpstatic void 1109318198Smariusmmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, bool is_4_41p) 1110183729Simp{ 1111183729Simp int i; 1112183729Simp 1113183729Simp /* There's no version info, so we take it on faith */ 1114183729Simp memset(cid, 0, sizeof(*cid)); 1115184033Smav cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 1116184033Smav cid->oid = mmc_get_bits(raw_cid, 128, 104, 8); 1117183729Simp for (i = 0; i < 6; i++) 1118184033Smav cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 1119187875Smav cid->pnm[6] = 0; 1120184033Smav cid->prv = mmc_get_bits(raw_cid, 128, 48, 8); 1121184033Smav cid->psn = mmc_get_bits(raw_cid, 128, 16, 32); 1122184033Smav cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4); 1123318198Smarius cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4); 1124318198Smarius if (is_4_41p) 1125318198Smarius cid->mdt_year += 2013; 1126318198Smarius else 1127318198Smarius cid->mdt_year += 1997; 1128183729Simp} 1129183729Simp 1130234524Smariusstatic void 1131234524Smariusmmc_format_card_id_string(struct mmc_ivars *ivar) 1132234524Smarius{ 1133234524Smarius char oidstr[8]; 1134234524Smarius uint8_t c1; 1135234524Smarius uint8_t c2; 1136234524Smarius 1137234524Smarius /* 1138234524Smarius * Format a card ID string for use by the mmcsd driver, it's what 1139234524Smarius * appears between the <> in the following: 1140322389Smarius * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 MFG 08/2008 by 3 TN> at mmc0 1141234524Smarius * 22.5MHz/4bit/128-block 1142234524Smarius * 1143269795Sian * Also format just the card serial number, which the mmcsd driver will 1144269795Sian * use as the disk->d_ident string. 1145269795Sian * 1146234524Smarius * The card_id_string in mmc_ivars is currently allocated as 64 bytes, 1147234524Smarius * and our max formatted length is currently 55 bytes if every field 1148234524Smarius * contains the largest value. 1149234524Smarius * 1150234524Smarius * Sometimes the oid is two printable ascii chars; when it's not, 1151234524Smarius * format it as 0xnnnn instead. 1152234524Smarius */ 1153234524Smarius c1 = (ivar->cid.oid >> 8) & 0x0ff; 1154234524Smarius c2 = ivar->cid.oid & 0x0ff; 1155234524Smarius if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f) 1156234524Smarius snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2); 1157234524Smarius else 1158234524Smarius snprintf(oidstr, sizeof(oidstr), "0x%04x", ivar->cid.oid); 1159269795Sian snprintf(ivar->card_sn_string, sizeof(ivar->card_sn_string), 1160269795Sian "%08X", ivar->cid.psn); 1161234524Smarius snprintf(ivar->card_id_string, sizeof(ivar->card_id_string), 1162269795Sian "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s", 1163234524Smarius ivar->mode == mode_sd ? "SD" : "MMC", ivar->high_cap ? "HC" : "", 1164234524Smarius ivar->cid.pnm, ivar->cid.prv >> 4, ivar->cid.prv & 0x0f, 1165234524Smarius ivar->cid.psn, ivar->cid.mdt_month, ivar->cid.mdt_year, 1166234524Smarius ivar->cid.mid, oidstr); 1167234524Smarius} 1168234524Smarius 1169163516Simpstatic const int exp[8] = { 1170163516Simp 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000 1171163516Simp}; 1172234524Smarius 1173163516Simpstatic const int mant[16] = { 1174234524Smarius 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 1175163516Simp}; 1176234524Smarius 1177163516Simpstatic const int cur_min[8] = { 1178163516Simp 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000 1179163516Simp}; 1180234524Smarius 1181163516Simpstatic const int cur_max[8] = { 1182163516Simp 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000 1183163516Simp}; 1184163516Simp 1185322120Smariusstatic int 1186183729Simpmmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd) 1187163516Simp{ 1188163516Simp int v; 1189163516Simp int m; 1190163516Simp int e; 1191163516Simp 1192163516Simp memset(csd, 0, sizeof(*csd)); 1193184033Smav csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2); 1194183729Simp if (v == 0) { 1195184033Smav m = mmc_get_bits(raw_csd, 128, 115, 4); 1196184033Smav e = mmc_get_bits(raw_csd, 128, 112, 3); 1197236156Smarius csd->tacc = (exp[e] * mant[m] + 9) / 10; 1198184033Smav csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1199184033Smav m = mmc_get_bits(raw_csd, 128, 99, 4); 1200184033Smav e = mmc_get_bits(raw_csd, 128, 96, 3); 1201183704Smav csd->tran_speed = exp[e] * 10000 * mant[m]; 1202184033Smav csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1203184033Smav csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1204184033Smav csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1205184033Smav csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1206184033Smav csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1207184033Smav csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1208318198Smarius csd->vdd_r_curr_min = 1209318198Smarius cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 1210318198Smarius csd->vdd_r_curr_max = 1211318198Smarius cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 1212318198Smarius csd->vdd_w_curr_min = 1213318198Smarius cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 1214318198Smarius csd->vdd_w_curr_max = 1215318198Smarius cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 1216184033Smav m = mmc_get_bits(raw_csd, 128, 62, 12); 1217184033Smav e = mmc_get_bits(raw_csd, 128, 47, 3); 1218183704Smav csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 1219184033Smav csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 1220184033Smav csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 1221184033Smav csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 1222184033Smav csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1223184033Smav csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1224184033Smav csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1225184033Smav csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1226322120Smarius return (MMC_ERR_NONE); 1227183729Simp } else if (v == 1) { 1228184033Smav m = mmc_get_bits(raw_csd, 128, 115, 4); 1229184033Smav e = mmc_get_bits(raw_csd, 128, 112, 3); 1230236156Smarius csd->tacc = (exp[e] * mant[m] + 9) / 10; 1231184033Smav csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1232184033Smav m = mmc_get_bits(raw_csd, 128, 99, 4); 1233184033Smav e = mmc_get_bits(raw_csd, 128, 96, 3); 1234183729Simp csd->tran_speed = exp[e] * 10000 * mant[m]; 1235184033Smav csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1236184033Smav csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1237184033Smav csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1238184033Smav csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1239184033Smav csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1240184033Smav csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1241318198Smarius csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1242318198Smarius 1) * 512 * 1024; 1243184033Smav csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 1244184033Smav csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 1245184033Smav csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 1246184033Smav csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1247184033Smav csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1248184033Smav csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1249184033Smav csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1250322120Smarius return (MMC_ERR_NONE); 1251322120Smarius } 1252322120Smarius return (MMC_ERR_INVALID); 1253163516Simp} 1254163516Simp 1255183704Smavstatic void 1256183729Simpmmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd) 1257183729Simp{ 1258183729Simp int m; 1259183729Simp int e; 1260183729Simp 1261183729Simp memset(csd, 0, sizeof(*csd)); 1262184033Smav csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2); 1263184033Smav csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4); 1264184033Smav m = mmc_get_bits(raw_csd, 128, 115, 4); 1265184033Smav e = mmc_get_bits(raw_csd, 128, 112, 3); 1266183729Simp csd->tacc = exp[e] * mant[m] + 9 / 10; 1267184033Smav csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1268184033Smav m = mmc_get_bits(raw_csd, 128, 99, 4); 1269184033Smav e = mmc_get_bits(raw_csd, 128, 96, 3); 1270183729Simp csd->tran_speed = exp[e] * 10000 * mant[m]; 1271184033Smav csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1272184033Smav csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1273184033Smav csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1274184033Smav csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1275184033Smav csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1276184033Smav csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1277184033Smav csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 1278184033Smav csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 1279184033Smav csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 1280184033Smav csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 1281184033Smav m = mmc_get_bits(raw_csd, 128, 62, 12); 1282184033Smav e = mmc_get_bits(raw_csd, 128, 47, 3); 1283183729Simp csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 1284184033Smav csd->erase_blk_en = 0; 1285184033Smav csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) * 1286184033Smav (mmc_get_bits(raw_csd, 128, 37, 5) + 1); 1287184033Smav csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5); 1288184033Smav csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1289184033Smav csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1290184033Smav csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1291184033Smav csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1292183729Simp} 1293183729Simp 1294183729Simpstatic void 1295183704Smavmmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr) 1296183704Smav{ 1297183704Smav unsigned int scr_struct; 1298183704Smav 1299183704Smav memset(scr, 0, sizeof(*scr)); 1300183729Simp 1301184033Smav scr_struct = mmc_get_bits(raw_scr, 64, 60, 4); 1302183704Smav if (scr_struct != 0) { 1303183704Smav printf("Unrecognised SCR structure version %d\n", 1304183704Smav scr_struct); 1305183704Smav return; 1306183704Smav } 1307184033Smav scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4); 1308184033Smav scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4); 1309183704Smav} 1310183704Smav 1311184033Smavstatic void 1312184033Smavmmc_app_decode_sd_status(uint32_t *raw_sd_status, 1313184033Smav struct mmc_sd_status *sd_status) 1314184033Smav{ 1315184033Smav 1316184033Smav memset(sd_status, 0, sizeof(*sd_status)); 1317184033Smav 1318184033Smav sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2); 1319184033Smav sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1); 1320184033Smav sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16); 1321184033Smav sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12); 1322184033Smav sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8); 1323184033Smav sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8); 1324184033Smav sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4); 1325184033Smav sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16); 1326184033Smav sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6); 1327184033Smav sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2); 1328184033Smav} 1329184033Smav 1330163516Simpstatic int 1331163516Simpmmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid) 1332163516Simp{ 1333163516Simp struct mmc_command cmd; 1334163516Simp int err; 1335163516Simp 1336254432Sian memset(&cmd, 0, sizeof(cmd)); 1337163516Simp cmd.opcode = MMC_ALL_SEND_CID; 1338163516Simp cmd.arg = 0; 1339163516Simp cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 1340183470Simp cmd.data = NULL; 1341318198Smarius err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1342163516Simp memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t)); 1343163516Simp return (err); 1344163516Simp} 1345163516Simp 1346163516Simpstatic int 1347236156Smariusmmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd) 1348163516Simp{ 1349163516Simp struct mmc_command cmd; 1350163516Simp int err; 1351163516Simp 1352254432Sian memset(&cmd, 0, sizeof(cmd)); 1353163516Simp cmd.opcode = MMC_SEND_CSD; 1354163516Simp cmd.arg = rca << 16; 1355163516Simp cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 1356183470Simp cmd.data = NULL; 1357318198Smarius err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1358236156Smarius memcpy(rawcsd, cmd.resp, 4 * sizeof(uint32_t)); 1359163516Simp return (err); 1360163516Simp} 1361163516Simp 1362163516Simpstatic int 1363183704Smavmmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr) 1364183704Smav{ 1365183704Smav int err; 1366183704Smav struct mmc_command cmd; 1367183704Smav struct mmc_data data; 1368183704Smav 1369254432Sian memset(&cmd, 0, sizeof(cmd)); 1370254432Sian memset(&data, 0, sizeof(data)); 1371183704Smav 1372183704Smav memset(rawscr, 0, 8); 1373183704Smav cmd.opcode = ACMD_SEND_SCR; 1374183704Smav cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1375183704Smav cmd.arg = 0; 1376183704Smav cmd.data = &data; 1377183704Smav 1378183704Smav data.data = rawscr; 1379183704Smav data.len = 8; 1380183704Smav data.flags = MMC_DATA_READ; 1381183704Smav 1382318198Smarius err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES); 1383183704Smav rawscr[0] = be32toh(rawscr[0]); 1384183704Smav rawscr[1] = be32toh(rawscr[1]); 1385183704Smav return (err); 1386183704Smav} 1387183704Smav 1388183704Smavstatic int 1389318198Smariusmmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus) 1390183704Smav{ 1391183704Smav struct mmc_command cmd; 1392183704Smav struct mmc_data data; 1393184033Smav int err, i; 1394184033Smav 1395254432Sian memset(&cmd, 0, sizeof(cmd)); 1396254432Sian memset(&data, 0, sizeof(data)); 1397184033Smav 1398184033Smav memset(rawsdstatus, 0, 64); 1399184033Smav cmd.opcode = ACMD_SD_STATUS; 1400184033Smav cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1401184033Smav cmd.arg = 0; 1402184033Smav cmd.data = &data; 1403184033Smav 1404184033Smav data.data = rawsdstatus; 1405184033Smav data.len = 64; 1406184033Smav data.flags = MMC_DATA_READ; 1407184033Smav 1408318198Smarius err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES); 1409184033Smav for (i = 0; i < 16; i++) 1410184033Smav rawsdstatus[i] = be32toh(rawsdstatus[i]); 1411184033Smav return (err); 1412184033Smav} 1413184033Smav 1414184033Smavstatic int 1415183704Smavmmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp) 1416183704Smav{ 1417183704Smav struct mmc_command cmd; 1418183704Smav int err; 1419183704Smav 1420254432Sian memset(&cmd, 0, sizeof(cmd)); 1421183704Smav cmd.opcode = MMC_SET_RELATIVE_ADDR; 1422183704Smav cmd.arg = resp << 16; 1423183704Smav cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1424183704Smav cmd.data = NULL; 1425318198Smarius err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1426183704Smav return (err); 1427183704Smav} 1428183704Smav 1429183704Smavstatic int 1430163516Simpmmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) 1431163516Simp{ 1432163516Simp struct mmc_command cmd; 1433163516Simp int err; 1434163516Simp 1435254432Sian memset(&cmd, 0, sizeof(cmd)); 1436163516Simp cmd.opcode = SD_SEND_RELATIVE_ADDR; 1437163516Simp cmd.arg = 0; 1438163516Simp cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1439183470Simp cmd.data = NULL; 1440318198Smarius err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1441163516Simp *resp = cmd.resp[0]; 1442163516Simp return (err); 1443163516Simp} 1444163516Simp 1445236156Smariusstatic int 1446236156Smariusmmc_set_blocklen(struct mmc_softc *sc, uint32_t len) 1447236156Smarius{ 1448236156Smarius struct mmc_command cmd; 1449236156Smarius int err; 1450236156Smarius 1451254432Sian memset(&cmd, 0, sizeof(cmd)); 1452236156Smarius cmd.opcode = MMC_SET_BLOCKLEN; 1453236156Smarius cmd.arg = len; 1454236156Smarius cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 1455236156Smarius cmd.data = NULL; 1456318198Smarius err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1457236156Smarius return (err); 1458236156Smarius} 1459236156Smarius 1460318495Smariusstatic uint32_t 1461318495Smariusmmc_timing_to_dtr(struct mmc_ivars *ivar, enum mmc_bus_timing timing) 1462318495Smarius{ 1463318495Smarius 1464318495Smarius switch (timing) { 1465318495Smarius case bus_timing_normal: 1466318495Smarius return (ivar->tran_speed); 1467318495Smarius case bus_timing_hs: 1468318495Smarius return (ivar->hs_tran_speed); 1469318495Smarius case bus_timing_uhs_sdr12: 1470318495Smarius return (SD_SDR12_MAX); 1471318495Smarius case bus_timing_uhs_sdr25: 1472318495Smarius return (SD_SDR25_MAX); 1473318495Smarius case bus_timing_uhs_ddr50: 1474318495Smarius return (SD_DDR50_MAX); 1475318495Smarius case bus_timing_uhs_sdr50: 1476318495Smarius return (SD_SDR50_MAX); 1477318495Smarius case bus_timing_uhs_sdr104: 1478318495Smarius return (SD_SDR104_MAX); 1479318495Smarius case bus_timing_mmc_ddr52: 1480318495Smarius return (MMC_TYPE_DDR52_MAX); 1481318495Smarius case bus_timing_mmc_hs200: 1482318495Smarius case bus_timing_mmc_hs400: 1483318495Smarius case bus_timing_mmc_hs400es: 1484318495Smarius return (MMC_TYPE_HS200_HS400ES_MAX); 1485318495Smarius } 1486318495Smarius return (0); 1487318495Smarius} 1488318495Smarius 1489318495Smariusstatic const char * 1490318495Smariusmmc_timing_to_string(enum mmc_bus_timing timing) 1491318495Smarius{ 1492318495Smarius 1493318495Smarius switch (timing) { 1494318495Smarius case bus_timing_normal: 1495318495Smarius return ("normal speed"); 1496318495Smarius case bus_timing_hs: 1497318495Smarius return ("high speed"); 1498318495Smarius case bus_timing_uhs_sdr12: 1499318495Smarius case bus_timing_uhs_sdr25: 1500318495Smarius case bus_timing_uhs_sdr50: 1501318495Smarius case bus_timing_uhs_sdr104: 1502318495Smarius return ("single data rate"); 1503318495Smarius case bus_timing_uhs_ddr50: 1504318495Smarius case bus_timing_mmc_ddr52: 1505318495Smarius return ("dual data rate"); 1506318495Smarius case bus_timing_mmc_hs200: 1507318495Smarius return ("HS200"); 1508318495Smarius case bus_timing_mmc_hs400: 1509318495Smarius return ("HS400"); 1510318495Smarius case bus_timing_mmc_hs400es: 1511318495Smarius return ("HS400 with enhanced strobe"); 1512318495Smarius } 1513318495Smarius return (""); 1514318495Smarius} 1515318495Smarius 1516322120Smariusstatic bool 1517322120Smariusmmc_host_timing(device_t dev, enum mmc_bus_timing timing) 1518322120Smarius{ 1519322120Smarius int host_caps; 1520322120Smarius 1521322120Smarius host_caps = mmcbr_get_caps(dev); 1522322120Smarius 1523322120Smarius#define HOST_TIMING_CAP(host_caps, cap) ({ \ 1524322120Smarius bool retval; \ 1525322120Smarius if (((host_caps) & (cap)) == (cap)) \ 1526322120Smarius retval = true; \ 1527322120Smarius else \ 1528322120Smarius retval = false; \ 1529322120Smarius retval; \ 1530322120Smarius}) 1531322120Smarius 1532322120Smarius switch (timing) { 1533322120Smarius case bus_timing_normal: 1534322120Smarius return (true); 1535322120Smarius case bus_timing_hs: 1536322120Smarius return (HOST_TIMING_CAP(host_caps, MMC_CAP_HSPEED)); 1537322120Smarius case bus_timing_uhs_sdr12: 1538322120Smarius return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR12)); 1539322120Smarius case bus_timing_uhs_sdr25: 1540322120Smarius return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR25)); 1541322120Smarius case bus_timing_uhs_ddr50: 1542322120Smarius return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_DDR50)); 1543322120Smarius case bus_timing_uhs_sdr50: 1544322120Smarius return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR50)); 1545322120Smarius case bus_timing_uhs_sdr104: 1546322120Smarius return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR104)); 1547322120Smarius case bus_timing_mmc_ddr52: 1548322120Smarius return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_DDR52)); 1549322120Smarius case bus_timing_mmc_hs200: 1550322120Smarius return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS200)); 1551322120Smarius case bus_timing_mmc_hs400: 1552322120Smarius return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400)); 1553322120Smarius case bus_timing_mmc_hs400es: 1554322120Smarius return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400 | 1555322120Smarius MMC_CAP_MMC_ENH_STROBE)); 1556322120Smarius } 1557322120Smarius 1558322120Smarius#undef HOST_TIMING_CAP 1559322120Smarius 1560322120Smarius return (false); 1561322120Smarius} 1562322120Smarius 1563163516Simpstatic void 1564187875Smavmmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard) 1565187875Smav{ 1566318495Smarius enum mmc_bus_timing max_timing, timing; 1567318198Smarius 1568254425Sian device_printf(dev, "Card at relative address 0x%04x%s:\n", 1569187875Smav ivar->rca, newcard ? " added" : ""); 1570234524Smarius device_printf(dev, " card: %s\n", ivar->card_id_string); 1571318495Smarius max_timing = bus_timing_normal; 1572318495Smarius for (timing = bus_timing_max; timing > bus_timing_normal; timing--) { 1573318495Smarius if (isset(&ivar->timings, timing)) { 1574318495Smarius max_timing = timing; 1575318495Smarius break; 1576318495Smarius } 1577318495Smarius } 1578322389Smarius device_printf(dev, " quirks: %b\n", ivar->quirks, MMC_QUIRKS_FMT); 1579318495Smarius device_printf(dev, " bus: %ubit, %uMHz (%s timing)\n", 1580187875Smav (ivar->bus_width == bus_width_1 ? 1 : 1581187875Smav (ivar->bus_width == bus_width_4 ? 4 : 8)), 1582318495Smarius mmc_timing_to_dtr(ivar, timing) / 1000000, 1583318495Smarius mmc_timing_to_string(timing)); 1584187875Smav device_printf(dev, " memory: %u blocks, erase sector %u blocks%s\n", 1585187875Smav ivar->sec_count, ivar->erase_sector, 1586187875Smav ivar->read_only ? ", read-only" : ""); 1587187875Smav} 1588187875Smav 1589187875Smavstatic void 1590163516Simpmmc_discover_cards(struct mmc_softc *sc) 1591163516Simp{ 1592318198Smarius u_char switch_res[64]; 1593318198Smarius uint32_t raw_cid[4]; 1594185721Smav struct mmc_ivars *ivar = NULL; 1595322389Smarius const struct mmc_quirk *quirk; 1596338638Smarius const uint8_t *ext_csd; 1597318198Smarius device_t child; 1598322120Smarius int err, host_caps, i, newcard; 1599318198Smarius uint32_t resp, sec_count, status; 1600183704Smav uint16_t rca = 2; 1601338638Smarius int16_t rev; 1602338638Smarius uint8_t card_type; 1603163516Simp 1604318495Smarius host_caps = mmcbr_get_caps(sc->dev); 1605187875Smav if (bootverbose || mmc_debug) 1606187875Smav device_printf(sc->dev, "Probing cards\n"); 1607163516Simp while (1) { 1608322120Smarius child = NULL; 1609276288Sian sc->squelched++; /* Errors are expected, squelch reporting. */ 1610185721Smav err = mmc_all_send_cid(sc, raw_cid); 1611276288Sian sc->squelched--; 1612163516Simp if (err == MMC_ERR_TIMEOUT) 1613163516Simp break; 1614163516Simp if (err != MMC_ERR_NONE) { 1615183468Simp device_printf(sc->dev, "Error reading CID %d\n", err); 1616163516Simp break; 1617163516Simp } 1618185721Smav newcard = 1; 1619322120Smarius for (i = 0; i < sc->child_count; i++) { 1620322120Smarius ivar = device_get_ivars(sc->child_list[i]); 1621318198Smarius if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) == 1622318198Smarius 0) { 1623185721Smav newcard = 0; 1624185721Smav break; 1625185721Smav } 1626185721Smav } 1627187875Smav if (bootverbose || mmc_debug) { 1628318198Smarius device_printf(sc->dev, 1629318198Smarius "%sard detected (CID %08x%08x%08x%08x)\n", 1630187875Smav newcard ? "New c" : "C", 1631187875Smav raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]); 1632187875Smav } 1633185721Smav if (newcard) { 1634185721Smav ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF, 1635185721Smav M_WAITOK | M_ZERO); 1636185721Smav memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid)); 1637185721Smav } 1638183704Smav if (mmcbr_get_ro(sc->dev)) 1639183704Smav ivar->read_only = 1; 1640183704Smav ivar->bus_width = bus_width_1; 1641318495Smarius setbit(&ivar->timings, bus_timing_normal); 1642183704Smav ivar->mode = mmcbr_get_mode(sc->dev); 1643183704Smav if (ivar->mode == mode_sd) { 1644183729Simp mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid); 1645318495Smarius err = mmc_send_relative_addr(sc, &resp); 1646318495Smarius if (err != MMC_ERR_NONE) { 1647318495Smarius device_printf(sc->dev, 1648318495Smarius "Error getting RCA %d\n", err); 1649322120Smarius goto free_ivar; 1650318495Smarius } 1651163516Simp ivar->rca = resp >> 16; 1652183704Smav /* Get card CSD. */ 1653318495Smarius err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1654318495Smarius if (err != MMC_ERR_NONE) { 1655318495Smarius device_printf(sc->dev, 1656318495Smarius "Error getting CSD %d\n", err); 1657322120Smarius goto free_ivar; 1658318495Smarius } 1659236156Smarius if (bootverbose || mmc_debug) 1660236156Smarius device_printf(sc->dev, 1661236156Smarius "%sard detected (CSD %08x%08x%08x%08x)\n", 1662236156Smarius newcard ? "New c" : "C", ivar->raw_csd[0], 1663236156Smarius ivar->raw_csd[1], ivar->raw_csd[2], 1664236156Smarius ivar->raw_csd[3]); 1665322120Smarius err = mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd); 1666322120Smarius if (err != MMC_ERR_NONE) { 1667322120Smarius device_printf(sc->dev, "Error decoding CSD\n"); 1668322120Smarius goto free_ivar; 1669322120Smarius } 1670183731Smav ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1671183704Smav if (ivar->csd.csd_structure > 0) 1672183704Smav ivar->high_cap = 1; 1673183704Smav ivar->tran_speed = ivar->csd.tran_speed; 1674312400Smarius ivar->erase_sector = ivar->csd.erase_sector * 1675184033Smav ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1676312400Smarius 1677318198Smarius err = mmc_send_status(sc->dev, sc->dev, ivar->rca, 1678318198Smarius &status); 1679236156Smarius if (err != MMC_ERR_NONE) { 1680236156Smarius device_printf(sc->dev, 1681236156Smarius "Error reading card status %d\n", err); 1682322120Smarius goto free_ivar; 1683236156Smarius } 1684236156Smarius if ((status & R1_CARD_IS_LOCKED) != 0) { 1685236156Smarius device_printf(sc->dev, 1686322120Smarius "Card is password protected, skipping\n"); 1687322120Smarius goto free_ivar; 1688236156Smarius } 1689236156Smarius 1690318198Smarius /* Get card SCR. Card must be selected to fetch it. */ 1691318495Smarius err = mmc_select_card(sc, ivar->rca); 1692318495Smarius if (err != MMC_ERR_NONE) { 1693318495Smarius device_printf(sc->dev, 1694318495Smarius "Error selecting card %d\n", err); 1695322120Smarius goto free_ivar; 1696318495Smarius } 1697318495Smarius err = mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr); 1698318495Smarius if (err != MMC_ERR_NONE) { 1699318495Smarius device_printf(sc->dev, 1700318495Smarius "Error reading SCR %d\n", err); 1701322120Smarius goto free_ivar; 1702318495Smarius } 1703183704Smav mmc_app_decode_scr(ivar->raw_scr, &ivar->scr); 1704188044Simp /* Get card switch capabilities (command class 10). */ 1705183704Smav if ((ivar->scr.sda_vsn >= 1) && 1706318198Smarius (ivar->csd.ccc & (1 << 10))) { 1707318495Smarius err = mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK, 1708188044Simp SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE, 1709188044Simp switch_res); 1710318495Smarius if (err == MMC_ERR_NONE && 1711318495Smarius switch_res[13] & (1 << SD_SWITCH_HS_MODE)) { 1712318495Smarius setbit(&ivar->timings, bus_timing_hs); 1713318495Smarius ivar->hs_tran_speed = SD_HS_MAX; 1714183704Smav } 1715183704Smav } 1716289339Sian 1717289339Sian /* 1718289339Sian * We deselect then reselect the card here. Some cards 1719289339Sian * become unselected and timeout with the above two 1720289339Sian * commands, although the state tables / diagrams in the 1721289339Sian * standard suggest they go back to the transfer state. 1722289339Sian * Other cards don't become deselected, and if we 1723318198Smarius * attempt to blindly re-select them, we get timeout 1724289339Sian * errors from some controllers. So we deselect then 1725289339Sian * reselect to handle all situations. The only thing we 1726289339Sian * use from the sd_status is the erase sector size, but 1727289339Sian * it is still nice to get that right. 1728289339Sian */ 1729322120Smarius (void)mmc_select_card(sc, 0); 1730318495Smarius (void)mmc_select_card(sc, ivar->rca); 1731318495Smarius (void)mmc_app_sd_status(sc, ivar->rca, 1732318495Smarius ivar->raw_sd_status); 1733184033Smav mmc_app_decode_sd_status(ivar->raw_sd_status, 1734184033Smav &ivar->sd_status); 1735184033Smav if (ivar->sd_status.au_size != 0) { 1736184033Smav ivar->erase_sector = 1737184033Smav 16 << ivar->sd_status.au_size; 1738184033Smav } 1739322120Smarius /* Find maximum supported bus width. */ 1740318495Smarius if ((host_caps & MMC_CAP_4_BIT_DATA) && 1741183704Smav (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) 1742183704Smav ivar->bus_width = bus_width_4; 1743236156Smarius 1744322120Smarius goto child_common; 1745163516Simp } 1746183704Smav ivar->rca = rca++; 1747318495Smarius err = mmc_set_relative_addr(sc, ivar->rca); 1748318495Smarius if (err != MMC_ERR_NONE) { 1749318495Smarius device_printf(sc->dev, "Error setting RCA %d\n", err); 1750322120Smarius goto free_ivar; 1751318495Smarius } 1752183704Smav /* Get card CSD. */ 1753318495Smarius err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1754318495Smarius if (err != MMC_ERR_NONE) { 1755318495Smarius device_printf(sc->dev, "Error getting CSD %d\n", err); 1756322120Smarius goto free_ivar; 1757318495Smarius } 1758236156Smarius if (bootverbose || mmc_debug) 1759236156Smarius device_printf(sc->dev, 1760236156Smarius "%sard detected (CSD %08x%08x%08x%08x)\n", 1761236156Smarius newcard ? "New c" : "C", ivar->raw_csd[0], 1762236156Smarius ivar->raw_csd[1], ivar->raw_csd[2], 1763236156Smarius ivar->raw_csd[3]); 1764236156Smarius 1765183729Simp mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd); 1766183731Smav ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1767183704Smav ivar->tran_speed = ivar->csd.tran_speed; 1768312400Smarius ivar->erase_sector = ivar->csd.erase_sector * 1769184033Smav ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1770236156Smarius 1771318198Smarius err = mmc_send_status(sc->dev, sc->dev, ivar->rca, &status); 1772236156Smarius if (err != MMC_ERR_NONE) { 1773236156Smarius device_printf(sc->dev, 1774236156Smarius "Error reading card status %d\n", err); 1775322120Smarius goto free_ivar; 1776236156Smarius } 1777236156Smarius if ((status & R1_CARD_IS_LOCKED) != 0) { 1778236156Smarius device_printf(sc->dev, 1779322120Smarius "Card is password protected, skipping\n"); 1780322120Smarius goto free_ivar; 1781236156Smarius } 1782236156Smarius 1783318495Smarius err = mmc_select_card(sc, ivar->rca); 1784318495Smarius if (err != MMC_ERR_NONE) { 1785318495Smarius device_printf(sc->dev, "Error selecting card %d\n", 1786318495Smarius err); 1787322120Smarius goto free_ivar; 1788318495Smarius } 1789289339Sian 1790338638Smarius rev = -1; 1791318198Smarius /* Only MMC >= 4.x devices support EXT_CSD. */ 1792183704Smav if (ivar->csd.spec_vers >= 4) { 1793318198Smarius err = mmc_send_ext_csd(sc->dev, sc->dev, 1794318198Smarius ivar->raw_ext_csd); 1795318198Smarius if (err != MMC_ERR_NONE) { 1796318198Smarius device_printf(sc->dev, 1797318198Smarius "Error reading EXT_CSD %d\n", err); 1798322120Smarius goto free_ivar; 1799318198Smarius } 1800338638Smarius ext_csd = ivar->raw_ext_csd; 1801338638Smarius rev = ext_csd[EXT_CSD_REV]; 1802183731Smav /* Handle extended capacity from EXT_CSD */ 1803338638Smarius sec_count = le32dec(&ext_csd[EXT_CSD_SEC_CNT]); 1804183731Smav if (sec_count != 0) { 1805183731Smav ivar->sec_count = sec_count; 1806183731Smav ivar->high_cap = 1; 1807183731Smav } 1808322120Smarius /* Find maximum supported bus width. */ 1809322120Smarius ivar->bus_width = mmc_test_bus_width(sc); 1810318495Smarius /* Get device speeds beyond normal mode. */ 1811338638Smarius card_type = ext_csd[EXT_CSD_CARD_TYPE]; 1812338638Smarius if ((card_type & EXT_CSD_CARD_TYPE_HS_52) != 0) { 1813318495Smarius setbit(&ivar->timings, bus_timing_hs); 1814318495Smarius ivar->hs_tran_speed = MMC_TYPE_HS_52_MAX; 1815338638Smarius } else if ((card_type & EXT_CSD_CARD_TYPE_HS_26) != 0) { 1816318495Smarius setbit(&ivar->timings, bus_timing_hs); 1817318495Smarius ivar->hs_tran_speed = MMC_TYPE_HS_26_MAX; 1818318495Smarius } 1819338638Smarius if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 && 1820318495Smarius (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1821318495Smarius setbit(&ivar->timings, bus_timing_mmc_ddr52); 1822318495Smarius setbit(&ivar->vccq_120, bus_timing_mmc_ddr52); 1823318495Smarius } 1824338638Smarius if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 && 1825318495Smarius (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1826318495Smarius setbit(&ivar->timings, bus_timing_mmc_ddr52); 1827318495Smarius setbit(&ivar->vccq_180, bus_timing_mmc_ddr52); 1828318495Smarius } 1829338638Smarius if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_2V) != 0 && 1830322120Smarius (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1831322120Smarius setbit(&ivar->timings, bus_timing_mmc_hs200); 1832322120Smarius setbit(&ivar->vccq_120, bus_timing_mmc_hs200); 1833322120Smarius } 1834338638Smarius if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_8V) != 0 && 1835322120Smarius (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1836322120Smarius setbit(&ivar->timings, bus_timing_mmc_hs200); 1837322120Smarius setbit(&ivar->vccq_180, bus_timing_mmc_hs200); 1838322120Smarius } 1839338638Smarius if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 && 1840322120Smarius (host_caps & MMC_CAP_SIGNALING_120) != 0 && 1841322120Smarius ivar->bus_width == bus_width_8) { 1842322120Smarius setbit(&ivar->timings, bus_timing_mmc_hs400); 1843322120Smarius setbit(&ivar->vccq_120, bus_timing_mmc_hs400); 1844322120Smarius } 1845338638Smarius if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 && 1846322120Smarius (host_caps & MMC_CAP_SIGNALING_180) != 0 && 1847322120Smarius ivar->bus_width == bus_width_8) { 1848322120Smarius setbit(&ivar->timings, bus_timing_mmc_hs400); 1849322120Smarius setbit(&ivar->vccq_180, bus_timing_mmc_hs400); 1850322120Smarius } 1851338638Smarius if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 && 1852338638Smarius (ext_csd[EXT_CSD_STROBE_SUPPORT] & 1853322120Smarius EXT_CSD_STROBE_SUPPORT_EN) != 0 && 1854322120Smarius (host_caps & MMC_CAP_SIGNALING_120) != 0 && 1855322120Smarius ivar->bus_width == bus_width_8) { 1856322120Smarius setbit(&ivar->timings, bus_timing_mmc_hs400es); 1857322120Smarius setbit(&ivar->vccq_120, bus_timing_mmc_hs400es); 1858322120Smarius } 1859338638Smarius if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 && 1860338638Smarius (ext_csd[EXT_CSD_STROBE_SUPPORT] & 1861322120Smarius EXT_CSD_STROBE_SUPPORT_EN) != 0 && 1862322120Smarius (host_caps & MMC_CAP_SIGNALING_180) != 0 && 1863322120Smarius ivar->bus_width == bus_width_8) { 1864322120Smarius setbit(&ivar->timings, bus_timing_mmc_hs400es); 1865322120Smarius setbit(&ivar->vccq_180, bus_timing_mmc_hs400es); 1866322120Smarius } 1867318198Smarius /* 1868318198Smarius * Determine generic switch timeout (provided in 1869318198Smarius * units of 10 ms), defaulting to 500 ms. 1870318198Smarius */ 1871318198Smarius ivar->cmd6_time = 500 * 1000; 1872338638Smarius if (rev >= 6) 1873318198Smarius ivar->cmd6_time = 10 * 1874338638Smarius ext_csd[EXT_CSD_GEN_CMD6_TIME]; 1875184033Smav /* Handle HC erase sector size. */ 1876338638Smarius if (ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) { 1877184033Smav ivar->erase_sector = 1024 * 1878338638Smarius ext_csd[EXT_CSD_ERASE_GRP_SIZE]; 1879318198Smarius err = mmc_switch(sc->dev, sc->dev, ivar->rca, 1880318198Smarius EXT_CSD_CMD_SET_NORMAL, 1881318198Smarius EXT_CSD_ERASE_GRP_DEF, 1882318198Smarius EXT_CSD_ERASE_GRP_DEF_EN, 1883318198Smarius ivar->cmd6_time, true); 1884318198Smarius if (err != MMC_ERR_NONE) { 1885318198Smarius device_printf(sc->dev, 1886318198Smarius "Error setting erase group %d\n", 1887318198Smarius err); 1888322120Smarius goto free_ivar; 1889318198Smarius } 1890184033Smav } 1891183704Smav } 1892236156Smarius 1893338638Smarius mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid, rev >= 5); 1894322120Smarius 1895322120Smariuschild_common: 1896322389Smarius for (quirk = &mmc_quirks[0]; quirk->mid != 0x0; quirk++) { 1897322389Smarius if ((quirk->mid == MMC_QUIRK_MID_ANY || 1898322389Smarius quirk->mid == ivar->cid.mid) && 1899322389Smarius (quirk->oid == MMC_QUIRK_OID_ANY || 1900322389Smarius quirk->oid == ivar->cid.oid) && 1901322389Smarius strncmp(quirk->pnm, ivar->cid.pnm, 1902322389Smarius sizeof(ivar->cid.pnm)) == 0) { 1903322389Smarius ivar->quirks = quirk->quirks; 1904322389Smarius break; 1905322389Smarius } 1906322389Smarius } 1907322389Smarius 1908236156Smarius /* 1909236156Smarius * Some cards that report maximum I/O block sizes greater 1910236156Smarius * than 512 require the block length to be set to 512, even 1911236156Smarius * though that is supposed to be the default. Example: 1912236156Smarius * 1913236156Smarius * Transcend 2GB SDSC card, CID: 1914236156Smarius * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000 1915236156Smarius */ 1916236156Smarius if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE || 1917236156Smarius ivar->csd.write_bl_len != MMC_SECTOR_SIZE) 1918236156Smarius mmc_set_blocklen(sc, MMC_SECTOR_SIZE); 1919236156Smarius 1920234524Smarius mmc_format_card_id_string(ivar); 1921236156Smarius 1922187875Smav if (bootverbose || mmc_debug) 1923187875Smav mmc_log_card(sc->dev, ivar, newcard); 1924185721Smav if (newcard) { 1925185721Smav /* Add device. */ 1926185721Smav child = device_add_child(sc->dev, NULL, -1); 1927322120Smarius if (child != NULL) { 1928322120Smarius device_set_ivars(child, ivar); 1929322120Smarius sc->child_list = realloc(sc->child_list, 1930322120Smarius sizeof(device_t) * sc->child_count + 1, 1931322120Smarius M_DEVBUF, M_WAITOK); 1932322120Smarius sc->child_list[sc->child_count++] = child; 1933322120Smarius } else 1934322120Smarius device_printf(sc->dev, "Error adding child\n"); 1935185721Smav } 1936322120Smarius 1937322120Smariusfree_ivar: 1938322120Smarius if (newcard && child == NULL) 1939322120Smarius free(ivar, M_DEVBUF); 1940322120Smarius (void)mmc_select_card(sc, 0); 1941322120Smarius /* 1942322120Smarius * Not returning here when one MMC device could no be added 1943322120Smarius * potentially would mean looping forever when that device 1944322120Smarius * is broken (in which case it also may impact the remainder 1945322120Smarius * of the bus anyway, though). 1946322120Smarius */ 1947322120Smarius if ((newcard && child == NULL) || 1948322120Smarius mmcbr_get_mode(sc->dev) == mode_sd) 1949322120Smarius return; 1950163516Simp } 1951163516Simp} 1952163516Simp 1953163516Simpstatic void 1954322120Smariusmmc_update_child_list(struct mmc_softc *sc) 1955322120Smarius{ 1956322120Smarius device_t child; 1957322120Smarius int i, j; 1958322120Smarius 1959322120Smarius if (sc->child_count == 0) { 1960322120Smarius free(sc->child_list, M_DEVBUF); 1961322120Smarius return; 1962322120Smarius } 1963322120Smarius for (i = j = 0; i < sc->child_count; i++) { 1964322120Smarius for (;;) { 1965322120Smarius child = sc->child_list[j++]; 1966322120Smarius if (child != NULL) 1967322120Smarius break; 1968322120Smarius } 1969322120Smarius if (i != j) 1970322120Smarius sc->child_list[i] = child; 1971322120Smarius } 1972322120Smarius sc->child_list = realloc(sc->child_list, sizeof(device_t) * 1973322120Smarius sc->child_count, M_DEVBUF, M_WAITOK); 1974322120Smarius} 1975322120Smarius 1976322120Smariusstatic void 1977185721Smavmmc_rescan_cards(struct mmc_softc *sc) 1978185721Smav{ 1979318198Smarius struct mmc_ivars *ivar; 1980322120Smarius int err, i, j; 1981185721Smav 1982322120Smarius for (i = j = 0; i < sc->child_count; i++) { 1983322120Smarius ivar = device_get_ivars(sc->child_list[i]); 1984318198Smarius if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE) { 1985187875Smav if (bootverbose || mmc_debug) 1986318198Smarius device_printf(sc->dev, 1987322120Smarius "Card at relative address %d lost\n", 1988187875Smav ivar->rca); 1989322120Smarius err = device_delete_child(sc->dev, sc->child_list[i]); 1990322120Smarius if (err != 0) { 1991322120Smarius j++; 1992322120Smarius continue; 1993322120Smarius } 1994185721Smav free(ivar, M_DEVBUF); 1995322120Smarius } else 1996322120Smarius j++; 1997185721Smav } 1998322120Smarius if (sc->child_count == j) 1999322120Smarius goto out; 2000322120Smarius sc->child_count = j; 2001322120Smarius mmc_update_child_list(sc); 2002322120Smariusout: 2003322120Smarius (void)mmc_select_card(sc, 0); 2004185721Smav} 2005185721Smav 2006185721Smavstatic int 2007322120Smariusmmc_delete_cards(struct mmc_softc *sc, bool final) 2008185721Smav{ 2009185721Smav struct mmc_ivars *ivar; 2010322120Smarius int err, i, j; 2011185721Smav 2012322120Smarius err = 0; 2013322120Smarius for (i = j = 0; i < sc->child_count; i++) { 2014322120Smarius ivar = device_get_ivars(sc->child_list[i]); 2015187875Smav if (bootverbose || mmc_debug) 2016318198Smarius device_printf(sc->dev, 2017322120Smarius "Card at relative address %d deleted\n", 2018187875Smav ivar->rca); 2019322120Smarius err = device_delete_child(sc->dev, sc->child_list[i]); 2020322120Smarius if (err != 0) { 2021322120Smarius j++; 2022322120Smarius if (final == false) 2023322120Smarius continue; 2024322120Smarius else 2025322120Smarius break; 2026322120Smarius } 2027185721Smav free(ivar, M_DEVBUF); 2028185721Smav } 2029322120Smarius sc->child_count = j; 2030322120Smarius mmc_update_child_list(sc); 2031322120Smarius return (err); 2032185721Smav} 2033185721Smav 2034185721Smavstatic void 2035163516Simpmmc_go_discovery(struct mmc_softc *sc) 2036163516Simp{ 2037163516Simp uint32_t ocr; 2038163516Simp device_t dev; 2039183704Smav int err; 2040163516Simp 2041163516Simp dev = sc->dev; 2042163516Simp if (mmcbr_get_power_mode(dev) != power_on) { 2043183453Simp /* 2044183453Simp * First, try SD modes 2045183453Simp */ 2046276288Sian sc->squelched++; /* Errors are expected, squelch reporting. */ 2047163516Simp mmcbr_set_mode(dev, mode_sd); 2048163516Simp mmc_power_up(sc); 2049163516Simp mmcbr_set_bus_mode(dev, pushpull); 2050187875Smav if (bootverbose || mmc_debug) 2051187875Smav device_printf(sc->dev, "Probing bus\n"); 2052163516Simp mmc_idle_cards(sc); 2053183704Smav err = mmc_send_if_cond(sc, 1); 2054187875Smav if ((bootverbose || mmc_debug) && err == 0) 2055318198Smarius device_printf(sc->dev, 2056318198Smarius "SD 2.0 interface conditions: OK\n"); 2057236156Smarius if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { 2058187875Smav if (bootverbose || mmc_debug) 2059187875Smav device_printf(sc->dev, "SD probe: failed\n"); 2060183453Simp /* 2061183453Simp * Failed, try MMC 2062183453Simp */ 2063163516Simp mmcbr_set_mode(dev, mode_mmc); 2064187875Smav if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { 2065187875Smav if (bootverbose || mmc_debug) 2066318198Smarius device_printf(sc->dev, 2067318198Smarius "MMC probe: failed\n"); 2068185721Smav ocr = 0; /* Failed both, powerdown. */ 2069187875Smav } else if (bootverbose || mmc_debug) 2070187875Smav device_printf(sc->dev, 2071187875Smav "MMC probe: OK (OCR: 0x%08x)\n", ocr); 2072187875Smav } else if (bootverbose || mmc_debug) 2073318198Smarius device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n", 2074318198Smarius ocr); 2075276288Sian sc->squelched--; 2076187875Smav 2077163516Simp mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr)); 2078163516Simp if (mmcbr_get_ocr(dev) != 0) 2079163516Simp mmc_idle_cards(sc); 2080163516Simp } else { 2081163516Simp mmcbr_set_bus_mode(dev, opendrain); 2082318495Smarius mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY); 2083163516Simp mmcbr_update_ios(dev); 2084183453Simp /* XXX recompute vdd based on new cards? */ 2085163516Simp } 2086163516Simp /* 2087163516Simp * Make sure that we have a mutually agreeable voltage to at least 2088163516Simp * one card on the bus. 2089163516Simp */ 2090187875Smav if (bootverbose || mmc_debug) 2091318198Smarius device_printf(sc->dev, "Current OCR: 0x%08x\n", 2092318198Smarius mmcbr_get_ocr(dev)); 2093185721Smav if (mmcbr_get_ocr(dev) == 0) { 2094266200Sian device_printf(sc->dev, "No compatible cards found on bus\n"); 2095322120Smarius (void)mmc_delete_cards(sc, false); 2096185721Smav mmc_power_down(sc); 2097163516Simp return; 2098185721Smav } 2099163516Simp /* 2100163516Simp * Reselect the cards after we've idled them above. 2101163516Simp */ 2102183704Smav if (mmcbr_get_mode(dev) == mode_sd) { 2103183704Smav err = mmc_send_if_cond(sc, 1); 2104183704Smav mmc_send_app_op_cond(sc, 2105183775Simp (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); 2106183704Smav } else 2107283318Sian mmc_send_op_cond(sc, MMC_OCR_CCS | mmcbr_get_ocr(dev), NULL); 2108163516Simp mmc_discover_cards(sc); 2109185721Smav mmc_rescan_cards(sc); 2110163516Simp 2111163516Simp mmcbr_set_bus_mode(dev, pushpull); 2112163516Simp mmcbr_update_ios(dev); 2113183763Smav mmc_calculate_clock(sc); 2114163516Simp} 2115163516Simp 2116163516Simpstatic int 2117163516Simpmmc_calculate_clock(struct mmc_softc *sc) 2118163516Simp{ 2119322120Smarius device_t dev; 2120183704Smav struct mmc_ivars *ivar; 2121322120Smarius int i; 2122318495Smarius uint32_t dtr, max_dtr; 2123322120Smarius uint16_t rca; 2124318495Smarius enum mmc_bus_timing max_timing, timing; 2125322120Smarius bool changed, hs400; 2126312400Smarius 2127322120Smarius dev = sc->dev; 2128322120Smarius max_dtr = mmcbr_get_f_max(dev); 2129322120Smarius max_timing = bus_timing_max; 2130318495Smarius do { 2131318495Smarius changed = false; 2132322120Smarius for (i = 0; i < sc->child_count; i++) { 2133322120Smarius ivar = device_get_ivars(sc->child_list[i]); 2134322120Smarius if (isclr(&ivar->timings, max_timing) || 2135322120Smarius !mmc_host_timing(dev, max_timing)) { 2136322120Smarius for (timing = max_timing - 1; timing >= 2137318495Smarius bus_timing_normal; timing--) { 2138322120Smarius if (isset(&ivar->timings, timing) && 2139322120Smarius mmc_host_timing(dev, timing)) { 2140318495Smarius max_timing = timing; 2141318495Smarius break; 2142318495Smarius } 2143318495Smarius } 2144318495Smarius changed = true; 2145318495Smarius } 2146318495Smarius dtr = mmc_timing_to_dtr(ivar, max_timing); 2147318495Smarius if (dtr < max_dtr) { 2148318495Smarius max_dtr = dtr; 2149318495Smarius changed = true; 2150318495Smarius } 2151318495Smarius } 2152318495Smarius } while (changed == true); 2153322120Smarius 2154318198Smarius if (bootverbose || mmc_debug) { 2155322120Smarius device_printf(dev, 2156318495Smarius "setting transfer rate to %d.%03dMHz (%s timing)\n", 2157318198Smarius max_dtr / 1000000, (max_dtr / 1000) % 1000, 2158318495Smarius mmc_timing_to_string(max_timing)); 2159318198Smarius } 2160322120Smarius 2161322120Smarius /* 2162322120Smarius * HS400 must be tuned in HS200 mode, so in case of HS400 we begin 2163322120Smarius * with HS200 following the sequence as described in "6.6.2.2 HS200 2164322120Smarius * timing mode selection" of the eMMC specification v5.1, too, and 2165322120Smarius * switch to max_timing later. HS400ES requires no tuning and, thus, 2166322120Smarius * can be switch to directly, but requires the same detour via high 2167322120Smarius * speed mode as does HS400 (see mmc_switch_to_hs400()). 2168322120Smarius */ 2169322120Smarius hs400 = max_timing == bus_timing_mmc_hs400; 2170322120Smarius timing = hs400 == true ? bus_timing_mmc_hs200 : max_timing; 2171322120Smarius for (i = 0; i < sc->child_count; i++) { 2172322120Smarius ivar = device_get_ivars(sc->child_list[i]); 2173318495Smarius if ((ivar->timings & ~(1 << bus_timing_normal)) == 0) 2174340741Smarius goto clock; 2175322120Smarius 2176322120Smarius rca = ivar->rca; 2177322120Smarius if (mmc_select_card(sc, rca) != MMC_ERR_NONE) { 2178322120Smarius device_printf(dev, "Card at relative address %d " 2179322120Smarius "failed to select\n", rca); 2180322120Smarius continue; 2181322120Smarius } 2182322120Smarius 2183322120Smarius if (timing == bus_timing_mmc_hs200 || /* includes HS400 */ 2184322120Smarius timing == bus_timing_mmc_hs400es) { 2185322120Smarius if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) { 2186322120Smarius device_printf(dev, "Failed to set VCCQ for " 2187322120Smarius "card at relative address %d\n", rca); 2188322120Smarius continue; 2189322120Smarius } 2190322120Smarius } 2191322120Smarius 2192322120Smarius if (timing == bus_timing_mmc_hs200) { /* includes HS400 */ 2193322120Smarius /* Set bus width (required for initial tuning). */ 2194322120Smarius if (mmc_set_card_bus_width(sc, ivar, timing) != 2195322120Smarius MMC_ERR_NONE) { 2196322120Smarius device_printf(dev, "Card at relative address " 2197322120Smarius "%d failed to set bus width\n", rca); 2198322120Smarius continue; 2199322120Smarius } 2200322120Smarius mmcbr_set_bus_width(dev, ivar->bus_width); 2201322120Smarius mmcbr_update_ios(dev); 2202322120Smarius } else if (timing == bus_timing_mmc_hs400es) { 2203322120Smarius if (mmc_switch_to_hs400(sc, ivar, max_dtr, timing) != 2204322120Smarius MMC_ERR_NONE) { 2205322120Smarius device_printf(dev, "Card at relative address " 2206322120Smarius "%d failed to set %s timing\n", rca, 2207322120Smarius mmc_timing_to_string(timing)); 2208322120Smarius continue; 2209322120Smarius } 2210322120Smarius goto power_class; 2211322120Smarius } 2212322120Smarius 2213322120Smarius if (mmc_set_timing(sc, ivar, timing) != MMC_ERR_NONE) { 2214322120Smarius device_printf(dev, "Card at relative address %d " 2215322120Smarius "failed to set %s timing\n", rca, 2216322120Smarius mmc_timing_to_string(timing)); 2217322120Smarius continue; 2218322120Smarius } 2219322120Smarius 2220322120Smarius if (timing == bus_timing_mmc_ddr52) { 2221322120Smarius /* 2222322120Smarius * Set EXT_CSD_BUS_WIDTH_n_DDR in EXT_CSD_BUS_WIDTH 2223322120Smarius * (must be done after switching to EXT_CSD_HS_TIMING). 2224322120Smarius */ 2225322120Smarius if (mmc_set_card_bus_width(sc, ivar, timing) != 2226322120Smarius MMC_ERR_NONE) { 2227322120Smarius device_printf(dev, "Card at relative address " 2228322120Smarius "%d failed to set bus width\n", rca); 2229322120Smarius continue; 2230322120Smarius } 2231322120Smarius mmcbr_set_bus_width(dev, ivar->bus_width); 2232322120Smarius mmcbr_update_ios(dev); 2233322120Smarius if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) { 2234322120Smarius device_printf(dev, "Failed to set VCCQ for " 2235322120Smarius "card at relative address %d\n", rca); 2236322120Smarius continue; 2237322120Smarius } 2238322120Smarius } 2239322120Smarius 2240340741Smariusclock: 2241322120Smarius /* Set clock (must be done before initial tuning). */ 2242322120Smarius mmcbr_set_clock(dev, max_dtr); 2243322120Smarius mmcbr_update_ios(dev); 2244322120Smarius 2245322120Smarius if (mmcbr_tune(dev, hs400) != 0) { 2246322120Smarius device_printf(dev, "Card at relative address %d " 2247322120Smarius "failed to execute initial tuning\n", rca); 2248322120Smarius continue; 2249322120Smarius } 2250322120Smarius 2251322120Smarius if (hs400 == true && mmc_switch_to_hs400(sc, ivar, max_dtr, 2252322120Smarius max_timing) != MMC_ERR_NONE) { 2253322120Smarius device_printf(dev, "Card at relative address %d " 2254322120Smarius "failed to set %s timing\n", rca, 2255322120Smarius mmc_timing_to_string(max_timing)); 2256322120Smarius continue; 2257322120Smarius } 2258322120Smarius 2259322120Smariuspower_class: 2260322120Smarius if (mmc_set_power_class(sc, ivar) != MMC_ERR_NONE) { 2261322120Smarius device_printf(dev, "Card at relative address %d " 2262322120Smarius "failed to set power class\n", rca); 2263322120Smarius } 2264183704Smav } 2265322120Smarius (void)mmc_select_card(sc, 0); 2266318198Smarius return (max_dtr); 2267163516Simp} 2268163516Simp 2269322120Smarius/* 2270322120Smarius * Switch from HS200 to HS400 (either initially or for re-tuning) or directly 2271322120Smarius * to HS400ES. This follows the sequences described in "6.6.2.3 HS400 timing 2272322120Smarius * mode selection" of the eMMC specification v5.1. 2273322120Smarius */ 2274322120Smariusstatic int 2275322120Smariusmmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar, 2276322120Smarius uint32_t clock, enum mmc_bus_timing max_timing) 2277322120Smarius{ 2278322120Smarius device_t dev; 2279322120Smarius int err; 2280322120Smarius uint16_t rca; 2281322120Smarius 2282322120Smarius dev = sc->dev; 2283322120Smarius rca = ivar->rca; 2284322120Smarius 2285322120Smarius /* 2286322120Smarius * Both clock and timing must be set as appropriate for high speed 2287322120Smarius * before eventually switching to HS400/HS400ES; mmc_set_timing() 2288322120Smarius * will issue mmcbr_update_ios(). 2289322120Smarius */ 2290322120Smarius mmcbr_set_clock(dev, ivar->hs_tran_speed); 2291322120Smarius err = mmc_set_timing(sc, ivar, bus_timing_hs); 2292322120Smarius if (err != MMC_ERR_NONE) 2293322120Smarius return (err); 2294322120Smarius 2295322120Smarius /* 2296322120Smarius * Set EXT_CSD_BUS_WIDTH_8_DDR in EXT_CSD_BUS_WIDTH (and additionally 2297322120Smarius * EXT_CSD_BUS_WIDTH_ES for HS400ES). 2298322120Smarius */ 2299322120Smarius err = mmc_set_card_bus_width(sc, ivar, max_timing); 2300322120Smarius if (err != MMC_ERR_NONE) 2301322120Smarius return (err); 2302322120Smarius mmcbr_set_bus_width(dev, ivar->bus_width); 2303322120Smarius mmcbr_update_ios(dev); 2304322120Smarius 2305322120Smarius /* Finally, switch to HS400/HS400ES mode. */ 2306322120Smarius err = mmc_set_timing(sc, ivar, max_timing); 2307322120Smarius if (err != MMC_ERR_NONE) 2308322120Smarius return (err); 2309322120Smarius mmcbr_set_clock(dev, clock); 2310322120Smarius mmcbr_update_ios(dev); 2311322120Smarius return (MMC_ERR_NONE); 2312322120Smarius} 2313322120Smarius 2314322120Smarius/* 2315322120Smarius * Switch from HS400 to HS200 (for re-tuning). 2316322120Smarius */ 2317322120Smariusstatic int 2318322120Smariusmmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar, 2319322120Smarius uint32_t clock) 2320322120Smarius{ 2321322120Smarius device_t dev; 2322322120Smarius int err; 2323322120Smarius uint16_t rca; 2324322120Smarius 2325322120Smarius dev = sc->dev; 2326322120Smarius rca = ivar->rca; 2327322120Smarius 2328322120Smarius /* 2329322120Smarius * Both clock and timing must initially be set as appropriate for 2330322120Smarius * DDR52 before eventually switching to HS200; mmc_set_timing() 2331322120Smarius * will issue mmcbr_update_ios(). 2332322120Smarius */ 2333322120Smarius mmcbr_set_clock(dev, ivar->hs_tran_speed); 2334322120Smarius err = mmc_set_timing(sc, ivar, bus_timing_mmc_ddr52); 2335322120Smarius if (err != MMC_ERR_NONE) 2336322120Smarius return (err); 2337322120Smarius 2338322120Smarius /* 2339322120Smarius * Next, switch to high speed. Thus, clear EXT_CSD_BUS_WIDTH_n_DDR 2340322120Smarius * in EXT_CSD_BUS_WIDTH and update bus width and timing in ios. 2341322120Smarius */ 2342322120Smarius err = mmc_set_card_bus_width(sc, ivar, bus_timing_hs); 2343322120Smarius if (err != MMC_ERR_NONE) 2344322120Smarius return (err); 2345322120Smarius mmcbr_set_bus_width(dev, ivar->bus_width); 2346322120Smarius mmcbr_set_timing(sc->dev, bus_timing_hs); 2347322120Smarius mmcbr_update_ios(dev); 2348322120Smarius 2349322120Smarius /* Finally, switch to HS200 mode. */ 2350322120Smarius err = mmc_set_timing(sc, ivar, bus_timing_mmc_hs200); 2351322120Smarius if (err != MMC_ERR_NONE) 2352322120Smarius return (err); 2353322120Smarius mmcbr_set_clock(dev, clock); 2354322120Smarius mmcbr_update_ios(dev); 2355322120Smarius return (MMC_ERR_NONE); 2356322120Smarius} 2357322120Smarius 2358322120Smariusstatic int 2359322120Smariusmmc_retune(device_t busdev, device_t dev, bool reset) 2360322120Smarius{ 2361322120Smarius struct mmc_softc *sc; 2362322120Smarius struct mmc_ivars *ivar; 2363322120Smarius int err; 2364322120Smarius uint32_t clock; 2365322120Smarius enum mmc_bus_timing timing; 2366322120Smarius 2367322120Smarius if (device_get_parent(dev) != busdev) 2368322120Smarius return (MMC_ERR_INVALID); 2369322120Smarius 2370322120Smarius sc = device_get_softc(busdev); 2371322120Smarius if (sc->retune_needed != 1 && sc->retune_paused != 0) 2372322120Smarius return (MMC_ERR_INVALID); 2373322120Smarius 2374322120Smarius timing = mmcbr_get_timing(busdev); 2375322120Smarius if (timing == bus_timing_mmc_hs400) { 2376322120Smarius /* 2377322120Smarius * Controllers use the data strobe line to latch data from 2378322120Smarius * the devices in HS400 mode so periodic re-tuning isn't 2379322120Smarius * expected to be required, i. e. only if a CRC or tuning 2380322120Smarius * error is signaled to the bridge. In these latter cases 2381322120Smarius * we are asked to reset the tuning circuit and need to do 2382322120Smarius * the switch timing dance. 2383322120Smarius */ 2384322120Smarius if (reset == false) 2385322120Smarius return (0); 2386322120Smarius ivar = device_get_ivars(dev); 2387322120Smarius clock = mmcbr_get_clock(busdev); 2388322120Smarius if (mmc_switch_to_hs200(sc, ivar, clock) != MMC_ERR_NONE) 2389322120Smarius return (MMC_ERR_BADCRC); 2390322120Smarius } 2391322120Smarius err = mmcbr_retune(busdev, reset); 2392322120Smarius if (err != 0 && timing == bus_timing_mmc_hs400) 2393322120Smarius return (MMC_ERR_BADCRC); 2394322120Smarius switch (err) { 2395322120Smarius case 0: 2396322120Smarius break; 2397322120Smarius case EIO: 2398322120Smarius return (MMC_ERR_FAILED); 2399322120Smarius default: 2400322120Smarius return (MMC_ERR_INVALID); 2401322120Smarius } 2402322120Smarius if (timing == bus_timing_mmc_hs400) { 2403322120Smarius if (mmc_switch_to_hs400(sc, ivar, clock, timing) != 2404322120Smarius MMC_ERR_NONE) 2405322120Smarius return (MMC_ERR_BADCRC); 2406322120Smarius } 2407322120Smarius return (MMC_ERR_NONE); 2408322120Smarius} 2409322120Smarius 2410163516Simpstatic void 2411322120Smariusmmc_retune_pause(device_t busdev, device_t dev, bool retune) 2412322120Smarius{ 2413322120Smarius struct mmc_softc *sc; 2414322120Smarius 2415322120Smarius sc = device_get_softc(busdev); 2416322120Smarius KASSERT(device_get_parent(dev) == busdev, 2417322120Smarius ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev), 2418322120Smarius device_get_nameunit(busdev))); 2419322120Smarius KASSERT(sc->owner != NULL, 2420322120Smarius ("%s: Request from %s without bus being acquired.", __func__, 2421322120Smarius device_get_nameunit(dev))); 2422322120Smarius 2423322120Smarius if (retune == true && sc->retune_paused == 0) 2424322120Smarius sc->retune_needed = 1; 2425322120Smarius sc->retune_paused++; 2426322120Smarius} 2427322120Smarius 2428322120Smariusstatic void 2429322120Smariusmmc_retune_unpause(device_t busdev, device_t dev) 2430322120Smarius{ 2431322120Smarius struct mmc_softc *sc; 2432322120Smarius 2433322120Smarius sc = device_get_softc(busdev); 2434322120Smarius KASSERT(device_get_parent(dev) == busdev, 2435322120Smarius ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev), 2436322120Smarius device_get_nameunit(busdev))); 2437322120Smarius KASSERT(sc->owner != NULL, 2438322120Smarius ("%s: Request from %s without bus being acquired.", __func__, 2439322120Smarius device_get_nameunit(dev))); 2440322120Smarius KASSERT(sc->retune_paused != 0, 2441322120Smarius ("%s: Re-tune pause count already at 0", __func__)); 2442322120Smarius 2443322120Smarius sc->retune_paused--; 2444322120Smarius} 2445322120Smarius 2446322120Smariusstatic void 2447163516Simpmmc_scan(struct mmc_softc *sc) 2448163516Simp{ 2449185721Smav device_t dev = sc->dev; 2450322120Smarius int err; 2451163516Simp 2452322120Smarius err = mmc_acquire_bus(dev, dev); 2453322120Smarius if (err != 0) { 2454322120Smarius device_printf(dev, "Failed to acquire bus for scanning\n"); 2455322120Smarius return; 2456322120Smarius } 2457163516Simp mmc_go_discovery(sc); 2458322120Smarius err = mmc_release_bus(dev, dev); 2459322120Smarius if (err != 0) { 2460322120Smarius device_printf(dev, "Failed to release bus after scanning\n"); 2461322120Smarius return; 2462322120Smarius } 2463322120Smarius (void)bus_generic_attach(dev); 2464163516Simp} 2465163516Simp 2466163516Simpstatic int 2467189727Simpmmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result) 2468163516Simp{ 2469163516Simp struct mmc_ivars *ivar = device_get_ivars(child); 2470163516Simp 2471163516Simp switch (which) { 2472163516Simp default: 2473163516Simp return (EINVAL); 2474318198Smarius case MMC_IVAR_SPEC_VERS: 2475318198Smarius *result = ivar->csd.spec_vers; 2476318198Smarius break; 2477163516Simp case MMC_IVAR_DSR_IMP: 2478222475Sjchandra *result = ivar->csd.dsr_imp; 2479163516Simp break; 2480163516Simp case MMC_IVAR_MEDIA_SIZE: 2481222475Sjchandra *result = ivar->sec_count; 2482163516Simp break; 2483163516Simp case MMC_IVAR_RCA: 2484222475Sjchandra *result = ivar->rca; 2485163516Simp break; 2486163516Simp case MMC_IVAR_SECTOR_SIZE: 2487222475Sjchandra *result = MMC_SECTOR_SIZE; 2488163516Simp break; 2489163516Simp case MMC_IVAR_TRAN_SPEED: 2490222475Sjchandra *result = mmcbr_get_clock(bus); 2491163516Simp break; 2492183447Simp case MMC_IVAR_READ_ONLY: 2493222475Sjchandra *result = ivar->read_only; 2494183447Simp break; 2495183704Smav case MMC_IVAR_HIGH_CAP: 2496222475Sjchandra *result = ivar->high_cap; 2497183704Smav break; 2498183763Smav case MMC_IVAR_CARD_TYPE: 2499222475Sjchandra *result = ivar->mode; 2500183763Smav break; 2501183763Smav case MMC_IVAR_BUS_WIDTH: 2502222475Sjchandra *result = ivar->bus_width; 2503183763Smav break; 2504184033Smav case MMC_IVAR_ERASE_SECTOR: 2505222475Sjchandra *result = ivar->erase_sector; 2506184033Smav break; 2507184452Smav case MMC_IVAR_MAX_DATA: 2508222475Sjchandra *result = mmcbr_get_max_data(bus); 2509184452Smav break; 2510322389Smarius case MMC_IVAR_CMD6_TIMEOUT: 2511322389Smarius *result = ivar->cmd6_time; 2512322389Smarius break; 2513322389Smarius case MMC_IVAR_QUIRKS: 2514322389Smarius *result = ivar->quirks; 2515322389Smarius break; 2516234524Smarius case MMC_IVAR_CARD_ID_STRING: 2517234524Smarius *(char **)result = ivar->card_id_string; 2518234524Smarius break; 2519269795Sian case MMC_IVAR_CARD_SN_STRING: 2520269795Sian *(char **)result = ivar->card_sn_string; 2521269795Sian break; 2522163516Simp } 2523163516Simp return (0); 2524163516Simp} 2525163516Simp 2526163516Simpstatic int 2527163516Simpmmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value) 2528163516Simp{ 2529318198Smarius 2530183453Simp /* 2531183453Simp * None are writable ATM 2532183453Simp */ 2533183453Simp return (EINVAL); 2534163516Simp} 2535163516Simp 2536163516Simpstatic void 2537163516Simpmmc_delayed_attach(void *xsc) 2538163516Simp{ 2539163516Simp struct mmc_softc *sc = xsc; 2540312400Smarius 2541163516Simp mmc_scan(sc); 2542163516Simp config_intrhook_disestablish(&sc->config_intrhook); 2543163516Simp} 2544163516Simp 2545208441Smavstatic int 2546208441Smavmmc_child_location_str(device_t dev, device_t child, char *buf, 2547208441Smav size_t buflen) 2548208441Smav{ 2549208441Smav 2550208441Smav snprintf(buf, buflen, "rca=0x%04x", mmc_get_rca(child)); 2551208441Smav return (0); 2552208441Smav} 2553208441Smav 2554163516Simpstatic device_method_t mmc_methods[] = { 2555163516Simp /* device_if */ 2556163516Simp DEVMETHOD(device_probe, mmc_probe), 2557163516Simp DEVMETHOD(device_attach, mmc_attach), 2558163516Simp DEVMETHOD(device_detach, mmc_detach), 2559185721Smav DEVMETHOD(device_suspend, mmc_suspend), 2560185721Smav DEVMETHOD(device_resume, mmc_resume), 2561163516Simp 2562163516Simp /* Bus interface */ 2563163516Simp DEVMETHOD(bus_read_ivar, mmc_read_ivar), 2564163516Simp DEVMETHOD(bus_write_ivar, mmc_write_ivar), 2565208441Smav DEVMETHOD(bus_child_location_str, mmc_child_location_str), 2566163516Simp 2567163516Simp /* MMC Bus interface */ 2568322120Smarius DEVMETHOD(mmcbus_retune_pause, mmc_retune_pause), 2569322120Smarius DEVMETHOD(mmcbus_retune_unpause, mmc_retune_unpause), 2570163516Simp DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request), 2571163516Simp DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus), 2572163516Simp DEVMETHOD(mmcbus_release_bus, mmc_release_bus), 2573163516Simp 2574234524Smarius DEVMETHOD_END 2575163516Simp}; 2576163516Simp 2577318198Smariusdriver_t mmc_driver = { 2578163516Simp "mmc", 2579163516Simp mmc_methods, 2580163516Simp sizeof(struct mmc_softc), 2581163516Simp}; 2582318198Smariusdevclass_t mmc_devclass; 2583163516Simp 2584318198SmariusMODULE_VERSION(mmc, MMC_VERSION); 2585