MFC: r340495

- Restore setting the clock for devices which support the default/legacy
transfer mode only (lost with r321385). [1]
- Similarly, don't try to set the power class on MMC devices that comply
to version 4.0 of the system specification but are operated in default/
legacy transfer or 1-bit bus mode as no power class is specified for
these cases. Trying to set a power class nevertheless resulted in an -
albeit harmless - error message.

PR: 231713 [1]

MFC: r333614, r333647, r338275, r338280, r338513

- Let mmcsd_ioctl() ensure appropriate privileges via priv_check(9).
- If present, take advantage of the R/W cache of eMMC revision 1.5 and
later devices. These caches work akin to the ones found in HDDs/SSDs
that ada(4)/da(4) also enable if existent, but likewise increase the
likelihood of data loss in case of a sudden power outage etc. On the
other hand, write performance is up to twice as high for e. g. 1 GiB
files depending on the actual chip and transfer mode employed.
For maximum data integrity, the usage of eMMC caches can be disabled
via the hw.mmcsd.cache tunable.
- Get rid of the NOP mmcsd_open().
- Obtain the bus mode (MMC or SD) from the directly superordinated
bus rather than reaching up to the bridge and use the cached mode
in mmcsd_delete(), too.
- Use le32dec(9) for decoding EXT_CSD values where it makes sense. [1]
- Locally cache some instance variable values in mmc_discover_cards()
in order to improve the code readability a bit.

Obtained from: NetBSD [1]

MFC: r327929

Use the correct revision specifier (EXT_CSD revision rather than
system specification version) for deciding whether the EXT_CSD
register includes the EXT_CSD_GEN_CMD6_TIME field.

Submitted by: Masanobu SAITOH

MFC: r322209

- If available, use TRIM instead of ERASE for implementing BIO_DELETE.
This also involves adding a quirk table as TRIM is broken for some
Kingston eMMC devices, though. Compared to ERASE (declared "legacy"
in the eMMC specification v5.1), TRIM has the advantage of operating
on write sectors rather than on erase sectors, which typically are
of a much larger size. Thus, employing TRIM, we don't need to fiddle
with coalescing BIO_DELETE requests that are also of (write) sector
units into erase sectors, which might not even add up in all cases.
- For some SanDisk iNAND devices, the CMD38 argument, e. g. ERASE,
TRIM etc., has to be specified via EXT_CSD[113], which now is also
handled via a quirk.
- My initial understanding was that for eMMC partitions, the granularity
should be used as erase sector size, e. g. 128 KB for boot partitions.
However, rereading the relevant parts of the eMMC specification v5.1,
this isn't actually correct. So drop the code which used partition
granularities for delmaxsize and stripesize. For the most part, this
change is a NOP, though, because a) for ERASE, mmcsd_delete() used
the erase sector size unconditionally for all partitions anyway and
b) g_disk_limit() doesn't actually take the stripesize into account.
- Take some more advantage of mmcsd_errmsg() in mmcsd(4) for making
error codes human readable.

MFC: r319350, r320620, r321385, r321490, r321588, r321948

o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in
SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which
are meant for setting the driver type in SDHCI_HOST_CONTROL2.

o Correct a typo in the comment part of r320577 (MFCed to stable/10 in
r320899).

o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to
sdhci(4), mmc(4) and mmcsd(4).

On the system where the addition of DDR52 support increased the read
throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields
~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than
quadrupled compared to pre-r315598 (pre-r318495 in stable/10).

However, in fact this isn't a feature-only change; there are boards
based on Intel Bay Trail where DDR52 is problematic and the suggested
workaround is to use HS200 mode instead. So far exact details are
unknown, however, i. e. whether that's due to a defect in these SoCs
or on the boards.

Moreover, due to the above changes requiring to be aware of possible
MMC siblings in the fast path of mmc(4), corresponding information
now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(),
now longer will trigger a panic in low memory situations and all of
mmc(4) operate on the same set of child devices.

o Fix a bug in the failure reporting of mmcsd_delete() that could lead
to a panic.

o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and
another one in mmc(4) that could lead to devices no longer working.

o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1]

o Fix missing variable initialization in mmc_switch_status(). [2]

o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3]

o Handle the case of device_add_child(9) failing, for example due to
a memory shortage, gracefully in mmc(4) and sdhci(4), including not
leaking memory for the instance variables in case of mmc(4), also
fixing [4].

o Correctly use the size of a pointer rather than that of a pointer to
a pointer (this bug was present in head r321385 only, i. e. not in a
stable branch). [5]

o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd()
gracefully instead of calling panic(9).

o Again, check and handle the return values of some additional function
calls in mmc(4) instead of assuming that everything went right or mark
non-fatal errors by casting the return value to void.

o Correct a typo in the Linux IOCTL compatibility; it should have been
MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI.

o Now that we are reaching ever faster speeds (more improvement in this
regard is to be expected when adding ADMA support to sdhci(4)), apply
a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4).

o Correct confusing and error prone mix-ups between "br" or "bridge" in
mmc(4) and mmcsd(4) where - according to the terminology outlined in
comments of bridge.h and mmcbr_if.m around since their addition in
r163516 - the bus is meant and used instead.

o Remove comment lines from bridge.h incorrectly suggesting that there
would be a MMC bridge base class driver.

o Update comments in bridge.h regarding the star topology of SD and SDIO;
since version 3.00 of the SDHCI specification, for eSD and eSDIO bus
topologies are actually possible in form of so called "shared buses"
(in some subcontext later on renamed to "embedded" buses).

Reported by: Coverity
CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4],
1378432 [5]

MFC: r315598

o Add support for eMMC DDR bus speed mode up to 52 MHz to sdhci(4)
and mmc(4). Given that support for DDR52 is not denoted by SDHCI
capability registers, availability of that timing is indicated by
a new quirk SDHCI_QUIRK_MMC_DDR52 and only enabled for Intel SDHCI
controllers so far.

Compared to 50 MHz at SDR high speed typically yielding ~45 MB/s
read throughput with the eMMC chips tested, read performance goes
up to ~80 MB/s at DDR52.

As a side-effect, this change also fixes communication with some
eMMC devices at SDR high speed mode due to the signaling voltage
and UHS bits in the SDHCI controller no longer being left in an
inappropriate state.

o In sdhci(4), add two tunables hw.sdhci.quirk_clear as well as
hw.sdhci.quirk_set, which (when hooked up in the front-end)
allow to set/clear sdhci(4) quirks for debugging and testing
purposes. However, especially for SDHCI controllers on the
PCI bus which have no specific support code so far and, thus,
are picked up as generic SDHCI controllers, hw.sdhci.quirk_set
allows for setting the necessary quirks (if required).

o In mmc(4), check and handle the return values of some more
function calls instead of assuming that everything went right.
In case failures actually are not problematic, indicate that
by casting the return value to void.

MFC: r292180 (partial), r297127 (partial), r311911, r311923, r312939,
r313250, r313712, r314811 (partial), r314887 (partial), r315430,
r317981, r315466

o Move the DRIVER_MODULE() statements that declare mmc(4) to be a child
of the various bridge drivers out of dev/mmc.c and into the bridge
drivers.

o Add ACPI platform support for SDHCI driver.

o Fix some overly long lines, whitespace and other bugs according to
style(9) as well as spelling etc. in mmc(4), mmcsd(4) and sdhci(4).

o In the mmc(4) bridges and sdhci(4) (bus) front-ends:
- Remove redundant assignments of the default bus_generic_print_child
device method,
- use DEVMETHOD_END,
- use NULL instead of 0 for pointers.

o Trim/adjust includes.

o Add and use a MMC_DECLARE_BRIDGE macro for declaring mmc(4) bridges
as kernel drivers and their dependency onto mmc(4).

o Add support for eMMC "partitions". Besides the user data area, i. e.
the default partition, eMMC v4.41 and later devices can additionally
provide up to:
1 enhanced user data area partition
2 boot partitions
1 RPMB (Replay Protected Memory Block) partition
4 general purpose partitions (optionally with a enhanced or extended
attribute)

Besides simply subdividing eMMC devices, some Intel NUCs having UEFI
code in the boot partitions etc., another use case for the partition
support is the activation of pseudo-SLC mode, which manufacturers of
eMMC chips typically associate with the enhanced user data area and/
or the enhanced attribute of general purpose partitions.

CAVEAT EMPTOR: Partitioning eMMC devices is a one-time operation.

o Now that properly issuing CMD6 is crucial (so data isn't written to
the wrong partition for example), make a step into the direction of
correctly handling the timeout for these commands in the MMC layer.
Also, do a SEND_STATUS when CMD6 is invoked with an R1B response as
recommended by relevant specifications.

o Add an IOCTL interface to mmcsd(4); this is sufficiently compatible
with Linux so that the GNU mmc-utils can be ported to and used with
FreeBSD (note that due to the remaining deficiencies outlined above
SANITIZE operations issued by/with `mmc` currently most likely will
fail). These latter have been added to ports as sysutils/mmc-utils.
Among others, the `mmc` tool of mmc-utils allows for partitioning
eMMC devices (tested working).

o For devices following the eMMC specification v4.41 or later, year 0
is 2013 rather than 1997; so correct this for assembling the device
ID string properly.

o Let mmcsd.ko depend on mmc.ko. Additionally, bump MMC_VERSION as at
least for some of the above a matching pair is required.

MFC: r292420

Make SYSCTL hw.mmc.debug tunable, since often you want to debug the
bus probing during system startup.

MFC: r273180, r283754, r297329, r299414, r300707, r310309, r310340 (partial),
r310341, r311664, r311793-311794

o Use correct response bits for MMC_RSP_R4-R7 types

o Make sdhci(4) work after suspend/resume for chipsets that require
the frequency quirk. This makes it work on eg ThinkPad T420.

o Add a convenience macro that masks all the bits related to clock divisors
in all versions of the sdhci spec (the HI bits are just unused reserved
bits in earlier versions).

o sdhci/mmc: Minor whitespace cleanups

o Add Braswell PCI IDs for Intel Cherryview

o mmc: Accept even lower voltage for Cherryview

And HP x2 210, per DragonFlyBSD 240bd9cd58f8259c12c14a8006837e698.

o In mmcsd_task(), bio_resid was not being set to 0 on a successful read
or write, resulting in random short-read and short-write returns for
requests. Fixing this fixes nominal block I/O via mmcsd(4).

Obtained from: DragonFlyBSD (fd4b97583be1a1e57234713c25f6e81bc0411cb0)

o Add support for Intel Apollo Lake and Bay Trail eMMC PCI controllers.

o Flesh out the support for Intel Braswell eMMC controllers further.

o In sdhci_init_slot(), use the right capability field for determining
the announced bus width based on MMC_CAP_*_BIT_DATA.

MFC r261994, r275905, r275951, r276106, r283128, r285678: MMC driver fixes...

If no compatible cards were found after probing the bus, say so.

Don't deselect the card too soon. To set the block size or switch the
function parameters, the card has to be in transfer state. If it is in
the idle state, the commands are ignored. This caused us not to set
the proper parameters that we later assume to be present, leading to
downstream failures of the card / interface as our state machine
mismatches the card's.

Log mmc and sd command failures. Reporting of routine expected errors,
such as timeouts while probing a bus or testing for a feature, is
squelched. Also, error reporting is limited to 5 events per second,
because when an sdcard goes bad on a low-end embedded board, flooding
the console at high speed isn't helpful.

Always select the card before we do the 4.x specific stuff and
deselect it after setting the block size. This is a similar bug that
was fixed elsewhere, but not here. This makes sure that we leave the
card deselected at the end of the loop, and we don't send any commands
to the card without it selected.

Re-select the SD card before getting the SD status. On a couple Atmel
boards, this prevents some error messages during enumeration and also
gives us the correct erase block size. They appear to be harmless
elsewhere.

Deselect the sd card before re-selecting it when working around a problem
with some cards that causes them to become deselected after probing for
switch capabilities. The old workaround fixes the behavior with some cards,
but causes problems with the cards the behave correctly and don't become
deselected. Forcing a deselect then reselect appears to work correctly
with all cards in initial testing.

MFC r279359, r279360:

For new eMMC chips, we must signal controller HC capability in OP_COND command.

Detect, report and use 8-bit bus if is available.

MFC r275951: Log mmc and sd command failures.

MFC r269341: Populate disk->d_ident with the sd or mmc card's serial number.

MFC r261938, r261939, r261940, r261944, r261945, r261946, r261947, r261956, r261957, r261983, r261094,
r261955, r261958,

Add a driver to provide access to imx6 on-chip one-time-programmble data.

Make it possible to access the ocotp registers before the ocotp device
is attached, by establishing a temporary mapping of the registers when
necessary.

It turns out Freescale cleverly made the ocotp device compatible across
several different families of SoCs, so move it to the freescale directory
and prefix everything with fsl rather than imx6.

Convert the imx6 sdhci "R1B fix" from a busy-loop in the interrupt handler
to a callout.

Increase the wait time for acquiring the SD bus from 10 to 250ms.

If no compatible cards were found after probing the SD bus, say so.

Add timeout logic to sdhci, separate from the timeouts done by the hardware.

After a timeout, reset the controller using SDHCI_RESET_CMD|SDHCI_RESET_DATA
rather than SDHCI_RESET_ALL; the latter turns off clocks and power, removing
any possibility of recovering from the error.

Add a helper routine to depth-search the device tree for a node with a
matching 'compatible' property.

MFC r261423, r261424, r261516, r261513, r261562, r261563, r261564, r261565,
r261596, r261606

Add the imx sdhci controller.

Move Open Firmware device root on PowerPC, ARM, and MIPS systems to
a sub-node of nexus (ofwbus) rather than direct attach under nexus. This
fixes FDT on x86 and will make coexistence with ACPI on ARM systems easier.
SPARC is unchanged.

Add the missing ')' at end of sentence. Reword it to use a more common idiom.

Pass the kernel physical address to initarm through the boot param struct.

Make functions only used in vfp.c static, and remove vfp_enable.

Fix __syscall on armeb EABI. As it returns a 64-bit value it needs to
place 32-bit data in r1, not r0. 64-bit data is already packed correctly.

Use abp_physaddr for the physical address over KERNPHYSADDR. This helps us
remove the need to load the kernel at a fixed address.

Remove references to PHYSADDR where it's used only in debugging output.

Dynamically generate the page table. This will allow us to detect the
physical address we are loaded at to change the mapping.

MFC r279359, r279360:

For new eMMC chips, we must signal controller HC capability in OP_COND command.

Detect, report and use 8-bit bus if is available.

MFC r275951: Log mmc and sd command failures.

MFC r269341: Populate disk->d_ident with the sd or mmc card's serial number.

MFC r261938, r261939, r261940, r261944, r261945, r261946, r261947, r261956, r261957, r261983, r261094,
r261955, r261958,

Add a driver to provide access to imx6 on-chip one-time-programmble data.

Make it possible to access the ocotp registers before the ocotp device
is attached, by establishing a temporary mapping of the registers when
necessary.

It turns out Freescale cleverly made the ocotp device compatible across
several different families of SoCs, so move it to the freescale directory
and prefix everything with fsl rather than imx6.

Convert the imx6 sdhci "R1B fix" from a busy-loop in the interrupt handler
to a callout.

Increase the wait time for acquiring the SD bus from 10 to 250ms.

If no compatible cards were found after probing the SD bus, say so.

Add timeout logic to sdhci, separate from the timeouts done by the hardware.

After a timeout, reset the controller using SDHCI_RESET_CMD|SDHCI_RESET_DATA
rather than SDHCI_RESET_ALL; the latter turns off clocks and power, removing
any possibility of recovering from the error.

Add a helper routine to depth-search the device tree for a node with a
matching 'compatible' property.

MFC r261423, r261424, r261516, r261513, r261562, r261563, r261564, r261565,
r261596, r261606

Add the imx sdhci controller.

Move Open Firmware device root on PowerPC, ARM, and MIPS systems to
a sub-node of nexus (ofwbus) rather than direct attach under nexus. This
fixes FDT on x86 and will make coexistence with ACPI on ARM systems easier.
SPARC is unchanged.

Add the missing ')' at end of sentence. Reword it to use a more common idiom.

Pass the kernel physical address to initarm through the boot param struct.

Make functions only used in vfp.c static, and remove vfp_enable.

Fix __syscall on armeb EABI. As it returns a 64-bit value it needs to
place 32-bit data in r1, not r0. 64-bit data is already packed correctly.

Use abp_physaddr for the physical address over KERNPHYSADDR. This helps us
remove the need to load the kernel at a fixed address.

Remove references to PHYSADDR where it's used only in debugging output.

Dynamically generate the page table. This will allow us to detect the
physical address we are loaded at to change the mapping.