nsphy.c revision 213364
1/* $NetBSD: nsphy.c,v 1.18 1999/07/14 23:57:36 thorpej Exp $ */ 2 3/*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33/*- 34 * Copyright (c) 1997 Manuel Bouyer. All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 55 */ 56 57#include <sys/cdefs.h> 58__FBSDID("$FreeBSD: head/sys/dev/mii/nsphy.c 213364 2010-10-02 18:53:12Z marius $"); 59 60/* 61 * driver for National Semiconductor's DP83840A ethernet 10/100 PHY 62 * Data Sheet available from www.national.com 63 */ 64 65#include <sys/param.h> 66#include <sys/systm.h> 67#include <sys/kernel.h> 68#include <sys/socket.h> 69#include <sys/errno.h> 70#include <sys/module.h> 71#include <sys/bus.h> 72 73#include <net/if.h> 74#include <net/if_media.h> 75 76#include <dev/mii/mii.h> 77#include <dev/mii/miivar.h> 78#include "miidevs.h" 79 80#include <dev/mii/nsphyreg.h> 81 82#include "miibus_if.h" 83 84static int nsphy_probe(device_t); 85static int nsphy_attach(device_t); 86 87static device_method_t nsphy_methods[] = { 88 /* device interface */ 89 DEVMETHOD(device_probe, nsphy_probe), 90 DEVMETHOD(device_attach, nsphy_attach), 91 DEVMETHOD(device_detach, mii_phy_detach), 92 DEVMETHOD(device_shutdown, bus_generic_shutdown), 93 { 0, 0 } 94}; 95 96static devclass_t nsphy_devclass; 97 98static driver_t nsphy_driver = { 99 "nsphy", 100 nsphy_methods, 101 sizeof(struct mii_softc) 102}; 103 104DRIVER_MODULE(nsphy, miibus, nsphy_driver, nsphy_devclass, 0, 0); 105 106static int nsphy_service(struct mii_softc *, struct mii_data *, int); 107static void nsphy_status(struct mii_softc *); 108static void nsphy_reset(struct mii_softc *); 109 110static const struct mii_phydesc nsphys[] = { 111 MII_PHY_DESC(NATSEMI, DP83840), 112 MII_PHY_END 113}; 114 115static int 116nsphy_probe(device_t dev) 117{ 118 119 return (mii_phy_dev_probe(dev, nsphys, BUS_PROBE_DEFAULT)); 120} 121 122static int 123nsphy_attach(device_t dev) 124{ 125 struct mii_softc *sc; 126 struct mii_attach_args *ma; 127 struct mii_data *mii; 128 const char *nic; 129 130 sc = device_get_softc(dev); 131 ma = device_get_ivars(dev); 132 sc->mii_dev = device_get_parent(dev); 133 mii = ma->mii_data; 134 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 135 136 sc->mii_inst = mii->mii_instance++; 137 sc->mii_phy = ma->mii_phyno; 138 sc->mii_service = nsphy_service; 139 sc->mii_pdata = mii; 140 141 nic = device_get_name(device_get_parent(sc->mii_dev)); 142 /* 143 * Am79C971 and i82557 wedge when isolating all of their 144 * (external) PHYs. 145 */ 146 if (strcmp(nic, "fxp") == 0 || strcmp(nic, "pcn") == 0) 147 sc->mii_flags |= MIIF_NOISOLATE; 148 149 /* 150 * DP83840A used with HME chips don't advertise their media 151 * capabilities themselves properly so force writing the ANAR 152 * according to the BMSR in mii_phy_setmedia(). 153 */ 154 if (strcmp(nic, "hme") == 0) 155 sc->mii_flags |= MIIF_FORCEANEG; 156 157#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 158 159 /* 160 * In order for MII loopback to work Am79C971 and greater PCnet 161 * chips additionally need to be placed into external loopback 162 * mode which pcn(4) doesn't do so far. 163 */ 164 if (strcmp(nic, "pcn") != 0) 165#if 1 166 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, 167 sc->mii_inst), MII_MEDIA_100_TX); 168#else 169 if (strcmp(nic, "pcn") == 0) 170 sc->mii_flags |= MIIF_NOLOOP; 171#endif 172 173 nsphy_reset(sc); 174 175 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 176 device_printf(dev, " "); 177 mii_phy_add_media(sc); 178 printf("\n"); 179#undef ADD 180 181 MIIBUS_MEDIAINIT(sc->mii_dev); 182 return (0); 183} 184 185static int 186nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 187{ 188 int reg; 189 190 switch (cmd) { 191 case MII_POLLSTAT: 192 break; 193 194 case MII_MEDIACHG: 195 /* 196 * If the interface is not up, don't do anything. 197 */ 198 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 199 break; 200 201 reg = PHY_READ(sc, MII_NSPHY_PCR); 202 203 /* 204 * Set up the PCR to use LED4 to indicate full-duplex 205 * in both 10baseT and 100baseTX modes. 206 */ 207 reg |= PCR_LED4MODE; 208 209 /* 210 * Make sure Carrier Integrity Monitor function is 211 * disabled (normal for Node operation, but sometimes 212 * it's not set?!) 213 */ 214 reg |= PCR_CIMDIS; 215 216 /* 217 * Make sure "force link good" is set to normal mode. 218 * It's only intended for debugging. 219 */ 220 reg |= PCR_FLINK100; 221 222 /* 223 * Mystery bits which are supposedly `reserved', 224 * but we seem to need to set them when the PHY 225 * is connected to some interfaces: 226 * 227 * 0x0400 is needed for fxp 228 * (Intel EtherExpress Pro 10+/100B, 82557 chip) 229 * (nsphy with a DP83840 chip) 230 * 0x0100 may be needed for some other card 231 */ 232 reg |= 0x0100 | 0x0400; 233 234 if (strcmp(mii->mii_ifp->if_dname, "fxp") == 0) 235 PHY_WRITE(sc, MII_NSPHY_PCR, reg); 236 237 mii_phy_setmedia(sc); 238 break; 239 240 case MII_TICK: 241 if (mii_phy_tick(sc) == EJUSTRETURN) 242 return (0); 243 break; 244 } 245 246 /* Update the media status. */ 247 nsphy_status(sc); 248 249 /* Callback if something changed. */ 250 mii_phy_update(sc, cmd); 251 return (0); 252} 253 254static void 255nsphy_status(struct mii_softc *sc) 256{ 257 struct mii_data *mii = sc->mii_pdata; 258 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 259 int bmsr, bmcr, par, anlpar; 260 261 mii->mii_media_status = IFM_AVALID; 262 mii->mii_media_active = IFM_ETHER; 263 264 bmsr = PHY_READ(sc, MII_BMSR) | 265 PHY_READ(sc, MII_BMSR); 266 if (bmsr & BMSR_LINK) 267 mii->mii_media_status |= IFM_ACTIVE; 268 269 bmcr = PHY_READ(sc, MII_BMCR); 270 if (bmcr & BMCR_ISO) { 271 mii->mii_media_active |= IFM_NONE; 272 mii->mii_media_status = 0; 273 return; 274 } 275 276 if (bmcr & BMCR_LOOP) 277 mii->mii_media_active |= IFM_LOOP; 278 279 if (bmcr & BMCR_AUTOEN) { 280 /* 281 * The PAR status bits are only valid if autonegotiation 282 * has completed (or it's disabled). 283 */ 284 if ((bmsr & BMSR_ACOMP) == 0) { 285 /* Erg, still trying, I guess... */ 286 mii->mii_media_active |= IFM_NONE; 287 return; 288 } 289 290 /* 291 * Argh. The PAR doesn't seem to indicate duplex mode 292 * properly! Determine media based on link partner's 293 * advertised capabilities. 294 */ 295 if (PHY_READ(sc, MII_ANER) & ANER_LPAN) { 296 anlpar = PHY_READ(sc, MII_ANAR) & 297 PHY_READ(sc, MII_ANLPAR); 298 if (anlpar & ANLPAR_TX_FD) 299 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 300 else if (anlpar & ANLPAR_T4) 301 mii->mii_media_active |= IFM_100_T4; 302 else if (anlpar & ANLPAR_TX) 303 mii->mii_media_active |= IFM_100_TX; 304 else if (anlpar & ANLPAR_10_FD) 305 mii->mii_media_active |= IFM_10_T|IFM_FDX; 306 else if (anlpar & ANLPAR_10) 307 mii->mii_media_active |= IFM_10_T; 308 else 309 mii->mii_media_active |= IFM_NONE; 310 return; 311 } 312 313 /* 314 * Link partner is not capable of autonegotiation. 315 * We will never be in full-duplex mode if this is 316 * the case, so reading the PAR is OK. 317 */ 318 par = PHY_READ(sc, MII_NSPHY_PAR); 319 if (par & PAR_10) 320 mii->mii_media_active |= IFM_10_T; 321 else 322 mii->mii_media_active |= IFM_100_TX; 323#if 0 324 if (par & PAR_FDX) 325 mii->mii_media_active |= IFM_FDX; 326#endif 327 } else 328 mii->mii_media_active = ife->ifm_media; 329} 330 331static void 332nsphy_reset(struct mii_softc *sc) 333{ 334 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 335 int reg, i; 336 337 if (sc->mii_flags & MIIF_NOISOLATE) 338 reg = BMCR_RESET; 339 else 340 reg = BMCR_RESET | BMCR_ISO; 341 PHY_WRITE(sc, MII_BMCR, reg); 342 343 /* 344 * It is best to allow a little time for the reset to settle 345 * in before we start polling the BMCR again. Notably, the 346 * DP83840A manuals state that there should be a 500us delay 347 * between asserting software reset and attempting MII serial 348 * operations. Be conservative. 349 */ 350 DELAY(1000); 351 352 /* 353 * Wait another 2s for it to complete. 354 * This is only a little overkill as under normal circumstances 355 * the PHY can take up to 1s to complete reset. 356 * This is also a bit odd because after a reset, the BMCR will 357 * clear the reset bit and simply reports 0 even though the reset 358 * is not yet complete. 359 */ 360 for (i = 0; i < 1000; i++) { 361 reg = PHY_READ(sc, MII_BMCR); 362 if (reg != 0 && (reg & BMCR_RESET) == 0) 363 break; 364 DELAY(2000); 365 } 366 367 if ((sc->mii_flags & MIIF_NOISOLATE) == 0) { 368 if ((ife == NULL && sc->mii_inst != 0) || 369 (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst)) 370 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 371 } 372} 373