1/*-
2 * Copyright (c) 1998 Nicolas Souchu
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 *
28 */
29#ifndef __IICBUS_H
30#define __IICBUS_H
31
32#include <sys/_lock.h>
33#include <sys/_mutex.h>
34
35#define IICBUS_IVAR(d) (struct iicbus_ivar *) device_get_ivars(d)
36#define IICBUS_SOFTC(d) (struct iicbus_softc *) device_get_softc(d)
37
38struct iicbus_softc
39{
40	device_t dev;		/* Myself */
41	device_t owner;		/* iicbus owner device structure */
42	u_char started;		/* address of the 'started' slave
43				 * 0 if no start condition succeeded */
44	u_char strict;		/* deny operations that violate the
45				 * I2C protocol */
46	struct mtx lock;
47	u_int bus_freq;		/* Configured bus Hz. */
48};
49
50struct iicbus_ivar
51{
52	uint32_t	addr;
53	bool		nostop;
54};
55
56enum {
57	IICBUS_IVAR_ADDR,		/* Address or base address */
58	IICBUS_IVAR_NOSTOP,		/* nostop defaults */
59};
60
61#define IICBUS_ACCESSOR(A, B, T)					\
62	__BUS_ACCESSOR(iicbus, A, IICBUS, B, T)
63
64IICBUS_ACCESSOR(addr,		ADDR,		uint32_t)
65IICBUS_ACCESSOR(nostop,		NOSTOP,		bool)
66
67#define	IICBUS_LOCK(sc)			mtx_lock(&(sc)->lock)
68#define	IICBUS_UNLOCK(sc)      		mtx_unlock(&(sc)->lock)
69#define	IICBUS_ASSERT_LOCKED(sc)       	mtx_assert(&(sc)->lock, MA_OWNED)
70
71int  iicbus_generic_intr(device_t dev, int event, char *buf);
72void iicbus_init_frequency(device_t dev, u_int bus_freq);
73
74extern driver_t iicbus_driver;
75extern devclass_t iicbus_devclass;
76
77#endif
78