dcphy.c revision 67365 
1/*
2 * Copyright (c) 1997, 1998, 1999
3 *	Bill Paul <wpaul@ee.columbia.edu>.  All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 *    may be used to endorse or promote products derived from this software
18 *    without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: head/sys/dev/dc/dcphy.c 67365 2000-10-20 07:58:15Z jhb $
33 */
34
35/*
36 * Pseudo-driver for internal NWAY support on DEC 21143 and workalike
37 * controllers. Technically we're abusing the miibus code to handle
38 * media selection and NWAY support here since there is no MII
39 * interface. However the logical operations are roughly the same,
40 * and the alternative is to create a fake MII interface in the driver,
41 * which is harder to do.
42 */
43
44#include <sys/param.h>
45#include <sys/systm.h>
46#include <sys/kernel.h>
47#include <sys/socket.h>
48#include <sys/errno.h>
49#include <sys/module.h>
50#include <sys/mutex.h>
51#include <sys/bus.h>
52
53#include <net/if.h>
54#include <net/if_arp.h>
55#include <net/if_media.h>
56
57#include <dev/mii/mii.h>
58#include <dev/mii/miivar.h>
59#include <dev/mii/miidevs.h>
60
61#include <machine/bus_pio.h>
62#include <machine/bus_memio.h>
63#include <machine/bus.h>
64#include <machine/resource.h>
65#include <sys/bus.h>
66
67#include <pci/pcivar.h>
68
69#include <pci/if_dcreg.h>
70
71#include "miibus_if.h"
72
73#if !defined(lint)
74static const char rcsid[] =
75  "$FreeBSD: head/sys/dev/dc/dcphy.c 67365 2000-10-20 07:58:15Z jhb $";
76#endif
77
78#define DC_SETBIT(sc, reg, x)                           \
79        CSR_WRITE_4(sc, reg,                            \
80                CSR_READ_4(sc, reg) | x)
81
82#define DC_CLRBIT(sc, reg, x)                           \
83        CSR_WRITE_4(sc, reg,                            \
84                CSR_READ_4(sc, reg) & ~x)
85
86#define MIIF_AUTOTIMEOUT	0x0004
87
88/*
89 * This is the subsystem ID for the built-in 21143 ethernet
90 * in several Compaq Presario systems. Apparently these are
91 * 10Mbps only, so we need to treat them specially.
92 */
93#define COMPAQ_PRESARIO_ID	0xb0bb0e11
94
95static int dcphy_probe		__P((device_t));
96static int dcphy_attach		__P((device_t));
97static int dcphy_detach		__P((device_t));
98
99static device_method_t dcphy_methods[] = {
100	/* device interface */
101	DEVMETHOD(device_probe,		dcphy_probe),
102	DEVMETHOD(device_attach,	dcphy_attach),
103	DEVMETHOD(device_detach,	dcphy_detach),
104	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
105	{ 0, 0 }
106};
107
108static devclass_t dcphy_devclass;
109
110static driver_t dcphy_driver = {
111	"dcphy",
112	dcphy_methods,
113	sizeof(struct mii_softc)
114};
115
116DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0);
117
118int	dcphy_service __P((struct mii_softc *, struct mii_data *, int));
119void	dcphy_status __P((struct mii_softc *));
120static int dcphy_auto		__P((struct mii_softc *, int));
121static void dcphy_reset		__P((struct mii_softc *));
122
123static int dcphy_probe(dev)
124	device_t		dev;
125{
126	struct mii_attach_args *ma;
127
128	ma = device_get_ivars(dev);
129
130	/*
131	 * The dc driver will report the 21143 vendor and device
132	 * ID to let us know that it wants us to attach.
133	 */
134	if (ma->mii_id1 != DC_VENDORID_DEC ||
135	    ma->mii_id2 != DC_DEVICEID_21143)
136		return(ENXIO);
137
138	device_set_desc(dev, "Intel 21143 NWAY media interface");
139
140	return (0);
141}
142
143static int dcphy_attach(dev)
144	device_t		dev;
145{
146	struct mii_softc *sc;
147	struct mii_attach_args *ma;
148	struct mii_data *mii;
149	struct dc_softc		*dc_sc;
150
151	sc = device_get_softc(dev);
152	ma = device_get_ivars(dev);
153	sc->mii_dev = device_get_parent(dev);
154	mii = device_get_softc(sc->mii_dev);
155	LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
156
157	sc->mii_inst = mii->mii_instance;
158	sc->mii_phy = ma->mii_phyno;
159	sc->mii_service = dcphy_service;
160	sc->mii_pdata = mii;
161
162	sc->mii_flags |= MIIF_NOISOLATE;
163	mii->mii_instance++;
164
165#define	ADD(m, c)	ifmedia_add(&mii->mii_media, (m), (c), NULL)
166
167	ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
168	    BMCR_ISO);
169
170	/*dcphy_reset(sc);*/
171	dc_sc = mii->mii_ifp->if_softc;
172	CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
173	CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
174
175	switch(pci_read_config(device_get_parent(sc->mii_dev),
176	    DC_PCI_CSID, 4)) {
177	case COMPAQ_PRESARIO_ID:
178		/* Example of how to only allow 10Mbps modes. */
179		sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
180		break;
181	default:
182		if (dc_sc->dc_pmode == DC_PMODE_SIA) {
183			sc->mii_capabilities =
184			    BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
185		} else {
186			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP,
187			    sc->mii_inst), BMCR_LOOP|BMCR_S100);
188
189			sc->mii_capabilities =
190			    BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX|
191			    BMSR_10TFDX|BMSR_10THDX;
192		}
193		break;
194	}
195
196	sc->mii_capabilities &= ma->mii_capmask;
197	device_printf(dev, " ");
198	if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0)
199		printf("no media present");
200	else
201		mii_add_media(mii, sc->mii_capabilities, sc->mii_inst);
202	printf("\n");
203#undef ADD
204
205	MIIBUS_MEDIAINIT(sc->mii_dev);
206	return(0);
207}
208
209static int dcphy_detach(dev)
210	device_t		dev;
211{
212	struct mii_softc *sc;
213	struct mii_data *mii;
214
215	sc = device_get_softc(dev);
216	mii = device_get_softc(device_get_parent(dev));
217	sc->mii_dev = NULL;
218	LIST_REMOVE(sc, mii_list);
219
220	return(0);
221}
222
223int
224dcphy_service(sc, mii, cmd)
225	struct mii_softc *sc;
226	struct mii_data *mii;
227	int cmd;
228{
229	struct dc_softc		*dc_sc;
230	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
231	int reg;
232	u_int32_t		mode;
233
234	dc_sc = mii->mii_ifp->if_softc;
235
236	switch (cmd) {
237	case MII_POLLSTAT:
238		/*
239		 * If we're not polling our PHY instance, just return.
240		 */
241		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
242			return (0);
243		}
244		break;
245
246	case MII_MEDIACHG:
247		/*
248		 * If the media indicates a different PHY instance,
249		 * isolate ourselves.
250		 */
251		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
252			return (0);
253		}
254
255		/*
256		 * If the interface is not up, don't do anything.
257		 */
258		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
259			break;
260
261		sc->mii_flags = 0;
262		mii->mii_media_active = IFM_NONE;
263		mode = CSR_READ_4(dc_sc, DC_NETCFG);
264		mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL|
265		    DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL);
266
267		switch (IFM_SUBTYPE(ife->ifm_media)) {
268		case IFM_AUTO:
269			/*dcphy_reset(sc);*/
270			sc->mii_flags &= ~MIIF_DOINGAUTO;
271			(void) dcphy_auto(sc, 0);
272			break;
273		case IFM_100_T4:
274			/*
275			 * XXX Not supported as a manual setting right now.
276			 */
277			return (EINVAL);
278		case IFM_100_TX:
279			dcphy_reset(sc);
280			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
281			mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS|
282			    DC_NETCFG_SCRAMBLER;
283			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
284				mode |= DC_NETCFG_FULLDUPLEX;
285			else
286				mode &= ~DC_NETCFG_FULLDUPLEX;
287			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
288			break;
289		case IFM_10_T:
290			DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
291			DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
292			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
293				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
294			else
295				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
296			DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
297			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
298			mode &= ~DC_NETCFG_PORTSEL;
299			mode |= DC_NETCFG_SPEEDSEL;
300			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
301				mode |= DC_NETCFG_FULLDUPLEX;
302			else
303				mode &= ~DC_NETCFG_FULLDUPLEX;
304			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
305			break;
306		default:
307			return(EINVAL);
308			break;
309		}
310		break;
311
312	case MII_TICK:
313		/*
314		 * If we're not currently selected, just return.
315		 */
316		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
317			return (0);
318
319		/*
320		 * Only used for autonegotiation.
321		 */
322		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
323			return (0);
324
325		/*
326		 * Is the interface even up?
327		 */
328		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
329			return (0);
330
331		reg = CSR_READ_4(dc_sc, DC_10BTSTAT) &
332		    (DC_TSTAT_LS10|DC_TSTAT_LS100);
333
334		if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
335			return(0);
336
337                /*
338                 * Only retry autonegotiation every 5 seconds.
339                 */
340                if (++sc->mii_ticks != 50)
341                        return (0);
342
343		sc->mii_ticks = 0;
344		/*if (DC_IS_INTEL(dc_sc))*/
345			sc->mii_flags &= ~MIIF_DOINGAUTO;
346		dcphy_auto(sc, 0);
347
348		break;
349	}
350
351	/* Update the media status. */
352	dcphy_status(sc);
353
354	/* Callback if something changed. */
355	if (sc->mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) {
356		MIIBUS_STATCHG(sc->mii_dev);
357		sc->mii_active = mii->mii_media_active;
358	}
359	return (0);
360}
361
362void
363dcphy_status(sc)
364	struct mii_softc *sc;
365{
366	struct mii_data *mii = sc->mii_pdata;
367	int reg, anlpar, tstat = 0;
368	struct dc_softc		*dc_sc;
369
370	dc_sc = mii->mii_ifp->if_softc;
371
372	mii->mii_media_status = IFM_AVALID;
373	mii->mii_media_active = IFM_ETHER;
374
375	if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
376		return;
377
378	reg = CSR_READ_4(dc_sc, DC_10BTSTAT) &
379	    (DC_TSTAT_LS10|DC_TSTAT_LS100);
380
381	if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
382		mii->mii_media_status |= IFM_ACTIVE;
383
384	if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {
385		/* Erg, still trying, I guess... */
386		tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);
387		if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) {
388			if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&
389			    (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE)
390				goto skip;
391			mii->mii_media_active |= IFM_NONE;
392			return;
393		}
394
395		if (tstat & DC_TSTAT_LP_CAN_NWAY) {
396			anlpar = tstat >> 16;
397			if (anlpar & ANLPAR_T4 &&
398			    sc->mii_capabilities & BMSR_100TXHDX)
399				mii->mii_media_active |= IFM_100_T4;
400			else if (anlpar & ANLPAR_TX_FD &&
401			    sc->mii_capabilities & BMSR_100TXFDX)
402				mii->mii_media_active |= IFM_100_TX|IFM_FDX;
403			else if (anlpar & ANLPAR_TX &&
404			    sc->mii_capabilities & BMSR_100TXHDX)
405				mii->mii_media_active |= IFM_100_TX;
406			else if (anlpar & ANLPAR_10_FD)
407				mii->mii_media_active |= IFM_10_T|IFM_FDX;
408			else if (anlpar & ANLPAR_10)
409				mii->mii_media_active |= IFM_10_T;
410			else
411				mii->mii_media_active |= IFM_NONE;
412			if (DC_IS_INTEL(dc_sc))
413				DC_CLRBIT(dc_sc, DC_10BTCTRL,
414				    DC_TCTL_AUTONEGENBL);
415			return;
416		}
417		/*
418		 * If the other side doesn't support NWAY, then the
419		 * best we can do is determine if we have a 10Mbps or
420		 * 100Mbps link. There's no way to know if the link
421		 * is full or half duplex, so we default to half duplex
422		 * and hope that the user is clever enough to manually
423		 * change the media settings if we're wrong.
424		 */
425		if (!(reg & DC_TSTAT_LS100))
426			mii->mii_media_active |= IFM_100_TX;
427		else if (!(reg & DC_TSTAT_LS10))
428			mii->mii_media_active |= IFM_10_T;
429		else
430			mii->mii_media_active |= IFM_NONE;
431		if (DC_IS_INTEL(dc_sc))
432			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
433		return;
434	}
435
436skip:
437
438	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)
439		mii->mii_media_active |= IFM_10_T;
440	else
441		mii->mii_media_active |= IFM_100_TX;
442	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)
443		mii->mii_media_active |= IFM_FDX;
444
445	return;
446}
447
448static int
449dcphy_auto(mii, waitfor)
450	struct mii_softc	*mii;
451	int			waitfor;
452{
453	int			i;
454	struct dc_softc		*sc;
455
456	sc = mii->mii_pdata->mii_ifp->if_softc;
457
458	if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) {
459		DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
460		DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
461		DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
462		if (mii->mii_capabilities & BMSR_100TXHDX)
463			CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF);
464		else
465			CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF);
466		DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
467		DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
468		DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
469	}
470
471	if (waitfor) {
472		/* Wait 500ms for it to complete. */
473		for (i = 0; i < 500; i++) {
474			if ((CSR_READ_4(sc, DC_10BTSTAT) & DC_TSTAT_ANEGSTAT)
475			    == DC_ASTAT_AUTONEGCMP)
476				return(0);
477			DELAY(1000);
478		}
479		/*
480		 * Don't need to worry about clearing MIIF_DOINGAUTO.
481		 * If that's set, a timeout is pending, and it will
482		 * clear the flag.
483		 */
484		return(EIO);
485	}
486
487	/*
488	 * Just let it finish asynchronously.  This is for the benefit of
489	 * the tick handler driving autonegotiation.  Don't want 500ms
490	 * delays all the time while the system is running!
491	 */
492	if ((mii->mii_flags & MIIF_DOINGAUTO) == 0)
493		mii->mii_flags |= MIIF_DOINGAUTO;
494
495	return(EJUSTRETURN);
496}
497
498static void
499dcphy_reset(mii)
500	struct mii_softc	*mii;
501{
502	struct dc_softc		*sc;
503
504	sc = mii->mii_pdata->mii_ifp->if_softc;
505
506	DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
507	DELAY(1000);
508	DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
509
510	return;
511}
512
513