1/*-
2 * Copyright (c) 1997, 1998, 1999
3 *	Bill Paul <wpaul@ee.columbia.edu>.  All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 *    may be used to endorse or promote products derived from this software
18 *    without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD$");
35
36/*
37 * Pseudo-driver for internal NWAY support on DEC 21143 and workalike
38 * controllers.  Technically we're abusing the miibus code to handle
39 * media selection and NWAY support here since there is no MII
40 * interface.  However the logical operations are roughly the same,
41 * and the alternative is to create a fake MII interface in the driver,
42 * which is harder to do.
43 */
44
45#include <sys/param.h>
46#include <sys/systm.h>
47#include <sys/kernel.h>
48#include <sys/socket.h>
49#include <sys/errno.h>
50#include <sys/lock.h>
51#include <sys/module.h>
52#include <sys/mutex.h>
53#include <sys/bus.h>
54
55#include <net/if.h>
56#include <net/if_arp.h>
57#include <net/if_media.h>
58
59#include <dev/mii/mii.h>
60#include <dev/mii/miivar.h>
61#include "miidevs.h"
62
63#include <machine/bus.h>
64#include <machine/resource.h>
65
66#include <dev/pci/pcivar.h>
67
68#include <dev/dc/if_dcreg.h>
69
70#include "miibus_if.h"
71
72#define DC_SETBIT(sc, reg, x)                           \
73        CSR_WRITE_4(sc, reg,                            \
74                CSR_READ_4(sc, reg) | x)
75
76#define DC_CLRBIT(sc, reg, x)                           \
77        CSR_WRITE_4(sc, reg,                            \
78                CSR_READ_4(sc, reg) & ~x)
79
80#define MIIF_AUTOTIMEOUT	0x0004
81
82/*
83 * This is the subsystem ID for the built-in 21143 ethernet
84 * in several Compaq Presario systems.  Apparently these are
85 * 10Mbps only, so we need to treat them specially.
86 */
87#define COMPAQ_PRESARIO_ID	0xb0bb0e11
88
89static int dcphy_probe(device_t);
90static int dcphy_attach(device_t);
91
92static device_method_t dcphy_methods[] = {
93	/* device interface */
94	DEVMETHOD(device_probe,		dcphy_probe),
95	DEVMETHOD(device_attach,	dcphy_attach),
96	DEVMETHOD(device_detach,	mii_phy_detach),
97	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
98	DEVMETHOD_END
99};
100
101static devclass_t dcphy_devclass;
102
103static driver_t dcphy_driver = {
104	"dcphy",
105	dcphy_methods,
106	sizeof(struct mii_softc)
107};
108
109DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0);
110
111static int	dcphy_service(struct mii_softc *, struct mii_data *, int);
112static void	dcphy_status(struct mii_softc *);
113static void	dcphy_reset(struct mii_softc *);
114static int	dcphy_auto(struct mii_softc *);
115
116static const struct mii_phy_funcs dcphy_funcs = {
117	dcphy_service,
118	dcphy_status,
119	dcphy_reset
120};
121
122static int
123dcphy_probe(device_t dev)
124{
125	struct mii_attach_args *ma;
126
127	ma = device_get_ivars(dev);
128
129	/*
130	 * The dc driver will report the 21143 vendor and device
131	 * ID to let us know that it wants us to attach.
132	 */
133	if (ma->mii_id1 != DC_VENDORID_DEC ||
134	    ma->mii_id2 != DC_DEVICEID_21143)
135		return (ENXIO);
136
137	device_set_desc(dev, "Intel 21143 NWAY media interface");
138
139	return (BUS_PROBE_DEFAULT);
140}
141
142static int
143dcphy_attach(device_t dev)
144{
145	struct mii_softc *sc;
146	struct dc_softc		*dc_sc;
147	device_t brdev;
148
149	sc = device_get_softc(dev);
150
151	mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE,
152	    &dcphy_funcs, 0);
153
154	/*PHY_RESET(sc);*/
155	dc_sc = sc->mii_pdata->mii_ifp->if_softc;
156	CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
157	CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
158
159	brdev = device_get_parent(sc->mii_dev);
160	switch (pci_get_subdevice(brdev) << 16 | pci_get_subvendor(brdev)) {
161	case COMPAQ_PRESARIO_ID:
162		/* Example of how to only allow 10Mbps modes. */
163		sc->mii_capabilities = BMSR_ANEG | BMSR_10TFDX | BMSR_10THDX;
164		break;
165	default:
166		if (dc_sc->dc_pmode == DC_PMODE_SIA)
167			sc->mii_capabilities =
168			    BMSR_ANEG | BMSR_10TFDX | BMSR_10THDX;
169		else
170			sc->mii_capabilities =
171			    BMSR_ANEG | BMSR_100TXFDX | BMSR_100TXHDX |
172			    BMSR_10TFDX | BMSR_10THDX;
173		break;
174	}
175
176	sc->mii_capabilities &= sc->mii_capmask;
177	device_printf(dev, " ");
178	mii_phy_add_media(sc);
179	printf("\n");
180
181	MIIBUS_MEDIAINIT(sc->mii_dev);
182	return (0);
183}
184
185static int
186dcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
187{
188	struct dc_softc		*dc_sc;
189	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
190	int reg;
191	u_int32_t		mode;
192
193	dc_sc = mii->mii_ifp->if_softc;
194
195	switch (cmd) {
196	case MII_POLLSTAT:
197		break;
198
199	case MII_MEDIACHG:
200		/*
201		 * If the interface is not up, don't do anything.
202		 */
203		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
204			break;
205
206		mii->mii_media_active = IFM_NONE;
207		mode = CSR_READ_4(dc_sc, DC_NETCFG);
208		mode &= ~(DC_NETCFG_FULLDUPLEX | DC_NETCFG_PORTSEL |
209		    DC_NETCFG_PCS | DC_NETCFG_SCRAMBLER | DC_NETCFG_SPEEDSEL);
210
211		switch (IFM_SUBTYPE(ife->ifm_media)) {
212		case IFM_AUTO:
213			/*PHY_RESET(sc);*/
214			(void)dcphy_auto(sc);
215			break;
216		case IFM_100_TX:
217			PHY_RESET(sc);
218			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
219			mode |= DC_NETCFG_PORTSEL | DC_NETCFG_PCS |
220			    DC_NETCFG_SCRAMBLER;
221			if ((ife->ifm_media & IFM_FDX) != 0)
222				mode |= DC_NETCFG_FULLDUPLEX;
223			else
224				mode &= ~DC_NETCFG_FULLDUPLEX;
225			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
226			break;
227		case IFM_10_T:
228			DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
229			DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
230			if ((ife->ifm_media & IFM_FDX) != 0)
231				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
232			else
233				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
234			DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
235			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
236			mode &= ~DC_NETCFG_PORTSEL;
237			mode |= DC_NETCFG_SPEEDSEL;
238			if ((ife->ifm_media & IFM_FDX) != 0)
239				mode |= DC_NETCFG_FULLDUPLEX;
240			else
241				mode &= ~DC_NETCFG_FULLDUPLEX;
242			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
243			break;
244		default:
245			return (EINVAL);
246		}
247		break;
248
249	case MII_TICK:
250		/*
251		 * Is the interface even up?
252		 */
253		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
254			return (0);
255
256		/*
257		 * Only used for autonegotiation.
258		 */
259		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
260			break;
261
262		reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
263		if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
264			break;
265
266                /*
267                 * Only retry autonegotiation every 5 seconds.
268		 *
269		 * Otherwise, fall through to calling dcphy_status()
270		 * since real Intel 21143 chips don't show valid link
271		 * status until autonegotiation is switched off, and
272		 * that only happens in dcphy_status().  Without this,
273		 * successful autonegotiation is never recognised on
274		 * these chips.
275                 */
276                if (++sc->mii_ticks <= 50)
277			break;
278
279		sc->mii_ticks = 0;
280		dcphy_auto(sc);
281
282		break;
283	}
284
285	/* Update the media status. */
286	PHY_STATUS(sc);
287
288	/* Callback if something changed. */
289	mii_phy_update(sc, cmd);
290	return (0);
291}
292
293static void
294dcphy_status(struct mii_softc *sc)
295{
296	struct mii_data *mii = sc->mii_pdata;
297	int anlpar, tstat;
298	struct dc_softc		*dc_sc;
299
300	dc_sc = mii->mii_ifp->if_softc;
301
302	mii->mii_media_status = IFM_AVALID;
303	mii->mii_media_active = IFM_ETHER;
304
305	if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
306		return;
307
308	tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);
309	if (!(tstat & DC_TSTAT_LS10) || !(tstat & DC_TSTAT_LS100))
310		mii->mii_media_status |= IFM_ACTIVE;
311
312	if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {
313		/* Erg, still trying, I guess... */
314		if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) {
315			if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&
316			    (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE)
317				goto skip;
318			mii->mii_media_active |= IFM_NONE;
319			return;
320		}
321
322		if (tstat & DC_TSTAT_LP_CAN_NWAY) {
323			anlpar = tstat >> 16;
324			if (anlpar & ANLPAR_TX_FD &&
325			    sc->mii_capabilities & BMSR_100TXFDX)
326				mii->mii_media_active |= IFM_100_TX | IFM_FDX;
327			else if (anlpar & ANLPAR_T4 &&
328			    sc->mii_capabilities & BMSR_100T4)
329				mii->mii_media_active |= IFM_100_T4 | IFM_HDX;
330			else if (anlpar & ANLPAR_TX &&
331			    sc->mii_capabilities & BMSR_100TXHDX)
332				mii->mii_media_active |= IFM_100_TX | IFM_HDX;
333			else if (anlpar & ANLPAR_10_FD)
334				mii->mii_media_active |= IFM_10_T | IFM_FDX;
335			else if (anlpar & ANLPAR_10)
336				mii->mii_media_active |= IFM_10_T | IFM_HDX;
337			else
338				mii->mii_media_active |= IFM_NONE;
339			if (DC_IS_INTEL(dc_sc))
340				DC_CLRBIT(dc_sc, DC_10BTCTRL,
341				    DC_TCTL_AUTONEGENBL);
342			return;
343		}
344
345		/*
346		 * If the other side doesn't support NWAY, then the
347		 * best we can do is determine if we have a 10Mbps or
348		 * 100Mbps link.  There's no way to know if the link
349		 * is full or half duplex, so we default to half duplex
350		 * and hope that the user is clever enough to manually
351		 * change the media settings if we're wrong.
352		 */
353		if (!(tstat & DC_TSTAT_LS100))
354			mii->mii_media_active |= IFM_100_TX | IFM_HDX;
355		else if (!(tstat & DC_TSTAT_LS10))
356			mii->mii_media_active |= IFM_10_T | IFM_HDX;
357		else
358			mii->mii_media_active |= IFM_NONE;
359		if (DC_IS_INTEL(dc_sc))
360			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
361		return;
362	}
363
364skip:
365	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)
366		mii->mii_media_active |= IFM_10_T;
367	else
368		mii->mii_media_active |= IFM_100_TX;
369	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)
370		mii->mii_media_active |= IFM_FDX;
371	else
372		mii->mii_media_active |= IFM_HDX;
373}
374
375static int
376dcphy_auto(struct mii_softc *mii)
377{
378	struct dc_softc		*sc;
379
380	sc = mii->mii_pdata->mii_ifp->if_softc;
381
382	DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
383	DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
384	DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
385	if (mii->mii_capabilities & BMSR_100TXHDX)
386		CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF);
387	else
388		CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF);
389	DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
390	DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
391	DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
392
393	return (EJUSTRETURN);
394}
395
396static void
397dcphy_reset(struct mii_softc *mii)
398{
399	struct dc_softc		*sc;
400
401	sc = mii->mii_pdata->mii_ifp->if_softc;
402
403	DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
404	DELAY(1000);
405	DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
406}
407