1/*- 2 * 1. Redistributions of source code must retain the 3 * Copyright (c) 1997 Amancio Hasty, 1999 Roger Hardiman 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Amancio Hasty and 17 * Roger Hardiman 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 29 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34#include <sys/cdefs.h> 35__FBSDID("$FreeBSD: stable/10/sys/dev/bktr/bktr_tuner.c 331338 2018-03-22 00:55:36Z emaste $"); 36 37/* 38 * This is part of the Driver for Video Capture Cards (Frame grabbers) 39 * and TV Tuner cards using the Brooktree Bt848, Bt848A, Bt849A, Bt878, Bt879 40 * chipset. 41 * Copyright Roger Hardiman and Amancio Hasty. 42 * 43 * bktr_tuner : This deals with controlling the tuner fitted to TV cards. 44 */ 45 46#include <sys/param.h> 47#include <sys/systm.h> 48#include <sys/kernel.h> 49#ifdef __NetBSD__ 50#include <sys/proc.h> 51#endif 52 53#ifdef __FreeBSD__ 54#if (__FreeBSD_version < 500000) 55#include <machine/clock.h> /* for DELAY */ 56#include <pci/pcivar.h> 57#else 58#include <sys/lock.h> 59#include <sys/mutex.h> 60#include <sys/selinfo.h> 61#include <dev/pci/pcivar.h> 62#endif 63 64#include <machine/bus.h> 65#include <sys/bus.h> 66#endif 67 68#ifdef __NetBSD__ 69#include <dev/ic/bt8xx.h> /* NetBSD .h file location */ 70#include <dev/pci/bktr/bktr_reg.h> 71#include <dev/pci/bktr/bktr_tuner.h> 72#include <dev/pci/bktr/bktr_card.h> 73#include <dev/pci/bktr/bktr_core.h> 74#else 75#include <dev/bktr/ioctl_meteor.h> 76#include <dev/bktr/ioctl_bt848.h> /* extensions to ioctl_meteor.h */ 77#include <dev/bktr/bktr_reg.h> 78#include <dev/bktr/bktr_tuner.h> 79#include <dev/bktr/bktr_card.h> 80#include <dev/bktr/bktr_core.h> 81#endif 82 83 84 85#if defined( TUNER_AFC ) 86#define AFC_DELAY 10000 /* 10 millisend delay */ 87#define AFC_BITS 0x07 88#define AFC_FREQ_MINUS_125 0x00 89#define AFC_FREQ_MINUS_62 0x01 90#define AFC_FREQ_CENTERED 0x02 91#define AFC_FREQ_PLUS_62 0x03 92#define AFC_FREQ_PLUS_125 0x04 93#define AFC_MAX_STEP (5 * FREQFACTOR) /* no more than 5 MHz */ 94#endif /* TUNER_AFC */ 95 96 97#define TTYPE_XXX 0 98#define TTYPE_NTSC 1 99#define TTYPE_NTSC_J 2 100#define TTYPE_PAL 3 101#define TTYPE_PAL_M 4 102#define TTYPE_PAL_N 5 103#define TTYPE_SECAM 6 104 105#define TSA552x_CB_MSB (0x80) 106#define TSA552x_CB_CP (1<<6) /* set this for fast tuning */ 107#define TSA552x_CB_T2 (1<<5) /* test mode - Normally set to 0 */ 108#define TSA552x_CB_T1 (1<<4) /* test mode - Normally set to 0 */ 109#define TSA552x_CB_T0 (1<<3) /* test mode - Normally set to 1 */ 110#define TSA552x_CB_RSA (1<<2) /* 0 for 31.25 khz, 1 for 62.5 kHz */ 111#define TSA552x_CB_RSB (1<<1) /* 0 for FM 50kHz steps, 1 = Use RSA*/ 112#define TSA552x_CB_OS (1<<0) /* Set to 0 for normal operation */ 113 114#define TSA552x_RADIO (TSA552x_CB_MSB | \ 115 TSA552x_CB_T0) 116 117/* raise the charge pump voltage for fast tuning */ 118#define TSA552x_FCONTROL (TSA552x_CB_MSB | \ 119 TSA552x_CB_CP | \ 120 TSA552x_CB_T0 | \ 121 TSA552x_CB_RSA | \ 122 TSA552x_CB_RSB) 123 124/* lower the charge pump voltage for better residual oscillator FM */ 125#define TSA552x_SCONTROL (TSA552x_CB_MSB | \ 126 TSA552x_CB_T0 | \ 127 TSA552x_CB_RSA | \ 128 TSA552x_CB_RSB) 129 130/* The control value for the ALPS TSCH5 Tuner */ 131#define TSCH5_FCONTROL 0x82 132#define TSCH5_RADIO 0x86 133 134/* The control value for the ALPS TSBH1 Tuner */ 135#define TSBH1_FCONTROL 0xce 136 137 138static void mt2032_set_tv_freq(bktr_ptr_t bktr, unsigned int freq); 139 140 141static const struct TUNER tuners[] = { 142/* XXX FIXME: fill in the band-switch crosspoints */ 143 /* NO_TUNER */ 144 { "<no>", /* the 'name' */ 145 TTYPE_XXX, /* input type */ 146 { 0x00, /* control byte for Tuner PLL */ 147 0x00, 148 0x00, 149 0x00 }, 150 { 0x00, 0x00 }, /* band-switch crosspoints */ 151 { 0x00, 0x00, 0x00,0x00} }, /* the band-switch values */ 152 153 /* TEMIC_NTSC */ 154 { "Temic NTSC", /* the 'name' */ 155 TTYPE_NTSC, /* input type */ 156 { TSA552x_SCONTROL, /* control byte for Tuner PLL */ 157 TSA552x_SCONTROL, 158 TSA552x_SCONTROL, 159 0x00 }, 160 { 0x00, 0x00}, /* band-switch crosspoints */ 161 { 0x02, 0x04, 0x01, 0x00 } }, /* the band-switch values */ 162 163 /* TEMIC_PAL */ 164 { "Temic PAL", /* the 'name' */ 165 TTYPE_PAL, /* input type */ 166 { TSA552x_SCONTROL, /* control byte for Tuner PLL */ 167 TSA552x_SCONTROL, 168 TSA552x_SCONTROL, 169 0x00 }, 170 { 0x00, 0x00 }, /* band-switch crosspoints */ 171 { 0x02, 0x04, 0x01, 0x00 } }, /* the band-switch values */ 172 173 /* TEMIC_SECAM */ 174 { "Temic SECAM", /* the 'name' */ 175 TTYPE_SECAM, /* input type */ 176 { TSA552x_SCONTROL, /* control byte for Tuner PLL */ 177 TSA552x_SCONTROL, 178 TSA552x_SCONTROL, 179 0x00 }, 180 { 0x00, 0x00 }, /* band-switch crosspoints */ 181 { 0x02, 0x04, 0x01,0x00 } }, /* the band-switch values */ 182 183 /* PHILIPS_NTSC */ 184 { "Philips NTSC", /* the 'name' */ 185 TTYPE_NTSC, /* input type */ 186 { TSA552x_SCONTROL, /* control byte for Tuner PLL */ 187 TSA552x_SCONTROL, 188 TSA552x_SCONTROL, 189 0x00 }, 190 { 0x00, 0x00 }, /* band-switch crosspoints */ 191 { 0xa0, 0x90, 0x30, 0x00 } }, /* the band-switch values */ 192 193 /* PHILIPS_PAL */ 194 { "Philips PAL", /* the 'name' */ 195 TTYPE_PAL, /* input type */ 196 { TSA552x_SCONTROL, /* control byte for Tuner PLL */ 197 TSA552x_SCONTROL, 198 TSA552x_SCONTROL, 199 0x00 }, 200 { 0x00, 0x00 }, /* band-switch crosspoints */ 201 { 0xa0, 0x90, 0x30, 0x00 } }, /* the band-switch values */ 202 203 /* PHILIPS_SECAM */ 204 { "Philips SECAM", /* the 'name' */ 205 TTYPE_SECAM, /* input type */ 206 { TSA552x_SCONTROL, /* control byte for Tuner PLL */ 207 TSA552x_SCONTROL, 208 TSA552x_SCONTROL, 209 0x00 }, 210 { 0x00, 0x00 }, /* band-switch crosspoints */ 211 { 0xa7, 0x97, 0x37, 0x00 } }, /* the band-switch values */ 212 213 /* TEMIC_PAL I */ 214 { "Temic PAL I", /* the 'name' */ 215 TTYPE_PAL, /* input type */ 216 { TSA552x_SCONTROL, /* control byte for Tuner PLL */ 217 TSA552x_SCONTROL, 218 TSA552x_SCONTROL, 219 0x00 }, 220 { 0x00, 0x00 }, /* band-switch crosspoints */ 221 { 0x02, 0x04, 0x01,0x00 } }, /* the band-switch values */ 222 223 /* PHILIPS_PALI */ 224 { "Philips PAL I", /* the 'name' */ 225 TTYPE_PAL, /* input type */ 226 { TSA552x_SCONTROL, /* control byte for Tuner PLL */ 227 TSA552x_SCONTROL, 228 TSA552x_SCONTROL, 229 0x00 }, 230 { 0x00, 0x00 }, /* band-switch crosspoints */ 231 { 0xa0, 0x90, 0x30,0x00 } }, /* the band-switch values */ 232 233 /* PHILIPS_FR1236_NTSC */ 234 { "Philips FR1236 NTSC FM", /* the 'name' */ 235 TTYPE_NTSC, /* input type */ 236 { TSA552x_FCONTROL, /* control byte for Tuner PLL */ 237 TSA552x_FCONTROL, 238 TSA552x_FCONTROL, 239 TSA552x_RADIO }, 240 { 0x00, 0x00 }, /* band-switch crosspoints */ 241 { 0xa0, 0x90, 0x30,0xa4 } }, /* the band-switch values */ 242 243 /* PHILIPS_FR1216_PAL */ 244 { "Philips FR1216 PAL FM" , /* the 'name' */ 245 TTYPE_PAL, /* input type */ 246 { TSA552x_FCONTROL, /* control byte for Tuner PLL */ 247 TSA552x_FCONTROL, 248 TSA552x_FCONTROL, 249 TSA552x_RADIO }, 250 { 0x00, 0x00 }, /* band-switch crosspoints */ 251 { 0xa0, 0x90, 0x30, 0xa4 } }, /* the band-switch values */ 252 253 /* PHILIPS_FR1236_SECAM */ 254 { "Philips FR1236 SECAM FM", /* the 'name' */ 255 TTYPE_SECAM, /* input type */ 256 { TSA552x_FCONTROL, /* control byte for Tuner PLL */ 257 TSA552x_FCONTROL, 258 TSA552x_FCONTROL, 259 TSA552x_RADIO }, 260 { 0x00, 0x00 }, /* band-switch crosspoints */ 261 { 0xa7, 0x97, 0x37, 0xa4 } }, /* the band-switch values */ 262 263 /* ALPS TSCH5 NTSC */ 264 { "ALPS TSCH5 NTSC FM", /* the 'name' */ 265 TTYPE_NTSC, /* input type */ 266 { TSCH5_FCONTROL, /* control byte for Tuner PLL */ 267 TSCH5_FCONTROL, 268 TSCH5_FCONTROL, 269 TSCH5_RADIO }, 270 { 0x00, 0x00 }, /* band-switch crosspoints */ 271 { 0x14, 0x12, 0x11, 0x04 } }, /* the band-switch values */ 272 273 /* ALPS TSBH1 NTSC */ 274 { "ALPS TSBH1 NTSC", /* the 'name' */ 275 TTYPE_NTSC, /* input type */ 276 { TSBH1_FCONTROL, /* control byte for Tuner PLL */ 277 TSBH1_FCONTROL, 278 TSBH1_FCONTROL, 279 0x00 }, 280 { 0x00, 0x00 }, /* band-switch crosspoints */ 281 { 0x01, 0x02, 0x08, 0x00 } }, /* the band-switch values */ 282 283 /* MT2032 Microtune */ 284 { "MT2032", /* the 'name' */ 285 TTYPE_PAL, /* input type */ 286 { TSA552x_SCONTROL, /* control byte for Tuner PLL */ 287 TSA552x_SCONTROL, 288 TSA552x_SCONTROL, 289 0x00 }, 290 { 0x00, 0x00 }, /* band-switch crosspoints */ 291 { 0xa0, 0x90, 0x30, 0x00 } }, /* the band-switch values */ 292 293 /* LG TPI8PSB12P PAL */ 294 { "LG TPI8PSB12P PAL", /* the 'name' */ 295 TTYPE_PAL, /* input type */ 296 { TSA552x_SCONTROL, /* control byte for Tuner PLL */ 297 TSA552x_SCONTROL, 298 TSA552x_SCONTROL, 299 0x00 }, 300 { 0x00, 0x00 }, /* band-switch crosspoints */ 301 { 0xa0, 0x90, 0x30, 0x8e } }, /* the band-switch values */ 302}; 303 304 305/* scaling factor for frequencies expressed as ints */ 306#define FREQFACTOR 16 307 308/* 309 * Format: 310 * entry 0: MAX legal channel 311 * entry 1: IF frequency 312 * expressed as fi{mHz} * 16, 313 * eg 45.75mHz == 45.75 * 16 = 732 314 * entry 2: [place holder/future] 315 * entry 3: base of channel record 0 316 * entry 3 + (x*3): base of channel record 'x' 317 * entry LAST: NULL channel entry marking end of records 318 * 319 * Record: 320 * int 0: base channel 321 * int 1: frequency of base channel, 322 * expressed as fb{mHz} * 16, 323 * int 2: offset frequency between channels, 324 * expressed as fo{mHz} * 16, 325 */ 326 327/* 328 * North American Broadcast Channels: 329 * 330 * 2: 55.25 mHz - 4: 67.25 mHz 331 * 5: 77.25 mHz - 6: 83.25 mHz 332 * 7: 175.25 mHz - 13: 211.25 mHz 333 * 14: 471.25 mHz - 83: 885.25 mHz 334 * 335 * IF freq: 45.75 mHz 336 */ 337#define OFFSET 6.00 338static int nabcst[] = { 339 83, (int)( 45.75 * FREQFACTOR), 0, 340 14, (int)(471.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 341 7, (int)(175.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 342 5, (int)( 77.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 343 2, (int)( 55.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 344 0 345}; 346#undef OFFSET 347 348/* 349 * North American Cable Channels, IRC: 350 * 351 * 2: 55.25 mHz - 4: 67.25 mHz 352 * 5: 77.25 mHz - 6: 83.25 mHz 353 * 7: 175.25 mHz - 13: 211.25 mHz 354 * 14: 121.25 mHz - 22: 169.25 mHz 355 * 23: 217.25 mHz - 94: 643.25 mHz 356 * 95: 91.25 mHz - 99: 115.25 mHz 357 * 358 * IF freq: 45.75 mHz 359 */ 360#define OFFSET 6.00 361static int irccable[] = { 362 116, (int)( 45.75 * FREQFACTOR), 0, 363 100, (int)(649.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 364 95, (int)( 91.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 365 23, (int)(217.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 366 14, (int)(121.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 367 7, (int)(175.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 368 5, (int)( 77.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 369 2, (int)( 55.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 370 0 371}; 372#undef OFFSET 373 374/* 375 * North American Cable Channels, HRC: 376 * 377 * 2: 54 mHz - 4: 66 mHz 378 * 5: 78 mHz - 6: 84 mHz 379 * 7: 174 mHz - 13: 210 mHz 380 * 14: 120 mHz - 22: 168 mHz 381 * 23: 216 mHz - 94: 642 mHz 382 * 95: 90 mHz - 99: 114 mHz 383 * 384 * IF freq: 45.75 mHz 385 */ 386#define OFFSET 6.00 387static int hrccable[] = { 388 116, (int)( 45.75 * FREQFACTOR), 0, 389 100, (int)(648.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 390 95, (int)( 90.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 391 23, (int)(216.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 392 14, (int)(120.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 393 7, (int)(174.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 394 5, (int)( 78.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 395 2, (int)( 54.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 396 0 397}; 398#undef OFFSET 399 400/* 401 * Western European broadcast channels: 402 * 403 * (there are others that appear to vary between countries - rmt) 404 * 405 * here's the table Philips provides: 406 * caution, some of the offsets don't compute... 407 * 408 * 1 4525 700 N21 409 * 410 * 2 4825 700 E2 411 * 3 5525 700 E3 412 * 4 6225 700 E4 413 * 414 * 5 17525 700 E5 415 * 6 18225 700 E6 416 * 7 18925 700 E7 417 * 8 19625 700 E8 418 * 9 20325 700 E9 419 * 10 21025 700 E10 420 * 11 21725 700 E11 421 * 12 22425 700 E12 422 * 423 * 13 5375 700 ITA 424 * 14 6225 700 ITB 425 * 426 * 15 8225 700 ITC 427 * 428 * 16 17525 700 ITD 429 * 17 18325 700 ITE 430 * 431 * 18 19225 700 ITF 432 * 19 20125 700 ITG 433 * 20 21025 700 ITH 434 * 435 * 21 47125 800 E21 436 * 22 47925 800 E22 437 * 23 48725 800 E23 438 * 24 49525 800 E24 439 * 25 50325 800 E25 440 * 26 51125 800 E26 441 * 27 51925 800 E27 442 * 28 52725 800 E28 443 * 29 53525 800 E29 444 * 30 54325 800 E30 445 * 31 55125 800 E31 446 * 32 55925 800 E32 447 * 33 56725 800 E33 448 * 34 57525 800 E34 449 * 35 58325 800 E35 450 * 36 59125 800 E36 451 * 37 59925 800 E37 452 * 38 60725 800 E38 453 * 39 61525 800 E39 454 * 40 62325 800 E40 455 * 41 63125 800 E41 456 * 42 63925 800 E42 457 * 43 64725 800 E43 458 * 44 65525 800 E44 459 * 45 66325 800 E45 460 * 46 67125 800 E46 461 * 47 67925 800 E47 462 * 48 68725 800 E48 463 * 49 69525 800 E49 464 * 50 70325 800 E50 465 * 51 71125 800 E51 466 * 52 71925 800 E52 467 * 53 72725 800 E53 468 * 54 73525 800 E54 469 * 55 74325 800 E55 470 * 56 75125 800 E56 471 * 57 75925 800 E57 472 * 58 76725 800 E58 473 * 59 77525 800 E59 474 * 60 78325 800 E60 475 * 61 79125 800 E61 476 * 62 79925 800 E62 477 * 63 80725 800 E63 478 * 64 81525 800 E64 479 * 65 82325 800 E65 480 * 66 83125 800 E66 481 * 67 83925 800 E67 482 * 68 84725 800 E68 483 * 69 85525 800 E69 484 * 485 * 70 4575 800 IA 486 * 71 5375 800 IB 487 * 72 6175 800 IC 488 * 489 * 74 6925 700 S01 490 * 75 7625 700 S02 491 * 76 8325 700 S03 492 * 493 * 80 10525 700 S1 494 * 81 11225 700 S2 495 * 82 11925 700 S3 496 * 83 12625 700 S4 497 * 84 13325 700 S5 498 * 85 14025 700 S6 499 * 86 14725 700 S7 500 * 87 15425 700 S8 501 * 88 16125 700 S9 502 * 89 16825 700 S10 503 * 90 23125 700 S11 504 * 91 23825 700 S12 505 * 92 24525 700 S13 506 * 93 25225 700 S14 507 * 94 25925 700 S15 508 * 95 26625 700 S16 509 * 96 27325 700 S17 510 * 97 28025 700 S18 511 * 98 28725 700 S19 512 * 99 29425 700 S20 513 * 514 * 515 * Channels S21 - S41 are taken from 516 * http://gemma.apple.com:80/dev/technotes/tn/tn1012.html 517 * 518 * 100 30325 800 S21 519 * 101 31125 800 S22 520 * 102 31925 800 S23 521 * 103 32725 800 S24 522 * 104 33525 800 S25 523 * 105 34325 800 S26 524 * 106 35125 800 S27 525 * 107 35925 800 S28 526 * 108 36725 800 S29 527 * 109 37525 800 S30 528 * 110 38325 800 S31 529 * 111 39125 800 S32 530 * 112 39925 800 S33 531 * 113 40725 800 S34 532 * 114 41525 800 S35 533 * 115 42325 800 S36 534 * 116 43125 800 S37 535 * 117 43925 800 S38 536 * 118 44725 800 S39 537 * 119 45525 800 S40 538 * 120 46325 800 S41 539 * 540 * 121 3890 000 IFFREQ 541 * 542 */ 543static int weurope[] = { 544 121, (int)( 38.90 * FREQFACTOR), 0, 545 100, (int)(303.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR), 546 90, (int)(231.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR), 547 80, (int)(105.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR), 548 74, (int)( 69.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR), 549 21, (int)(471.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR), 550 17, (int)(183.25 * FREQFACTOR), (int)(9.00 * FREQFACTOR), 551 16, (int)(175.25 * FREQFACTOR), (int)(9.00 * FREQFACTOR), 552 15, (int)(82.25 * FREQFACTOR), (int)(8.50 * FREQFACTOR), 553 13, (int)(53.75 * FREQFACTOR), (int)(8.50 * FREQFACTOR), 554 5, (int)(175.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR), 555 2, (int)(48.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR), 556 0 557}; 558 559/* 560 * Japanese Broadcast Channels: 561 * 562 * 1: 91.25MHz - 3: 103.25MHz 563 * 4: 171.25MHz - 7: 189.25MHz 564 * 8: 193.25MHz - 12: 217.25MHz (VHF) 565 * 13: 471.25MHz - 62: 765.25MHz (UHF) 566 * 567 * IF freq: 58.75 mHz 568 */ 569#define OFFSET 6.00 570#define IF_FREQ 58.75 571static int jpnbcst[] = { 572 62, (int)(IF_FREQ * FREQFACTOR), 0, 573 13, (int)(471.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 574 8, (int)(193.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 575 4, (int)(171.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 576 1, (int)( 91.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 577 0 578}; 579#undef IF_FREQ 580#undef OFFSET 581 582/* 583 * Japanese Cable Channels: 584 * 585 * 1: 91.25MHz - 3: 103.25MHz 586 * 4: 171.25MHz - 7: 189.25MHz 587 * 8: 193.25MHz - 12: 217.25MHz 588 * 13: 109.25MHz - 21: 157.25MHz 589 * 22: 165.25MHz 590 * 23: 223.25MHz - 63: 463.25MHz 591 * 592 * IF freq: 58.75 mHz 593 */ 594#define OFFSET 6.00 595#define IF_FREQ 58.75 596static int jpncable[] = { 597 63, (int)(IF_FREQ * FREQFACTOR), 0, 598 23, (int)(223.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 599 22, (int)(165.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 600 13, (int)(109.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 601 8, (int)(193.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 602 4, (int)(171.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 603 1, (int)( 91.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 604 0 605}; 606#undef IF_FREQ 607#undef OFFSET 608 609/* 610 * xUSSR Broadcast Channels: 611 * 612 * 1: 49.75MHz - 2: 59.25MHz 613 * 3: 77.25MHz - 5: 93.25MHz 614 * 6: 175.25MHz - 12: 223.25MHz 615 * 13-20 - not exist 616 * 21: 471.25MHz - 34: 575.25MHz 617 * 35: 583.25MHz - 69: 855.25MHz 618 * 619 * Cable channels 620 * 621 * 70: 111.25MHz - 77: 167.25MHz 622 * 78: 231.25MHz -107: 463.25MHz 623 * 624 * IF freq: 38.90 MHz 625 */ 626#define IF_FREQ 38.90 627static int xussr[] = { 628 107, (int)(IF_FREQ * FREQFACTOR), 0, 629 78, (int)(231.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR), 630 70, (int)(111.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR), 631 35, (int)(583.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR), 632 21, (int)(471.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR), 633 6, (int)(175.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR), 634 3, (int)( 77.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR), 635 1, (int)( 49.75 * FREQFACTOR), (int)(9.50 * FREQFACTOR), 636 0 637}; 638#undef IF_FREQ 639 640/* 641 * Australian broadcast channels 642 */ 643#define OFFSET 7.00 644#define IF_FREQ 38.90 645static int australia[] = { 646 83, (int)(IF_FREQ * FREQFACTOR), 0, 647 28, (int)(527.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 648 10, (int)(209.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 649 6, (int)(175.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 650 4, (int)( 95.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 651 3, (int)( 86.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 652 1, (int)( 57.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 653 0 654}; 655#undef OFFSET 656#undef IF_FREQ 657 658/* 659 * France broadcast channels 660 */ 661#define OFFSET 8.00 662#define IF_FREQ 38.90 663static int france[] = { 664 69, (int)(IF_FREQ * FREQFACTOR), 0, 665 21, (int)(471.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), /* 21 -> 69 */ 666 5, (int)(176.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), /* 5 -> 10 */ 667 4, (int)( 63.75 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), /* 4 */ 668 3, (int)( 60.50 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), /* 3 */ 669 1, (int)( 47.75 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), /* 1 2 */ 670 0 671}; 672#undef OFFSET 673#undef IF_FREQ 674 675static struct { 676 int *ptr; 677 char name[BT848_MAX_CHNLSET_NAME_LEN]; 678} freqTable[] = { 679 {NULL, ""}, 680 {nabcst, "nabcst"}, 681 {irccable, "cableirc"}, 682 {hrccable, "cablehrc"}, 683 {weurope, "weurope"}, 684 {jpnbcst, "jpnbcst"}, 685 {jpncable, "jpncable"}, 686 {xussr, "xussr"}, 687 {australia, "australia"}, 688 {france, "france"}, 689 690}; 691 692#define TBL_CHNL freqTable[ bktr->tuner.chnlset ].ptr[ x ] 693#define TBL_BASE_FREQ freqTable[ bktr->tuner.chnlset ].ptr[ x + 1 ] 694#define TBL_OFFSET freqTable[ bktr->tuner.chnlset ].ptr[ x + 2 ] 695static int 696frequency_lookup( bktr_ptr_t bktr, int channel ) 697{ 698 int x; 699 700 /* check for "> MAX channel" */ 701 x = 0; 702 if ( channel > TBL_CHNL ) 703 return( -1 ); 704 705 /* search the table for data */ 706 for ( x = 3; TBL_CHNL; x += 3 ) { 707 if ( channel >= TBL_CHNL ) { 708 return( TBL_BASE_FREQ + 709 ((channel - TBL_CHNL) * TBL_OFFSET) ); 710 } 711 } 712 713 /* not found, must be below the MIN channel */ 714 return( -1 ); 715} 716#undef TBL_OFFSET 717#undef TBL_BASE_FREQ 718#undef TBL_CHNL 719 720 721#define TBL_IF (bktr->format_params == BT848_IFORM_F_NTSCJ || \ 722 bktr->format_params == BT848_IFORM_F_NTSCM ? \ 723 nabcst[1] : weurope[1]) 724 725 726/* Initialise the tuner structures in the bktr_softc */ 727/* This is needed as the tuner details are no longer globally declared */ 728 729void select_tuner( bktr_ptr_t bktr, int tuner_type ) { 730 if (tuner_type < Bt848_MAX_TUNER) { 731 bktr->card.tuner = &tuners[ tuner_type ]; 732 } else { 733 bktr->card.tuner = NULL; 734 } 735} 736 737/* 738 * Tuner Notes: 739 * Programming the tuner properly is quite complicated. 740 * Here are some notes, based on a FM1246 data sheet for a PAL-I tuner. 741 * The tuner (front end) covers 45.75 Mhz - 855.25 Mhz and an FM band of 742 * 87.5 Mhz to 108.0 Mhz. 743 * 744 * RF and IF. RF = radio frequencies, it is the transmitted signal. 745 * IF is the Intermediate Frequency (the offset from the base 746 * signal where the video, color, audio and NICAM signals are. 747 * 748 * Eg, Picture at 38.9 Mhz, Colour at 34.47 MHz, sound at 32.9 MHz 749 * NICAM at 32.348 Mhz. 750 * Strangely enough, there is an IF (intermediate frequency) for 751 * FM Radio which is 10.7 Mhz. 752 * 753 * The tuner also works in Bands. Philips bands are 754 * FM radio band 87.50 to 108.00 MHz 755 * Low band 45.75 to 170.00 MHz 756 * Mid band 170.00 to 450.00 MHz 757 * High band 450.00 to 855.25 MHz 758 * 759 * 760 * Now we need to set the PLL on the tuner to the required freuqncy. 761 * It has a programmable divisor. 762 * For TV we want 763 * N = 16 (freq RF(pc) + freq IF(pc)) pc is picture carrier and RF and IF 764 * are in MHz. 765 766 * For RADIO we want a different equation. 767 * freq IF is 10.70 MHz (so the data sheet tells me) 768 * N = (freq RF + freq IF) / step size 769 * The step size must be set to 50 khz (so the data sheet tells me) 770 * (note this is 50 kHz, the other things are in MHz) 771 * so we end up with N = 20x(freq RF + 10.7) 772 * 773 */ 774 775#define LOW_BAND 0 776#define MID_BAND 1 777#define HIGH_BAND 2 778#define FM_RADIO_BAND 3 779 780 781/* Check if these are correct for other than Philips PAL */ 782#define STATUSBIT_COLD 0x80 783#define STATUSBIT_LOCK 0x40 784#define STATUSBIT_TV 0x20 785#define STATUSBIT_STEREO 0x10 /* valid if FM (aka not TV) */ 786#define STATUSBIT_ADC 0x07 787 788/* 789 * set the frequency of the tuner 790 * If 'type' is TV_FREQUENCY, the frequency is freq MHz*16 791 * If 'type' is FM_RADIO_FREQUENCY, the frequency is freq MHz * 100 792 * (note *16 gives is 4 bits of fraction, eg steps of nnn.0625) 793 * 794 */ 795int 796tv_freq( bktr_ptr_t bktr, int frequency, int type ) 797{ 798 const struct TUNER* tuner; 799 u_char addr; 800 u_char control; 801 u_char band; 802 int N; 803 int band_select = 0; 804#if defined( TEST_TUNER_AFC ) 805 int oldFrequency, afcDelta; 806#endif 807 808 tuner = bktr->card.tuner; 809 if ( tuner == NULL ) 810 return( -1 ); 811 812 if (tuner == &tuners[TUNER_MT2032]) { 813 mt2032_set_tv_freq(bktr, frequency); 814 return 0; 815 } 816 if (type == TV_FREQUENCY) { 817 /* 818 * select the band based on frequency 819 * XXX FIXME: get the cross-over points from the tuner struct 820 */ 821 if ( frequency < (160 * FREQFACTOR ) ) 822 band_select = LOW_BAND; 823 else if ( frequency < (454 * FREQFACTOR ) ) 824 band_select = MID_BAND; 825 else 826 band_select = HIGH_BAND; 827 828#if defined( TEST_TUNER_AFC ) 829 if ( bktr->tuner.afc ) 830 frequency -= 4; 831#endif 832 /* 833 * N = 16 * { fRF(pc) + fIF(pc) } 834 * or N = 16* fRF(pc) + 16*fIF(pc) } 835 * where: 836 * pc is picture carrier, fRF & fIF are in MHz 837 * 838 * fortunatly, frequency is passed in as MHz * 16 839 * and the TBL_IF frequency is also stored in MHz * 16 840 */ 841 N = frequency + TBL_IF; 842 843 /* set the address of the PLL */ 844 addr = bktr->card.tuner_pllAddr; 845 control = tuner->pllControl[ band_select ]; 846 band = tuner->bandAddrs[ band_select ]; 847 848 if(!(band && control)) /* Don't try to set un- */ 849 return(-1); /* supported modes. */ 850 851 if ( frequency > bktr->tuner.frequency ) { 852 i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff ); 853 i2cWrite( bktr, addr, control, band ); 854 } 855 else { 856 i2cWrite( bktr, addr, control, band ); 857 i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff ); 858 } 859 860#if defined( TUNER_AFC ) 861 if ( bktr->tuner.afc == TRUE ) { 862#if defined( TEST_TUNER_AFC ) 863 oldFrequency = frequency; 864#endif 865 if ( (N = do_afc( bktr, addr, N )) < 0 ) { 866 /* AFC failed, restore requested frequency */ 867 N = frequency + TBL_IF; 868#if defined( TEST_TUNER_AFC ) 869 printf("%s: do_afc: failed to lock\n", 870 bktr_name(bktr)); 871#endif 872 i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff ); 873 } 874 else 875 frequency = N - TBL_IF; 876#if defined( TEST_TUNER_AFC ) 877 printf("%s: do_afc: returned freq %d (%d %% %d)\n", bktr_name(bktr), frequency, frequency / 16, frequency % 16); 878 afcDelta = frequency - oldFrequency; 879 printf("%s: changed by: %d clicks (%d mod %d)\n", bktr_name(bktr), afcDelta, afcDelta / 16, afcDelta % 16); 880#endif 881 } 882#endif /* TUNER_AFC */ 883 884 bktr->tuner.frequency = frequency; 885 } 886 887 if ( type == FM_RADIO_FREQUENCY ) { 888 band_select = FM_RADIO_BAND; 889 890 /* 891 * N = { fRF(pc) + fIF(pc) }/step_size 892 * The step size is 50kHz for FM radio. 893 * (eg after 102.35MHz comes 102.40 MHz) 894 * fIF is 10.7 MHz (as detailed in the specs) 895 * 896 * frequency is passed in as MHz * 100 897 * 898 * So, we have N = (frequency/100 + 10.70) /(50/1000) 899 */ 900 N = (frequency + 1070)/5; 901 902 /* set the address of the PLL */ 903 addr = bktr->card.tuner_pllAddr; 904 control = tuner->pllControl[ band_select ]; 905 band = tuner->bandAddrs[ band_select ]; 906 907 if(!(band && control)) /* Don't try to set un- */ 908 return(-1); /* supported modes. */ 909 910 band |= bktr->tuner.radio_mode; /* tuner.radio_mode is set in 911 * the ioctls RADIO_SETMODE 912 * and RADIO_GETMODE */ 913 914 i2cWrite( bktr, addr, control, band ); 915 i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff ); 916 917 bktr->tuner.frequency = (N * 5) - 1070; 918 919 920 } 921 922 923 return( 0 ); 924} 925 926 927 928#if defined( TUNER_AFC ) 929/* 930 * 931 */ 932int 933do_afc( bktr_ptr_t bktr, int addr, int frequency ) 934{ 935 int step; 936 int status; 937 int origFrequency; 938 939 origFrequency = frequency; 940 941 /* wait for first setting to take effect */ 942 tsleep( BKTR_SLEEP, PZERO, "tuning", hz/8 ); 943 944 if ( (status = i2cRead( bktr, addr + 1 )) < 0 ) 945 return( -1 ); 946 947#if defined( TEST_TUNER_AFC ) 948 printf( "%s: Original freq: %d, status: 0x%02x\n", bktr_name(bktr), frequency, status ); 949#endif 950 for ( step = 0; step < AFC_MAX_STEP; ++step ) { 951 if ( (status = i2cRead( bktr, addr + 1 )) < 0 ) 952 goto fubar; 953 if ( !(status & 0x40) ) { 954#if defined( TEST_TUNER_AFC ) 955 printf( "%s: no lock!\n", bktr_name(bktr) ); 956#endif 957 goto fubar; 958 } 959 960 switch( status & AFC_BITS ) { 961 case AFC_FREQ_CENTERED: 962#if defined( TEST_TUNER_AFC ) 963 printf( "%s: Centered, freq: %d, status: 0x%02x\n", bktr_name(bktr), frequency, status ); 964#endif 965 return( frequency ); 966 967 case AFC_FREQ_MINUS_125: 968 case AFC_FREQ_MINUS_62: 969#if defined( TEST_TUNER_AFC ) 970 printf( "%s: Low, freq: %d, status: 0x%02x\n", bktr_name(bktr), frequency, status ); 971#endif 972 --frequency; 973 break; 974 975 case AFC_FREQ_PLUS_62: 976 case AFC_FREQ_PLUS_125: 977#if defined( TEST_TUNER_AFC ) 978 printf( "%s: Hi, freq: %d, status: 0x%02x\n", bktr_name(bktr), frequency, status ); 979#endif 980 ++frequency; 981 break; 982 } 983 984 i2cWrite( bktr, addr, 985 (frequency>>8) & 0x7f, frequency & 0xff ); 986 DELAY( AFC_DELAY ); 987 } 988 989 fubar: 990 i2cWrite( bktr, addr, 991 (origFrequency>>8) & 0x7f, origFrequency & 0xff ); 992 993 return( -1 ); 994} 995#endif /* TUNER_AFC */ 996#undef TBL_IF 997 998 999/* 1000 * Get the Tuner status and signal strength 1001 */ 1002int get_tuner_status( bktr_ptr_t bktr ) { 1003 if (bktr->card.tuner == &tuners[TUNER_MT2032]) 1004 return 0; 1005 return i2cRead( bktr, bktr->card.tuner_pllAddr + 1 ); 1006} 1007 1008/* 1009 * set the channel of the tuner 1010 */ 1011int 1012tv_channel( bktr_ptr_t bktr, int channel ) 1013{ 1014 int frequency; 1015 1016 /* calculate the frequency according to tuner type */ 1017 if ( (frequency = frequency_lookup( bktr, channel )) < 0 ) 1018 return( -1 ); 1019 1020 /* set the new frequency */ 1021 if ( tv_freq( bktr, frequency, TV_FREQUENCY ) < 0 ) 1022 return( -1 ); 1023 1024 /* OK to update records */ 1025 return( (bktr->tuner.channel = channel) ); 1026} 1027 1028/* 1029 * get channelset name 1030 */ 1031int 1032tuner_getchnlset(struct bktr_chnlset *chnlset) 1033{ 1034 if (( chnlset->index < CHNLSET_MIN ) || 1035 ( chnlset->index > CHNLSET_MAX )) 1036 return( EINVAL ); 1037 1038 memcpy(&chnlset->name, &freqTable[chnlset->index].name, 1039 BT848_MAX_CHNLSET_NAME_LEN); 1040 1041 chnlset->max_channel=freqTable[chnlset->index].ptr[0]; 1042 return( 0 ); 1043} 1044 1045 1046 1047 1048#define TDA9887_ADDR 0x86 1049 1050static int 1051TDA9887_init(bktr_ptr_t bktr, int output2_enable) 1052{ 1053 u_char addr = TDA9887_ADDR; 1054 1055 i2cWrite(bktr, addr, 0, output2_enable ? 0x50 : 0xd0); 1056 i2cWrite(bktr, addr, 1, 0x6e); /* takeover point / de-emphasis */ 1057 1058 /* PAL BG: 0x09 PAL I: 0x0a NTSC: 0x04 */ 1059#ifdef MT2032_NTSC 1060 i2cWrite(bktr, addr, 2, 0x04); 1061#else 1062 i2cWrite(bktr, addr, 2, 0x09); 1063#endif 1064 return 0; 1065} 1066 1067 1068 1069#define MT2032_OPTIMIZE_VCO 1 1070 1071/* holds the value of XOGC register after init */ 1072static int MT2032_XOGC = 4; 1073 1074/* card.tuner_pllAddr not set during init */ 1075#define MT2032_ADDR 0xc0 1076 1077#ifndef MT2032_ADDR 1078#define MT2032_ADDR (bktr->card.tuner_pllAddr) 1079#endif 1080 1081static int 1082_MT2032_GetRegister(bktr_ptr_t bktr, u_char regNum) 1083{ 1084 int ch; 1085 1086 if (i2cWrite(bktr, MT2032_ADDR, regNum, -1) == -1) { 1087 if (bootverbose) 1088 printf("%s: MT2032 write failed (i2c addr %#x)\n", 1089 bktr_name(bktr), MT2032_ADDR); 1090 return -1; 1091 } 1092 if ((ch = i2cRead(bktr, MT2032_ADDR + 1)) == -1) { 1093 if (bootverbose) 1094 printf("%s: MT2032 get register %d failed\n", 1095 bktr_name(bktr), regNum); 1096 return -1; 1097 } 1098 return ch; 1099} 1100 1101static void 1102_MT2032_SetRegister(bktr_ptr_t bktr, u_char regNum, u_char data) 1103{ 1104 i2cWrite(bktr, MT2032_ADDR, regNum, data); 1105} 1106 1107#define MT2032_GetRegister(r) _MT2032_GetRegister(bktr,r) 1108#define MT2032_SetRegister(r,d) _MT2032_SetRegister(bktr,r,d) 1109 1110 1111int 1112mt2032_init(bktr_ptr_t bktr) 1113{ 1114 u_char rdbuf[22]; 1115 int xogc, xok = 0; 1116 int i; 1117 int x; 1118 1119 TDA9887_init(bktr, 0); 1120 1121 for (i = 0; i < 21; i++) { 1122 if ((x = MT2032_GetRegister(i)) == -1) 1123 break; 1124 rdbuf[i] = x; 1125 } 1126 if (i < 21) 1127 return -1; 1128 1129 printf("%s: MT2032: Companycode=%02x%02x Part=%02x Revision=%02x\n", 1130 bktr_name(bktr), 1131 rdbuf[0x11], rdbuf[0x12], rdbuf[0x13], rdbuf[0x14]); 1132 if (rdbuf[0x13] != 4) { 1133 printf("%s: MT2032 not found or unknown type\n", bktr_name(bktr)); 1134 return -1; 1135 } 1136 1137 /* Initialize Registers per spec. */ 1138 MT2032_SetRegister(2, 0xff); 1139 MT2032_SetRegister(3, 0x0f); 1140 MT2032_SetRegister(4, 0x1f); 1141 MT2032_SetRegister(6, 0xe4); 1142 MT2032_SetRegister(7, 0x8f); 1143 MT2032_SetRegister(8, 0xc3); 1144 MT2032_SetRegister(9, 0x4e); 1145 MT2032_SetRegister(10, 0xec); 1146 MT2032_SetRegister(13, 0x32); 1147 1148 /* Adjust XOGC (register 7), wait for XOK */ 1149 xogc = 7; 1150 do { 1151 DELAY(10000); 1152 xok = MT2032_GetRegister(0x0e) & 0x01; 1153 if (xok == 1) { 1154 break; 1155 } 1156 xogc--; 1157 if (xogc == 3) { 1158 xogc = 4; /* min. 4 per spec */ 1159 break; 1160 } 1161 MT2032_SetRegister(7, 0x88 + xogc); 1162 } while (xok != 1); 1163 1164 TDA9887_init(bktr, 1); 1165 1166 MT2032_XOGC = xogc; 1167 1168 return 0; 1169} 1170 1171static int 1172MT2032_SpurCheck(int f1, int f2, int spectrum_from, int spectrum_to) 1173{ 1174 int n1 = 1, n2, f; 1175 1176 f1 = f1 / 1000; /* scale to kHz to avoid 32bit overflows */ 1177 f2 = f2 / 1000; 1178 spectrum_from /= 1000; 1179 spectrum_to /= 1000; 1180 1181 do { 1182 n2 = -n1; 1183 f = n1 * (f1 - f2); 1184 do { 1185 n2--; 1186 f = f - f2; 1187 if ((f > spectrum_from) && (f < spectrum_to)) { 1188 return 1; 1189 } 1190 } while ((f > (f2 - spectrum_to)) || (n2 > -5)); 1191 n1++; 1192 } while (n1 < 5); 1193 1194 return 0; 1195} 1196 1197static int 1198MT2032_ComputeFreq( 1199 int rfin, 1200 int if1, 1201 int if2, 1202 int spectrum_from, 1203 int spectrum_to, 1204 unsigned char *buf, 1205 int *ret_sel, 1206 int xogc 1207) 1208{ /* all in Hz */ 1209 int fref, lo1, lo1n, lo1a, s, sel; 1210 int lo1freq, desired_lo1, desired_lo2, lo2, lo2n, lo2a, 1211 lo2num, lo2freq; 1212 int nLO1adjust; 1213 1214 fref = 5250 * 1000; /* 5.25MHz */ 1215 1216 /* per spec 2.3.1 */ 1217 desired_lo1 = rfin + if1; 1218 lo1 = (2 * (desired_lo1 / 1000) + (fref / 1000)) / (2 * fref / 1000); 1219 lo1freq = lo1 * fref; 1220 desired_lo2 = lo1freq - rfin - if2; 1221 1222 /* per spec 2.3.2 */ 1223 for (nLO1adjust = 1; nLO1adjust < 3; nLO1adjust++) { 1224 if (!MT2032_SpurCheck(lo1freq, desired_lo2, spectrum_from, spectrum_to)) { 1225 break; 1226 } 1227 if (lo1freq < desired_lo1) { 1228 lo1 += nLO1adjust; 1229 } else { 1230 lo1 -= nLO1adjust; 1231 } 1232 1233 lo1freq = lo1 * fref; 1234 desired_lo2 = lo1freq - rfin - if2; 1235 } 1236 1237 /* per spec 2.3.3 */ 1238 s = lo1freq / 1000 / 1000; 1239 1240 if (MT2032_OPTIMIZE_VCO) { 1241 if (s > 1890) { 1242 sel = 0; 1243 } else if (s > 1720) { 1244 sel = 1; 1245 } else if (s > 1530) { 1246 sel = 2; 1247 } else if (s > 1370) { 1248 sel = 3; 1249 } else { 1250 sel = 4;/* >1090 */ 1251 } 1252 } else { 1253 if (s > 1790) { 1254 sel = 0;/* <1958 */ 1255 } else if (s > 1617) { 1256 sel = 1; 1257 } else if (s > 1449) { 1258 sel = 2; 1259 } else if (s > 1291) { 1260 sel = 3; 1261 } else { 1262 sel = 4;/* >1090 */ 1263 } 1264 } 1265 1266 *ret_sel = sel; 1267 1268 /* per spec 2.3.4 */ 1269 lo1n = lo1 / 8; 1270 lo1a = lo1 - (lo1n * 8); 1271 lo2 = desired_lo2 / fref; 1272 lo2n = lo2 / 8; 1273 lo2a = lo2 - (lo2n * 8); 1274 /* scale to fit in 32bit arith */ 1275 lo2num = ((desired_lo2 / 1000) % (fref / 1000)) * 3780 / (fref / 1000); 1276 lo2freq = (lo2a + 8 * lo2n) * fref + lo2num * (fref / 1000) / 3780 * 1000; 1277 1278 if (lo1a < 0 || lo1a > 7 || lo1n < 17 || lo1n > 48 || lo2a < 0 || 1279 lo2a > 7 || lo2n < 17 || lo2n > 30) { 1280 printf("MT2032: parameter out of range\n"); 1281 return -1; 1282 } 1283 /* set up MT2032 register map for transfer over i2c */ 1284 buf[0] = lo1n - 1; 1285 buf[1] = lo1a | (sel << 4); 1286 buf[2] = 0x86; /* LOGC */ 1287 buf[3] = 0x0f; /* reserved */ 1288 buf[4] = 0x1f; 1289 buf[5] = (lo2n - 1) | (lo2a << 5); 1290 if (rfin < 400 * 1000 * 1000) { 1291 buf[6] = 0xe4; 1292 } else { 1293 buf[6] = 0xf4; /* set PKEN per rev 1.2 */ 1294 } 1295 1296 buf[7] = 8 + xogc; 1297 buf[8] = 0xc3; /* reserved */ 1298 buf[9] = 0x4e; /* reserved */ 1299 buf[10] = 0xec; /* reserved */ 1300 buf[11] = (lo2num & 0xff); 1301 buf[12] = (lo2num >> 8) | 0x80; /* Lo2RST */ 1302 1303 return 0; 1304} 1305 1306static int 1307MT2032_CheckLOLock(bktr_ptr_t bktr) 1308{ 1309 int t, lock = 0; 1310 for (t = 0; t < 10; t++) { 1311 lock = MT2032_GetRegister(0x0e) & 0x06; 1312 if (lock == 6) { 1313 break; 1314 } 1315 DELAY(1000); 1316 } 1317 return lock; 1318} 1319 1320static int 1321MT2032_OptimizeVCO(bktr_ptr_t bktr, int sel, int lock) 1322{ 1323 int tad1, lo1a; 1324 1325 tad1 = MT2032_GetRegister(0x0f) & 0x07; 1326 1327 if (tad1 == 0) { 1328 return lock; 1329 } 1330 if (tad1 == 1) { 1331 return lock; 1332 } 1333 if (tad1 == 2) { 1334 if (sel == 0) { 1335 return lock; 1336 } else { 1337 sel--; 1338 } 1339 } else { 1340 if (sel < 4) { 1341 sel++; 1342 } else { 1343 return lock; 1344 } 1345 } 1346 lo1a = MT2032_GetRegister(0x01) & 0x07; 1347 MT2032_SetRegister(0x01, lo1a | (sel << 4)); 1348 lock = MT2032_CheckLOLock(bktr); 1349 return lock; 1350} 1351 1352static int 1353MT2032_SetIFFreq(bktr_ptr_t bktr, int rfin, int if1, int if2, int from, int to) 1354{ 1355 u_char buf[21]; 1356 int lint_try, sel, lock = 0; 1357 1358 if (MT2032_ComputeFreq(rfin, if1, if2, from, to, &buf[0], &sel, MT2032_XOGC) == -1) 1359 return -1; 1360 1361 TDA9887_init(bktr, 0); 1362 1363 /* send only the relevant registers per Rev. 1.2 */ 1364 MT2032_SetRegister(0, buf[0x00]); 1365 MT2032_SetRegister(1, buf[0x01]); 1366 MT2032_SetRegister(2, buf[0x02]); 1367 1368 MT2032_SetRegister(5, buf[0x05]); 1369 MT2032_SetRegister(6, buf[0x06]); 1370 MT2032_SetRegister(7, buf[0x07]); 1371 1372 MT2032_SetRegister(11, buf[0x0B]); 1373 MT2032_SetRegister(12, buf[0x0C]); 1374 1375 /* wait for PLLs to lock (per manual), retry LINT if not. */ 1376 for (lint_try = 0; lint_try < 2; lint_try++) { 1377 lock = MT2032_CheckLOLock(bktr); 1378 1379 if (MT2032_OPTIMIZE_VCO) { 1380 lock = MT2032_OptimizeVCO(bktr, sel, lock); 1381 } 1382 if (lock == 6) { 1383 break; 1384 } 1385 /* set LINT to re-init PLLs */ 1386 MT2032_SetRegister(7, 0x80 + 8 + MT2032_XOGC); 1387 DELAY(10000); 1388 MT2032_SetRegister(7, 8 + MT2032_XOGC); 1389 } 1390 if (lock != 6) 1391 printf("%s: PLL didn't lock\n", bktr_name(bktr)); 1392 1393 MT2032_SetRegister(2, 0x20); 1394 1395 TDA9887_init(bktr, 1); 1396 return 0; 1397} 1398 1399static void 1400mt2032_set_tv_freq(bktr_ptr_t bktr, unsigned int freq) 1401{ 1402 int if2,from,to; 1403 int stat, tad; 1404 1405#ifdef MT2032_NTSC 1406 from=40750*1000; 1407 to=46750*1000; 1408 if2=45750*1000; 1409#else 1410 from=32900*1000; 1411 to=39900*1000; 1412 if2=38900*1000; 1413#endif 1414 1415 if (MT2032_SetIFFreq(bktr, freq*62500 /* freq*1000*1000/16 */, 1416 1090*1000*1000, if2, from, to) == 0) { 1417 bktr->tuner.frequency = freq; 1418 stat = MT2032_GetRegister(0x0e); 1419 tad = MT2032_GetRegister(0x0f); 1420 if (bootverbose) 1421 printf("%s: frequency set to %d, st = %#x, tad = %#x\n", 1422 bktr_name(bktr), freq*62500, stat, tad); 1423 } 1424} 1425