1235679Sadrian/*-
2235679Sadrian * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3235679Sadrian * All rights reserved.
4235679Sadrian *
5235679Sadrian * Redistribution and use in source and binary forms, with or without
6235679Sadrian * modification, are permitted provided that the following conditions
7235679Sadrian * are met:
8235679Sadrian * 1. Redistributions of source code must retain the above copyright
9235679Sadrian *    notice, this list of conditions and the following disclaimer,
10235679Sadrian *    without modification.
11235679Sadrian * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12235679Sadrian *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13235679Sadrian *    redistribution must be conditioned upon including a substantially
14235679Sadrian *    similar Disclaimer requirement for further binary redistribution.
15235679Sadrian *
16235679Sadrian * NO WARRANTY
17235679Sadrian * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18235679Sadrian * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19235679Sadrian * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20235679Sadrian * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21235679Sadrian * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22235679Sadrian * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23235679Sadrian * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24235679Sadrian * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25235679Sadrian * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26235679Sadrian * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27235679Sadrian * THE POSSIBILITY OF SUCH DAMAGES.
28235679Sadrian */
29235679Sadrian
30235679Sadrian#include <sys/cdefs.h>
31235679Sadrian__FBSDID("$FreeBSD$");
32235679Sadrian
33235679Sadrian/*
34235679Sadrian * Driver for the Atheros Wireless LAN controller.
35235679Sadrian *
36235679Sadrian * This software is derived from work of Atsushi Onoe; his contribution
37235679Sadrian * is greatly appreciated.
38235679Sadrian */
39235679Sadrian
40235679Sadrian#include "opt_inet.h"
41235679Sadrian#include "opt_ath.h"
42235679Sadrian/*
43235679Sadrian * This is needed for register operations which are performed
44235679Sadrian * by the driver - eg, calls to ath_hal_gettsf32().
45235679Sadrian *
46235679Sadrian * It's also required for any AH_DEBUG checks in here, eg the
47235679Sadrian * module dependencies.
48235679Sadrian */
49235679Sadrian#include "opt_ah.h"
50235679Sadrian#include "opt_wlan.h"
51235679Sadrian
52235679Sadrian#include <sys/param.h>
53235679Sadrian#include <sys/systm.h>
54235679Sadrian#include <sys/sysctl.h>
55235679Sadrian#include <sys/mbuf.h>
56235679Sadrian#include <sys/malloc.h>
57235679Sadrian#include <sys/lock.h>
58235679Sadrian#include <sys/mutex.h>
59235679Sadrian#include <sys/kernel.h>
60235679Sadrian#include <sys/socket.h>
61235679Sadrian#include <sys/sockio.h>
62235679Sadrian#include <sys/errno.h>
63235679Sadrian#include <sys/callout.h>
64235679Sadrian#include <sys/bus.h>
65235679Sadrian#include <sys/endian.h>
66235679Sadrian#include <sys/kthread.h>
67235679Sadrian#include <sys/taskqueue.h>
68235679Sadrian#include <sys/priv.h>
69235679Sadrian#include <sys/module.h>
70235679Sadrian#include <sys/ktr.h>
71235679Sadrian#include <sys/smp.h>	/* for mp_ncpus */
72235679Sadrian
73235679Sadrian#include <machine/bus.h>
74235679Sadrian
75235679Sadrian#include <net/if.h>
76235679Sadrian#include <net/if_dl.h>
77235679Sadrian#include <net/if_media.h>
78235679Sadrian#include <net/if_types.h>
79235679Sadrian#include <net/if_arp.h>
80235679Sadrian#include <net/ethernet.h>
81235679Sadrian#include <net/if_llc.h>
82235679Sadrian
83235679Sadrian#include <net80211/ieee80211_var.h>
84235679Sadrian#include <net80211/ieee80211_regdomain.h>
85235679Sadrian#ifdef IEEE80211_SUPPORT_SUPERG
86235679Sadrian#include <net80211/ieee80211_superg.h>
87235679Sadrian#endif
88235679Sadrian#ifdef IEEE80211_SUPPORT_TDMA
89235679Sadrian#include <net80211/ieee80211_tdma.h>
90235679Sadrian#endif
91235679Sadrian
92235679Sadrian#include <net/bpf.h>
93235679Sadrian
94235679Sadrian#ifdef INET
95235679Sadrian#include <netinet/in.h>
96235679Sadrian#include <netinet/if_ether.h>
97235679Sadrian#endif
98235679Sadrian
99235679Sadrian#include <dev/ath/if_athvar.h>
100235679Sadrian#include <dev/ath/ath_hal/ah_devid.h>		/* XXX for softled */
101235679Sadrian#include <dev/ath/ath_hal/ah_diagcodes.h>
102235679Sadrian
103235679Sadrian#include <dev/ath/if_ath_debug.h>
104235679Sadrian#include <dev/ath/if_ath_misc.h>
105235679Sadrian#include <dev/ath/if_ath_tsf.h>
106235679Sadrian#include <dev/ath/if_ath_tx.h>
107235679Sadrian#include <dev/ath/if_ath_sysctl.h>
108235679Sadrian#include <dev/ath/if_ath_led.h>
109235679Sadrian#include <dev/ath/if_ath_keycache.h>
110235679Sadrian#include <dev/ath/if_ath_rx.h>
111235679Sadrian#include <dev/ath/if_ath_beacon.h>
112235679Sadrian#include <dev/ath/if_athdfs.h>
113235679Sadrian
114235679Sadrian#ifdef ATH_TX99_DIAG
115235679Sadrian#include <dev/ath/ath_tx99/ath_tx99.h>
116235679Sadrian#endif
117235679Sadrian
118243592Sadrian#ifdef	ATH_DEBUG_ALQ
119243592Sadrian#include <dev/ath/if_ath_alq.h>
120243592Sadrian#endif
121243592Sadrian
122235679Sadrian#ifdef IEEE80211_SUPPORT_TDMA
123235679Sadrian#include <dev/ath/if_ath_tdma.h>
124235679Sadrian
125235679Sadrianstatic void	ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt,
126235679Sadrian		    u_int32_t bintval);
127235679Sadrianstatic void	ath_tdma_bintvalsetup(struct ath_softc *sc,
128235679Sadrian		    const struct ieee80211_tdma_state *tdma);
129235679Sadrian#endif /* IEEE80211_SUPPORT_TDMA */
130235679Sadrian
131235679Sadrian#ifdef IEEE80211_SUPPORT_TDMA
132235679Sadrianstatic void
133235679Sadrianath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, u_int32_t bintval)
134235679Sadrian{
135235679Sadrian	struct ath_hal *ah = sc->sc_ah;
136235679Sadrian	HAL_BEACON_TIMERS bt;
137235679Sadrian
138235679Sadrian	bt.bt_intval = bintval | HAL_BEACON_ENA;
139235679Sadrian	bt.bt_nexttbtt = nexttbtt;
140235679Sadrian	bt.bt_nextdba = (nexttbtt<<3) - sc->sc_tdmadbaprep;
141235679Sadrian	bt.bt_nextswba = (nexttbtt<<3) - sc->sc_tdmaswbaprep;
142235679Sadrian	bt.bt_nextatim = nexttbtt+1;
143235679Sadrian	/* Enables TBTT, DBA, SWBA timers by default */
144235679Sadrian	bt.bt_flags = 0;
145243592Sadrian#if 0
146243592Sadrian	DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
147243592Sadrian	    "%s: intval=%d (0x%08x) nexttbtt=%u (0x%08x), nextdba=%u (0x%08x), nextswba=%u (0x%08x),nextatim=%u (0x%08x)\n",
148243592Sadrian	    __func__,
149243592Sadrian	    bt.bt_intval,
150243592Sadrian	    bt.bt_intval,
151243592Sadrian	    bt.bt_nexttbtt,
152243592Sadrian	    bt.bt_nexttbtt,
153243592Sadrian	    bt.bt_nextdba,
154243592Sadrian	    bt.bt_nextdba,
155243592Sadrian	    bt.bt_nextswba,
156243592Sadrian	    bt.bt_nextswba,
157243592Sadrian	    bt.bt_nextatim,
158243592Sadrian	    bt.bt_nextatim);
159243592Sadrian#endif
160243592Sadrian
161243597Sadrian#ifdef	ATH_DEBUG_ALQ
162243592Sadrian	if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET)) {
163243592Sadrian		struct if_ath_alq_tdma_timer_set t;
164243592Sadrian		t.bt_intval = htobe32(bt.bt_intval);
165243592Sadrian		t.bt_nexttbtt = htobe32(bt.bt_nexttbtt);
166243592Sadrian		t.bt_nextdba = htobe32(bt.bt_nextdba);
167243592Sadrian		t.bt_nextswba = htobe32(bt.bt_nextswba);
168243592Sadrian		t.bt_nextatim = htobe32(bt.bt_nextatim);
169243592Sadrian		t.bt_flags = htobe32(bt.bt_flags);
170243592Sadrian		t.sc_tdmadbaprep = htobe32(sc->sc_tdmadbaprep);
171243592Sadrian		t.sc_tdmaswbaprep = htobe32(sc->sc_tdmaswbaprep);
172243592Sadrian		if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET,
173243592Sadrian		    sizeof(t), (char *) &t);
174243592Sadrian	}
175243597Sadrian#endif
176243592Sadrian
177243592Sadrian	DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
178243592Sadrian	    "%s: nexttbtt=%u (0x%08x), nexttbtt tsf=%lld (0x%08llx)\n",
179243592Sadrian	    __func__,
180243592Sadrian	    bt.bt_nexttbtt,
181243592Sadrian	    bt.bt_nexttbtt,
182243592Sadrian	    (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10),
183243592Sadrian	    (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10));
184235679Sadrian	ath_hal_beaconsettimers(ah, &bt);
185235679Sadrian}
186235679Sadrian
187235679Sadrian/*
188235679Sadrian * Calculate the beacon interval.  This is periodic in the
189235679Sadrian * superframe for the bss.  We assume each station is configured
190235679Sadrian * identically wrt transmit rate so the guard time we calculate
191235679Sadrian * above will be the same on all stations.  Note we need to
192235679Sadrian * factor in the xmit time because the hardware will schedule
193235679Sadrian * a frame for transmit if the start of the frame is within
194235679Sadrian * the burst time.  When we get hardware that properly kills
195235679Sadrian * frames in the PCU we can reduce/eliminate the guard time.
196235679Sadrian *
197235679Sadrian * Roundup to 1024 is so we have 1 TU buffer in the guard time
198235679Sadrian * to deal with the granularity of the nexttbtt timer.  11n MAC's
199235679Sadrian * with 1us timer granularity should allow us to reduce/eliminate
200235679Sadrian * this.
201235679Sadrian */
202235679Sadrianstatic void
203235679Sadrianath_tdma_bintvalsetup(struct ath_softc *sc,
204235679Sadrian	const struct ieee80211_tdma_state *tdma)
205235679Sadrian{
206235679Sadrian	/* copy from vap state (XXX check all vaps have same value?) */
207235679Sadrian	sc->sc_tdmaslotlen = tdma->tdma_slotlen;
208235679Sadrian
209235679Sadrian	sc->sc_tdmabintval = roundup((sc->sc_tdmaslotlen+sc->sc_tdmaguard) *
210235679Sadrian		tdma->tdma_slotcnt, 1024);
211235679Sadrian	sc->sc_tdmabintval >>= 10;		/* TSF -> TU */
212235679Sadrian	if (sc->sc_tdmabintval & 1)
213235679Sadrian		sc->sc_tdmabintval++;
214235679Sadrian
215235679Sadrian	if (tdma->tdma_slot == 0) {
216235679Sadrian		/*
217235679Sadrian		 * Only slot 0 beacons; other slots respond.
218235679Sadrian		 */
219235679Sadrian		sc->sc_imask |= HAL_INT_SWBA;
220235679Sadrian		sc->sc_tdmaswba = 0;		/* beacon immediately */
221235679Sadrian	} else {
222235679Sadrian		/* XXX all vaps must be slot 0 or slot !0 */
223235679Sadrian		sc->sc_imask &= ~HAL_INT_SWBA;
224235679Sadrian	}
225235679Sadrian}
226235679Sadrian
227235679Sadrian/*
228235679Sadrian * Max 802.11 overhead.  This assumes no 4-address frames and
229235679Sadrian * the encapsulation done by ieee80211_encap (llc).  We also
230235679Sadrian * include potential crypto overhead.
231235679Sadrian */
232235679Sadrian#define	IEEE80211_MAXOVERHEAD \
233235679Sadrian	(sizeof(struct ieee80211_qosframe) \
234235679Sadrian	 + sizeof(struct llc) \
235235679Sadrian	 + IEEE80211_ADDR_LEN \
236235679Sadrian	 + IEEE80211_WEP_IVLEN \
237235679Sadrian	 + IEEE80211_WEP_KIDLEN \
238235679Sadrian	 + IEEE80211_WEP_CRCLEN \
239235679Sadrian	 + IEEE80211_WEP_MICLEN \
240235679Sadrian	 + IEEE80211_CRC_LEN)
241235679Sadrian
242235679Sadrian/*
243235679Sadrian * Setup initially for tdma operation.  Start the beacon
244235679Sadrian * timers and enable SWBA if we are slot 0.  Otherwise
245235679Sadrian * we wait for slot 0 to arrive so we can sync up before
246235679Sadrian * starting to transmit.
247235679Sadrian */
248235679Sadrianvoid
249235679Sadrianath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap)
250235679Sadrian{
251235679Sadrian	struct ath_hal *ah = sc->sc_ah;
252235679Sadrian	struct ifnet *ifp = sc->sc_ifp;
253235679Sadrian	struct ieee80211com *ic = ifp->if_l2com;
254235679Sadrian	const struct ieee80211_txparam *tp;
255235679Sadrian	const struct ieee80211_tdma_state *tdma = NULL;
256235679Sadrian	int rix;
257235679Sadrian
258235679Sadrian	if (vap == NULL) {
259235679Sadrian		vap = TAILQ_FIRST(&ic->ic_vaps);   /* XXX */
260235679Sadrian		if (vap == NULL) {
261235679Sadrian			if_printf(ifp, "%s: no vaps?\n", __func__);
262235679Sadrian			return;
263235679Sadrian		}
264235679Sadrian	}
265235679Sadrian	/* XXX should take a locked ref to iv_bss */
266235679Sadrian	tp = vap->iv_bss->ni_txparms;
267235679Sadrian	/*
268235679Sadrian	 * Calculate the guard time for each slot.  This is the
269235679Sadrian	 * time to send a maximal-size frame according to the
270235679Sadrian	 * fixed/lowest transmit rate.  Note that the interface
271235679Sadrian	 * mtu does not include the 802.11 overhead so we must
272235679Sadrian	 * tack that on (ath_hal_computetxtime includes the
273235679Sadrian	 * preamble and plcp in it's calculation).
274235679Sadrian	 */
275235679Sadrian	tdma = vap->iv_tdma;
276235679Sadrian	if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
277235679Sadrian		rix = ath_tx_findrix(sc, tp->ucastrate);
278235679Sadrian	else
279235679Sadrian		rix = ath_tx_findrix(sc, tp->mcastrate);
280235679Sadrian
281250865Sadrian	/*
282250865Sadrian	 * If the chip supports enforcing TxOP on transmission,
283250865Sadrian	 * we can just delete the guard window.  It isn't at all required.
284250865Sadrian	 */
285250865Sadrian	if (sc->sc_hasenforcetxop) {
286250865Sadrian		sc->sc_tdmaguard = 0;
287250865Sadrian	} else {
288250865Sadrian		/* XXX short preamble assumed */
289250865Sadrian		/* XXX non-11n rate assumed */
290250865Sadrian		sc->sc_tdmaguard = ath_hal_computetxtime(ah, sc->sc_currates,
291250865Sadrian			ifp->if_mtu + IEEE80211_MAXOVERHEAD, rix, AH_TRUE);
292250865Sadrian	}
293250865Sadrian
294235679Sadrian	ath_hal_intrset(ah, 0);
295235679Sadrian
296235679Sadrian	ath_beaconq_config(sc);			/* setup h/w beacon q */
297235679Sadrian	if (sc->sc_setcca)
298235679Sadrian		ath_hal_setcca(ah, AH_FALSE);	/* disable CCA */
299235679Sadrian	ath_tdma_bintvalsetup(sc, tdma);	/* calculate beacon interval */
300235679Sadrian	ath_tdma_settimers(sc, sc->sc_tdmabintval,
301235679Sadrian		sc->sc_tdmabintval | HAL_BEACON_RESET_TSF);
302235679Sadrian	sc->sc_syncbeacon = 0;
303235679Sadrian
304235679Sadrian	sc->sc_avgtsfdeltap = TDMA_DUMMY_MARKER;
305235679Sadrian	sc->sc_avgtsfdeltam = TDMA_DUMMY_MARKER;
306235679Sadrian
307235679Sadrian	ath_hal_intrset(ah, sc->sc_imask);
308235679Sadrian
309235679Sadrian	DPRINTF(sc, ATH_DEBUG_TDMA, "%s: slot %u len %uus cnt %u "
310235679Sadrian	    "bsched %u guard %uus bintval %u TU dba prep %u\n", __func__,
311235679Sadrian	    tdma->tdma_slot, tdma->tdma_slotlen, tdma->tdma_slotcnt,
312235679Sadrian	    tdma->tdma_bintval, sc->sc_tdmaguard, sc->sc_tdmabintval,
313235679Sadrian	    sc->sc_tdmadbaprep);
314243592Sadrian
315243592Sadrian#ifdef	ATH_DEBUG_ALQ
316243592Sadrian	if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG)) {
317243592Sadrian		struct if_ath_alq_tdma_timer_config t;
318243592Sadrian
319243592Sadrian		t.tdma_slot = htobe32(tdma->tdma_slot);
320243592Sadrian		t.tdma_slotlen = htobe32(tdma->tdma_slotlen);
321243592Sadrian		t.tdma_slotcnt = htobe32(tdma->tdma_slotcnt);
322243592Sadrian		t.tdma_bintval = htobe32(tdma->tdma_bintval);
323243592Sadrian		t.tdma_guard = htobe32(sc->sc_tdmaguard);
324243592Sadrian		t.tdma_scbintval = htobe32(sc->sc_tdmabintval);
325243592Sadrian		t.tdma_dbaprep = htobe32(sc->sc_tdmadbaprep);
326243592Sadrian
327243592Sadrian		if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG,
328243592Sadrian		    sizeof(t), (char *) &t);
329243592Sadrian	}
330243592Sadrian#endif	/* ATH_DEBUG_ALQ */
331235679Sadrian}
332235679Sadrian
333235679Sadrian/*
334235679Sadrian * Update tdma operation.  Called from the 802.11 layer
335235679Sadrian * when a beacon is received from the TDMA station operating
336235679Sadrian * in the slot immediately preceding us in the bss.  Use
337235679Sadrian * the rx timestamp for the beacon frame to update our
338235679Sadrian * beacon timers so we follow their schedule.  Note that
339235679Sadrian * by using the rx timestamp we implicitly include the
340235679Sadrian * propagation delay in our schedule.
341243614Sadrian *
342243614Sadrian * XXX TODO: since the changes for the AR5416 and later chips
343243614Sadrian * involved changing the TSF/TU calculations, we need to make
344243614Sadrian * sure that various calculations wrap consistently.
345243614Sadrian *
346243614Sadrian * A lot of the problems stemmed from the calculations wrapping
347243614Sadrian * at 65,535 TU.  Since a lot of the math is still being done in
348243614Sadrian * TU, please audit it to ensure that when the TU values programmed
349243614Sadrian * into the timers wrap at (2^31)-1 TSF, all the various terms
350243614Sadrian * wrap consistently.
351235679Sadrian */
352235679Sadrianvoid
353235679Sadrianath_tdma_update(struct ieee80211_node *ni,
354235679Sadrian	const struct ieee80211_tdma_param *tdma, int changed)
355235679Sadrian{
356235679Sadrian#define	TSF_TO_TU(_h,_l) \
357235679Sadrian	((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10))
358235679Sadrian#define	TU_TO_TSF(_tu)	(((u_int64_t)(_tu)) << 10)
359235679Sadrian	struct ieee80211vap *vap = ni->ni_vap;
360235679Sadrian	struct ieee80211com *ic = ni->ni_ic;
361235679Sadrian	struct ath_softc *sc = ic->ic_ifp->if_softc;
362235679Sadrian	struct ath_hal *ah = sc->sc_ah;
363235679Sadrian	const HAL_RATE_TABLE *rt = sc->sc_currates;
364243590Sadrian	u_int64_t tsf, rstamp, nextslot, nexttbtt, nexttbtt_full;
365235679Sadrian	u_int32_t txtime, nextslottu;
366235679Sadrian	int32_t tudelta, tsfdelta;
367235679Sadrian	const struct ath_rx_status *rs;
368235679Sadrian	int rix;
369235679Sadrian
370235679Sadrian	sc->sc_stats.ast_tdma_update++;
371235679Sadrian
372235679Sadrian	/*
373235679Sadrian	 * Check for and adopt configuration changes.
374235679Sadrian	 */
375235679Sadrian	if (changed != 0) {
376235679Sadrian		const struct ieee80211_tdma_state *ts = vap->iv_tdma;
377235679Sadrian
378235679Sadrian		ath_tdma_bintvalsetup(sc, ts);
379235679Sadrian		if (changed & TDMA_UPDATE_SLOTLEN)
380235679Sadrian			ath_wme_update(ic);
381235679Sadrian
382235679Sadrian		DPRINTF(sc, ATH_DEBUG_TDMA,
383235679Sadrian		    "%s: adopt slot %u slotcnt %u slotlen %u us "
384235679Sadrian		    "bintval %u TU\n", __func__,
385235679Sadrian		    ts->tdma_slot, ts->tdma_slotcnt, ts->tdma_slotlen,
386235679Sadrian		    sc->sc_tdmabintval);
387235679Sadrian
388235679Sadrian		/* XXX right? */
389235679Sadrian		ath_hal_intrset(ah, sc->sc_imask);
390235679Sadrian		/* NB: beacon timers programmed below */
391235679Sadrian	}
392235679Sadrian
393235679Sadrian	/* extend rx timestamp to 64 bits */
394235679Sadrian	rs = sc->sc_lastrs;
395235679Sadrian	tsf = ath_hal_gettsf64(ah);
396235679Sadrian	rstamp = ath_extend_tsf(sc, rs->rs_tstamp, tsf);
397235679Sadrian	/*
398235679Sadrian	 * The rx timestamp is set by the hardware on completing
399235679Sadrian	 * reception (at the point where the rx descriptor is DMA'd
400235679Sadrian	 * to the host).  To find the start of our next slot we
401235679Sadrian	 * must adjust this time by the time required to send
402235679Sadrian	 * the packet just received.
403235679Sadrian	 */
404235679Sadrian	rix = rt->rateCodeToIndex[rs->rs_rate];
405250865Sadrian
406250865Sadrian	/*
407250865Sadrian	 * To calculate the packet duration for legacy rates, we
408250865Sadrian	 * only need the rix and preamble.
409250865Sadrian	 *
410250865Sadrian	 * For 11n non-aggregate frames, we also need the channel
411250865Sadrian	 * width and short/long guard interval.
412250865Sadrian	 *
413250865Sadrian	 * For 11n aggregate frames, the required hacks are a little
414250865Sadrian	 * more subtle.  You need to figure out the frame duration
415250865Sadrian	 * for each frame, including the delimiters.  However, when
416250865Sadrian	 * a frame isn't received successfully, we won't hear it
417250865Sadrian	 * (unless you enable reception of CRC errored frames), so
418250865Sadrian	 * your duration calculation is going to be off.
419250865Sadrian	 *
420250865Sadrian	 * However, we can assume that the beacon frames won't be
421250865Sadrian	 * transmitted as aggregate frames, so we should be okay.
422250865Sadrian	 * Just add a check to ensure that we aren't handed something
423250865Sadrian	 * bad.
424250865Sadrian	 *
425250865Sadrian	 * For ath_hal_pkt_txtime() - for 11n rates, shortPreamble is
426250865Sadrian	 * actually short guard interval. For legacy rates,
427250865Sadrian	 * it's short preamble.
428250865Sadrian	 */
429250865Sadrian	txtime = ath_hal_pkt_txtime(ah, rt, rs->rs_datalen,
430250865Sadrian	    rix,
431250865Sadrian	    !! (rs->rs_flags & HAL_RX_2040),
432250865Sadrian	    (rix & 0x80) ?
433250865Sadrian	      (! (rs->rs_flags & HAL_RX_GI)) : rt->info[rix].shortPreamble);
434235679Sadrian	/* NB: << 9 is to cvt to TU and /2 */
435235679Sadrian	nextslot = (rstamp - txtime) + (sc->sc_tdmabintval << 9);
436243592Sadrian
437243590Sadrian	/*
438243590Sadrian	 * For 802.11n chips: nextslottu needs to be the full TSF space,
439243590Sadrian	 * not just 0..65535 TU.
440243590Sadrian	 */
441243590Sadrian	nextslottu = TSF_TO_TU(nextslot>>32, nextslot);
442235679Sadrian	/*
443235679Sadrian	 * Retrieve the hardware NextTBTT in usecs
444235679Sadrian	 * and calculate the difference between what the
445235679Sadrian	 * other station thinks and what we have programmed.  This
446235679Sadrian	 * lets us figure how to adjust our timers to match.  The
447235679Sadrian	 * adjustments are done by pulling the TSF forward and possibly
448235679Sadrian	 * rewriting the beacon timers.
449235679Sadrian	 */
450243426Sadrian	/*
451243426Sadrian	 * The logic here assumes the nexttbtt counter is in TSF
452243426Sadrian	 * but the prr-11n NICs are in TU.  The HAL shifts them
453243426Sadrian	 * to TSF but there's two important differences:
454243426Sadrian	 *
455243426Sadrian	 * + The TU->TSF values have 0's for the low 9 bits, and
456243426Sadrian	 * + The counter wraps at TU_TO_TSF(HAL_BEACON_PERIOD + 1) for
457243426Sadrian	 *   the pre-11n NICs, but not for the 11n NICs.
458243426Sadrian	 *
459243426Sadrian	 * So for now, just make sure the nexttbtt value we get
460243426Sadrian	 * matches the second issue or once nexttbtt exceeds this
461243426Sadrian	 * value, tsfdelta ends up becoming very negative and all
462243426Sadrian	 * of the adjustments get very messed up.
463243426Sadrian	 */
464243592Sadrian
465243590Sadrian	/*
466243590Sadrian	 * We need to track the full nexttbtt rather than having it
467243590Sadrian	 * truncated at HAL_BEACON_PERIOD, as programming the
468243590Sadrian	 * nexttbtt (and related) registers for the 11n chips is
469243590Sadrian	 * actually going to take the full 32 bit space, rather than
470243590Sadrian	 * just 0..65535 TU.
471243590Sadrian	 */
472243590Sadrian	nexttbtt_full = ath_hal_getnexttbtt(ah);
473243590Sadrian	nexttbtt = nexttbtt_full % (TU_TO_TSF(HAL_BEACON_PERIOD + 1));
474235679Sadrian	tsfdelta = (int32_t)((nextslot % TU_TO_TSF(HAL_BEACON_PERIOD + 1)) - nexttbtt);
475235679Sadrian
476235679Sadrian	DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
477243642Sadrian	    "rs->rstamp %llu rstamp %llu tsf %llu txtime %d, nextslot %llu, "
478243642Sadrian	    "nextslottu %d, nextslottume %d\n",
479243642Sadrian	    (unsigned long long) rs->rs_tstamp, rstamp, tsf, txtime,
480243642Sadrian	    nextslot, nextslottu, TSF_TO_TU(nextslot >> 32, nextslot));
481243642Sadrian	DPRINTF(sc, ATH_DEBUG_TDMA,
482243642Sadrian	    "  beacon tstamp: %llu (0x%016llx)\n",
483243642Sadrian	    le64toh(ni->ni_tstamp.tsf),
484243642Sadrian	    le64toh(ni->ni_tstamp.tsf));
485243642Sadrian
486243642Sadrian	DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
487243592Sadrian	    "nexttbtt %llu (0x%08llx) tsfdelta %d avg +%d/-%d\n",
488243592Sadrian	    nexttbtt,
489243592Sadrian	    (long long) nexttbtt,
490243592Sadrian	    tsfdelta,
491235679Sadrian	    TDMA_AVG(sc->sc_avgtsfdeltap), TDMA_AVG(sc->sc_avgtsfdeltam));
492235679Sadrian
493235679Sadrian	if (tsfdelta < 0) {
494235679Sadrian		TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
495235679Sadrian		TDMA_SAMPLE(sc->sc_avgtsfdeltam, -tsfdelta);
496235679Sadrian		tsfdelta = -tsfdelta % 1024;
497235679Sadrian		nextslottu++;
498235679Sadrian	} else if (tsfdelta > 0) {
499235679Sadrian		TDMA_SAMPLE(sc->sc_avgtsfdeltap, tsfdelta);
500235679Sadrian		TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
501235679Sadrian		tsfdelta = 1024 - (tsfdelta % 1024);
502235679Sadrian		nextslottu++;
503235679Sadrian	} else {
504235679Sadrian		TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
505235679Sadrian		TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
506235679Sadrian	}
507243590Sadrian	tudelta = nextslottu - TSF_TO_TU(nexttbtt_full >> 32, nexttbtt_full);
508235679Sadrian
509243642Sadrian#ifdef	ATH_DEBUG_ALQ
510243642Sadrian	if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE)) {
511243642Sadrian		struct if_ath_alq_tdma_beacon_state t;
512243642Sadrian		t.rx_tsf = htobe64(rstamp);
513243642Sadrian		t.beacon_tsf = htobe64(le64toh(ni->ni_tstamp.tsf));
514243642Sadrian		t.tsf64 = htobe64(tsf);
515243642Sadrian		t.nextslot_tsf = htobe64(nextslot);
516243642Sadrian		t.nextslot_tu = htobe32(nextslottu);
517243642Sadrian		t.txtime = htobe32(txtime);
518243642Sadrian		if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE,
519243642Sadrian		    sizeof(t), (char *) &t);
520243642Sadrian	}
521243642Sadrian
522243642Sadrian	if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC)) {
523243642Sadrian		struct if_ath_alq_tdma_slot_calc t;
524243642Sadrian
525243642Sadrian		t.nexttbtt = htobe64(nexttbtt_full);
526243642Sadrian		t.next_slot = htobe64(nextslot);
527243642Sadrian		t.tsfdelta = htobe32(tsfdelta);
528243642Sadrian		t.avg_plus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltap));
529243642Sadrian		t.avg_minus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltam));
530243642Sadrian
531243642Sadrian		if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC,
532243642Sadrian		    sizeof(t), (char *) &t);
533243642Sadrian	}
534243642Sadrian#endif
535243642Sadrian
536235679Sadrian	/*
537235679Sadrian	 * Copy sender's timetstamp into tdma ie so they can
538235679Sadrian	 * calculate roundtrip time.  We submit a beacon frame
539235679Sadrian	 * below after any timer adjustment.  The frame goes out
540235679Sadrian	 * at the next TBTT so the sender can calculate the
541235679Sadrian	 * roundtrip by inspecting the tdma ie in our beacon frame.
542235679Sadrian	 *
543235679Sadrian	 * NB: This tstamp is subtlely preserved when
544235679Sadrian	 *     IEEE80211_BEACON_TDMA is marked (e.g. when the
545235679Sadrian	 *     slot position changes) because ieee80211_add_tdma
546235679Sadrian	 *     skips over the data.
547235679Sadrian	 */
548235679Sadrian	memcpy(ATH_VAP(vap)->av_boff.bo_tdma +
549235679Sadrian		__offsetof(struct ieee80211_tdma_param, tdma_tstamp),
550235679Sadrian		&ni->ni_tstamp.data, 8);
551235679Sadrian#if 0
552235679Sadrian	DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
553235679Sadrian	    "tsf %llu nextslot %llu (%d, %d) nextslottu %u nexttbtt %llu (%d)\n",
554235679Sadrian	    (unsigned long long) tsf, (unsigned long long) nextslot,
555235679Sadrian	    (int)(nextslot - tsf), tsfdelta, nextslottu, nexttbtt, tudelta);
556235679Sadrian#endif
557235679Sadrian	/*
558235679Sadrian	 * Adjust the beacon timers only when pulling them forward
559235679Sadrian	 * or when going back by less than the beacon interval.
560235679Sadrian	 * Negative jumps larger than the beacon interval seem to
561235679Sadrian	 * cause the timers to stop and generally cause instability.
562235679Sadrian	 * This basically filters out jumps due to missed beacons.
563235679Sadrian	 */
564235679Sadrian	if (tudelta != 0 && (tudelta > 0 || -tudelta < sc->sc_tdmabintval)) {
565243592Sadrian		DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
566243592Sadrian		    "%s: calling ath_tdma_settimers; nextslottu=%d, bintval=%d\n",
567243592Sadrian		    __func__,
568243592Sadrian		    nextslottu,
569243592Sadrian		    sc->sc_tdmabintval);
570235679Sadrian		ath_tdma_settimers(sc, nextslottu, sc->sc_tdmabintval);
571235679Sadrian		sc->sc_stats.ast_tdma_timers++;
572235679Sadrian	}
573235679Sadrian	if (tsfdelta > 0) {
574243427Sadrian		uint64_t tsf;
575243427Sadrian
576243427Sadrian		/* XXX should just teach ath_hal_adjusttsf() to do this */
577243427Sadrian		tsf = ath_hal_gettsf64(ah);
578243427Sadrian		ath_hal_settsf64(ah, tsf + tsfdelta);
579243592Sadrian		DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
580243592Sadrian		    "%s: calling ath_hal_adjusttsf: TSF=%llu, tsfdelta=%d\n",
581243592Sadrian		    __func__,
582243606Sadrian		    tsf,
583243592Sadrian		    tsfdelta);
584243592Sadrian
585243592Sadrian#ifdef	ATH_DEBUG_ALQ
586243592Sadrian		if (if_ath_alq_checkdebug(&sc->sc_alq,
587243592Sadrian		    ATH_ALQ_TDMA_TSF_ADJUST)) {
588243592Sadrian			struct if_ath_alq_tdma_tsf_adjust t;
589243592Sadrian
590243592Sadrian			t.tsfdelta = htobe32(tsfdelta);
591243614Sadrian			t.tsf64_old = htobe64(tsf);
592243614Sadrian			t.tsf64_new = htobe64(tsf + tsfdelta);
593243592Sadrian			if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TSF_ADJUST,
594243592Sadrian			    sizeof(t), (char *) &t);
595243592Sadrian		}
596243592Sadrian#endif	/* ATH_DEBUG_ALQ */
597235679Sadrian		sc->sc_stats.ast_tdma_tsf++;
598235679Sadrian	}
599235679Sadrian	ath_tdma_beacon_send(sc, vap);		/* prepare response */
600235679Sadrian#undef TU_TO_TSF
601235679Sadrian#undef TSF_TO_TU
602235679Sadrian}
603235679Sadrian
604235679Sadrian/*
605235679Sadrian * Transmit a beacon frame at SWBA.  Dynamic updates
606235679Sadrian * to the frame contents are done as needed.
607235679Sadrian */
608235679Sadrianvoid
609235679Sadrianath_tdma_beacon_send(struct ath_softc *sc, struct ieee80211vap *vap)
610235679Sadrian{
611235679Sadrian	struct ath_hal *ah = sc->sc_ah;
612235679Sadrian	struct ath_buf *bf;
613235679Sadrian	int otherant;
614235679Sadrian
615235679Sadrian	/*
616235679Sadrian	 * Check if the previous beacon has gone out.  If
617235679Sadrian	 * not don't try to post another, skip this period
618235679Sadrian	 * and wait for the next.  Missed beacons indicate
619235679Sadrian	 * a problem and should not occur.  If we miss too
620235679Sadrian	 * many consecutive beacons reset the device.
621235679Sadrian	 */
622235679Sadrian	if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) {
623235679Sadrian		sc->sc_bmisscount++;
624235679Sadrian		DPRINTF(sc, ATH_DEBUG_BEACON,
625235679Sadrian			"%s: missed %u consecutive beacons\n",
626235679Sadrian			__func__, sc->sc_bmisscount);
627235679Sadrian		if (sc->sc_bmisscount >= ath_bstuck_threshold)
628235679Sadrian			taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask);
629235679Sadrian		return;
630235679Sadrian	}
631235679Sadrian	if (sc->sc_bmisscount != 0) {
632235679Sadrian		DPRINTF(sc, ATH_DEBUG_BEACON,
633235679Sadrian			"%s: resume beacon xmit after %u misses\n",
634235679Sadrian			__func__, sc->sc_bmisscount);
635235679Sadrian		sc->sc_bmisscount = 0;
636235679Sadrian	}
637235679Sadrian
638235679Sadrian	/*
639235679Sadrian	 * Check recent per-antenna transmit statistics and flip
640235679Sadrian	 * the default antenna if noticeably more frames went out
641235679Sadrian	 * on the non-default antenna.
642235679Sadrian	 * XXX assumes 2 anntenae
643235679Sadrian	 */
644235679Sadrian	if (!sc->sc_diversity) {
645235679Sadrian		otherant = sc->sc_defant & 1 ? 2 : 1;
646235679Sadrian		if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2)
647235679Sadrian			ath_setdefantenna(sc, otherant);
648235679Sadrian		sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0;
649235679Sadrian	}
650235679Sadrian
651235679Sadrian	bf = ath_beacon_generate(sc, vap);
652248671Sadrian	/* XXX We don't do cabq traffic, but just for completeness .. */
653248671Sadrian	ATH_TXQ_LOCK(sc->sc_cabq);
654248671Sadrian	ath_beacon_cabq_start(sc);
655248671Sadrian	ATH_TXQ_UNLOCK(sc->sc_cabq);
656248671Sadrian
657235679Sadrian	if (bf != NULL) {
658235679Sadrian		/*
659235679Sadrian		 * Stop any current dma and put the new frame on the queue.
660235679Sadrian		 * This should never fail since we check above that no frames
661235679Sadrian		 * are still pending on the queue.
662235679Sadrian		 */
663248671Sadrian		if ((! sc->sc_isedma) &&
664248671Sadrian		    (! ath_hal_stoptxdma(ah, sc->sc_bhalq))) {
665235679Sadrian			DPRINTF(sc, ATH_DEBUG_ANY,
666235679Sadrian				"%s: beacon queue %u did not stop?\n",
667235679Sadrian				__func__, sc->sc_bhalq);
668235679Sadrian			/* NB: the HAL still stops DMA, so proceed */
669235679Sadrian		}
670235679Sadrian		ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
671235679Sadrian		ath_hal_txstart(ah, sc->sc_bhalq);
672235679Sadrian
673235679Sadrian		sc->sc_stats.ast_be_xmit++;		/* XXX per-vap? */
674235679Sadrian
675235679Sadrian		/*
676235679Sadrian		 * Record local TSF for our last send for use
677235679Sadrian		 * in arbitrating slot collisions.
678235679Sadrian		 */
679235679Sadrian		/* XXX should take a locked ref to iv_bss */
680235679Sadrian		vap->iv_bss->ni_tstamp.tsf = ath_hal_gettsf64(ah);
681235679Sadrian	}
682235679Sadrian}
683235679Sadrian#endif /* IEEE80211_SUPPORT_TDMA */
684