1/*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30#include <sys/cdefs.h> 31__FBSDID("$FreeBSD$"); 32 33/* 34 * Driver for the Atheros Wireless LAN controller. 35 * 36 * This software is derived from work of Atsushi Onoe; his contribution 37 * is greatly appreciated. 38 */ 39 40#include "opt_inet.h" 41#include "opt_ath.h" 42/* 43 * This is needed for register operations which are performed 44 * by the driver - eg, calls to ath_hal_gettsf32(). 45 * 46 * It's also required for any AH_DEBUG checks in here, eg the 47 * module dependencies. 48 */ 49#include "opt_ah.h" 50#include "opt_wlan.h" 51 52#include <sys/param.h> 53#include <sys/systm.h> 54#include <sys/sysctl.h> 55#include <sys/mbuf.h> 56#include <sys/malloc.h> 57#include <sys/lock.h> 58#include <sys/mutex.h> 59#include <sys/kernel.h> 60#include <sys/socket.h> 61#include <sys/sockio.h> 62#include <sys/errno.h> 63#include <sys/callout.h> 64#include <sys/bus.h> 65#include <sys/endian.h> 66#include <sys/kthread.h> 67#include <sys/taskqueue.h> 68#include <sys/priv.h> 69#include <sys/module.h> 70#include <sys/ktr.h> 71#include <sys/smp.h> /* for mp_ncpus */ 72 73#include <machine/bus.h> 74 75#include <net/if.h> 76#include <net/if_dl.h> 77#include <net/if_media.h> 78#include <net/if_types.h> 79#include <net/if_arp.h> 80#include <net/ethernet.h> 81#include <net/if_llc.h> 82 83#include <net80211/ieee80211_var.h> 84#include <net80211/ieee80211_regdomain.h> 85#ifdef IEEE80211_SUPPORT_SUPERG 86#include <net80211/ieee80211_superg.h> 87#endif 88#ifdef IEEE80211_SUPPORT_TDMA 89#include <net80211/ieee80211_tdma.h> 90#endif 91 92#include <net/bpf.h> 93 94#ifdef INET 95#include <netinet/in.h> 96#include <netinet/if_ether.h> 97#endif 98 99#include <dev/ath/if_athvar.h> 100#include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */ 101#include <dev/ath/ath_hal/ah_diagcodes.h> 102 103#include <dev/ath/if_ath_debug.h> 104#include <dev/ath/if_ath_misc.h> 105#include <dev/ath/if_ath_tsf.h> 106#include <dev/ath/if_ath_tx.h> 107#include <dev/ath/if_ath_sysctl.h> 108#include <dev/ath/if_ath_led.h> 109#include <dev/ath/if_ath_keycache.h> 110#include <dev/ath/if_ath_rx.h> 111#include <dev/ath/if_ath_beacon.h> 112#include <dev/ath/if_athdfs.h> 113 114#ifdef ATH_TX99_DIAG 115#include <dev/ath/ath_tx99/ath_tx99.h> 116#endif 117 118#ifdef ATH_DEBUG_ALQ 119#include <dev/ath/if_ath_alq.h> 120#endif 121 122#ifdef IEEE80211_SUPPORT_TDMA 123#include <dev/ath/if_ath_tdma.h> 124 125static void ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, 126 u_int32_t bintval); 127static void ath_tdma_bintvalsetup(struct ath_softc *sc, 128 const struct ieee80211_tdma_state *tdma); 129#endif /* IEEE80211_SUPPORT_TDMA */ 130 131#ifdef IEEE80211_SUPPORT_TDMA 132static void 133ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, u_int32_t bintval) 134{ 135 struct ath_hal *ah = sc->sc_ah; 136 HAL_BEACON_TIMERS bt; 137 138 bt.bt_intval = bintval | HAL_BEACON_ENA; 139 bt.bt_nexttbtt = nexttbtt; 140 bt.bt_nextdba = (nexttbtt<<3) - sc->sc_tdmadbaprep; 141 bt.bt_nextswba = (nexttbtt<<3) - sc->sc_tdmaswbaprep; 142 bt.bt_nextatim = nexttbtt+1; 143 /* Enables TBTT, DBA, SWBA timers by default */ 144 bt.bt_flags = 0; 145#if 0 146 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 147 "%s: intval=%d (0x%08x) nexttbtt=%u (0x%08x), nextdba=%u (0x%08x), nextswba=%u (0x%08x),nextatim=%u (0x%08x)\n", 148 __func__, 149 bt.bt_intval, 150 bt.bt_intval, 151 bt.bt_nexttbtt, 152 bt.bt_nexttbtt, 153 bt.bt_nextdba, 154 bt.bt_nextdba, 155 bt.bt_nextswba, 156 bt.bt_nextswba, 157 bt.bt_nextatim, 158 bt.bt_nextatim); 159#endif 160 161#ifdef ATH_DEBUG_ALQ 162 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET)) { 163 struct if_ath_alq_tdma_timer_set t; 164 t.bt_intval = htobe32(bt.bt_intval); 165 t.bt_nexttbtt = htobe32(bt.bt_nexttbtt); 166 t.bt_nextdba = htobe32(bt.bt_nextdba); 167 t.bt_nextswba = htobe32(bt.bt_nextswba); 168 t.bt_nextatim = htobe32(bt.bt_nextatim); 169 t.bt_flags = htobe32(bt.bt_flags); 170 t.sc_tdmadbaprep = htobe32(sc->sc_tdmadbaprep); 171 t.sc_tdmaswbaprep = htobe32(sc->sc_tdmaswbaprep); 172 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET, 173 sizeof(t), (char *) &t); 174 } 175#endif 176 177 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 178 "%s: nexttbtt=%u (0x%08x), nexttbtt tsf=%lld (0x%08llx)\n", 179 __func__, 180 bt.bt_nexttbtt, 181 bt.bt_nexttbtt, 182 (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10), 183 (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10)); 184 ath_hal_beaconsettimers(ah, &bt); 185} 186 187/* 188 * Calculate the beacon interval. This is periodic in the 189 * superframe for the bss. We assume each station is configured 190 * identically wrt transmit rate so the guard time we calculate 191 * above will be the same on all stations. Note we need to 192 * factor in the xmit time because the hardware will schedule 193 * a frame for transmit if the start of the frame is within 194 * the burst time. When we get hardware that properly kills 195 * frames in the PCU we can reduce/eliminate the guard time. 196 * 197 * Roundup to 1024 is so we have 1 TU buffer in the guard time 198 * to deal with the granularity of the nexttbtt timer. 11n MAC's 199 * with 1us timer granularity should allow us to reduce/eliminate 200 * this. 201 */ 202static void 203ath_tdma_bintvalsetup(struct ath_softc *sc, 204 const struct ieee80211_tdma_state *tdma) 205{ 206 /* copy from vap state (XXX check all vaps have same value?) */ 207 sc->sc_tdmaslotlen = tdma->tdma_slotlen; 208 209 sc->sc_tdmabintval = roundup((sc->sc_tdmaslotlen+sc->sc_tdmaguard) * 210 tdma->tdma_slotcnt, 1024); 211 sc->sc_tdmabintval >>= 10; /* TSF -> TU */ 212 if (sc->sc_tdmabintval & 1) 213 sc->sc_tdmabintval++; 214 215 if (tdma->tdma_slot == 0) { 216 /* 217 * Only slot 0 beacons; other slots respond. 218 */ 219 sc->sc_imask |= HAL_INT_SWBA; 220 sc->sc_tdmaswba = 0; /* beacon immediately */ 221 } else { 222 /* XXX all vaps must be slot 0 or slot !0 */ 223 sc->sc_imask &= ~HAL_INT_SWBA; 224 } 225} 226 227/* 228 * Max 802.11 overhead. This assumes no 4-address frames and 229 * the encapsulation done by ieee80211_encap (llc). We also 230 * include potential crypto overhead. 231 */ 232#define IEEE80211_MAXOVERHEAD \ 233 (sizeof(struct ieee80211_qosframe) \ 234 + sizeof(struct llc) \ 235 + IEEE80211_ADDR_LEN \ 236 + IEEE80211_WEP_IVLEN \ 237 + IEEE80211_WEP_KIDLEN \ 238 + IEEE80211_WEP_CRCLEN \ 239 + IEEE80211_WEP_MICLEN \ 240 + IEEE80211_CRC_LEN) 241 242/* 243 * Setup initially for tdma operation. Start the beacon 244 * timers and enable SWBA if we are slot 0. Otherwise 245 * we wait for slot 0 to arrive so we can sync up before 246 * starting to transmit. 247 */ 248void 249ath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap) 250{ 251 struct ath_hal *ah = sc->sc_ah; 252 struct ifnet *ifp = sc->sc_ifp; 253 struct ieee80211com *ic = ifp->if_l2com; 254 const struct ieee80211_txparam *tp; 255 const struct ieee80211_tdma_state *tdma = NULL; 256 int rix; 257 258 if (vap == NULL) { 259 vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */ 260 if (vap == NULL) { 261 if_printf(ifp, "%s: no vaps?\n", __func__); 262 return; 263 } 264 } 265 /* XXX should take a locked ref to iv_bss */ 266 tp = vap->iv_bss->ni_txparms; 267 /* 268 * Calculate the guard time for each slot. This is the 269 * time to send a maximal-size frame according to the 270 * fixed/lowest transmit rate. Note that the interface 271 * mtu does not include the 802.11 overhead so we must 272 * tack that on (ath_hal_computetxtime includes the 273 * preamble and plcp in it's calculation). 274 */ 275 tdma = vap->iv_tdma; 276 if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 277 rix = ath_tx_findrix(sc, tp->ucastrate); 278 else 279 rix = ath_tx_findrix(sc, tp->mcastrate); 280 281 /* 282 * If the chip supports enforcing TxOP on transmission, 283 * we can just delete the guard window. It isn't at all required. 284 */ 285 if (sc->sc_hasenforcetxop) { 286 sc->sc_tdmaguard = 0; 287 } else { 288 /* XXX short preamble assumed */ 289 /* XXX non-11n rate assumed */ 290 sc->sc_tdmaguard = ath_hal_computetxtime(ah, sc->sc_currates, 291 ifp->if_mtu + IEEE80211_MAXOVERHEAD, rix, AH_TRUE); 292 } 293 294 ath_hal_intrset(ah, 0); 295 296 ath_beaconq_config(sc); /* setup h/w beacon q */ 297 if (sc->sc_setcca) 298 ath_hal_setcca(ah, AH_FALSE); /* disable CCA */ 299 ath_tdma_bintvalsetup(sc, tdma); /* calculate beacon interval */ 300 ath_tdma_settimers(sc, sc->sc_tdmabintval, 301 sc->sc_tdmabintval | HAL_BEACON_RESET_TSF); 302 sc->sc_syncbeacon = 0; 303 304 sc->sc_avgtsfdeltap = TDMA_DUMMY_MARKER; 305 sc->sc_avgtsfdeltam = TDMA_DUMMY_MARKER; 306 307 ath_hal_intrset(ah, sc->sc_imask); 308 309 DPRINTF(sc, ATH_DEBUG_TDMA, "%s: slot %u len %uus cnt %u " 310 "bsched %u guard %uus bintval %u TU dba prep %u\n", __func__, 311 tdma->tdma_slot, tdma->tdma_slotlen, tdma->tdma_slotcnt, 312 tdma->tdma_bintval, sc->sc_tdmaguard, sc->sc_tdmabintval, 313 sc->sc_tdmadbaprep); 314 315#ifdef ATH_DEBUG_ALQ 316 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG)) { 317 struct if_ath_alq_tdma_timer_config t; 318 319 t.tdma_slot = htobe32(tdma->tdma_slot); 320 t.tdma_slotlen = htobe32(tdma->tdma_slotlen); 321 t.tdma_slotcnt = htobe32(tdma->tdma_slotcnt); 322 t.tdma_bintval = htobe32(tdma->tdma_bintval); 323 t.tdma_guard = htobe32(sc->sc_tdmaguard); 324 t.tdma_scbintval = htobe32(sc->sc_tdmabintval); 325 t.tdma_dbaprep = htobe32(sc->sc_tdmadbaprep); 326 327 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG, 328 sizeof(t), (char *) &t); 329 } 330#endif /* ATH_DEBUG_ALQ */ 331} 332 333/* 334 * Update tdma operation. Called from the 802.11 layer 335 * when a beacon is received from the TDMA station operating 336 * in the slot immediately preceding us in the bss. Use 337 * the rx timestamp for the beacon frame to update our 338 * beacon timers so we follow their schedule. Note that 339 * by using the rx timestamp we implicitly include the 340 * propagation delay in our schedule. 341 * 342 * XXX TODO: since the changes for the AR5416 and later chips 343 * involved changing the TSF/TU calculations, we need to make 344 * sure that various calculations wrap consistently. 345 * 346 * A lot of the problems stemmed from the calculations wrapping 347 * at 65,535 TU. Since a lot of the math is still being done in 348 * TU, please audit it to ensure that when the TU values programmed 349 * into the timers wrap at (2^31)-1 TSF, all the various terms 350 * wrap consistently. 351 */ 352void 353ath_tdma_update(struct ieee80211_node *ni, 354 const struct ieee80211_tdma_param *tdma, int changed) 355{ 356#define TSF_TO_TU(_h,_l) \ 357 ((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10)) 358#define TU_TO_TSF(_tu) (((u_int64_t)(_tu)) << 10) 359 struct ieee80211vap *vap = ni->ni_vap; 360 struct ieee80211com *ic = ni->ni_ic; 361 struct ath_softc *sc = ic->ic_ifp->if_softc; 362 struct ath_hal *ah = sc->sc_ah; 363 const HAL_RATE_TABLE *rt = sc->sc_currates; 364 u_int64_t tsf, rstamp, nextslot, nexttbtt, nexttbtt_full; 365 u_int32_t txtime, nextslottu; 366 int32_t tudelta, tsfdelta; 367 const struct ath_rx_status *rs; 368 int rix; 369 370 sc->sc_stats.ast_tdma_update++; 371 372 /* 373 * Check for and adopt configuration changes. 374 */ 375 if (changed != 0) { 376 const struct ieee80211_tdma_state *ts = vap->iv_tdma; 377 378 ath_tdma_bintvalsetup(sc, ts); 379 if (changed & TDMA_UPDATE_SLOTLEN) 380 ath_wme_update(ic); 381 382 DPRINTF(sc, ATH_DEBUG_TDMA, 383 "%s: adopt slot %u slotcnt %u slotlen %u us " 384 "bintval %u TU\n", __func__, 385 ts->tdma_slot, ts->tdma_slotcnt, ts->tdma_slotlen, 386 sc->sc_tdmabintval); 387 388 /* XXX right? */ 389 ath_hal_intrset(ah, sc->sc_imask); 390 /* NB: beacon timers programmed below */ 391 } 392 393 /* extend rx timestamp to 64 bits */ 394 rs = sc->sc_lastrs; 395 tsf = ath_hal_gettsf64(ah); 396 rstamp = ath_extend_tsf(sc, rs->rs_tstamp, tsf); 397 /* 398 * The rx timestamp is set by the hardware on completing 399 * reception (at the point where the rx descriptor is DMA'd 400 * to the host). To find the start of our next slot we 401 * must adjust this time by the time required to send 402 * the packet just received. 403 */ 404 rix = rt->rateCodeToIndex[rs->rs_rate]; 405 406 /* 407 * To calculate the packet duration for legacy rates, we 408 * only need the rix and preamble. 409 * 410 * For 11n non-aggregate frames, we also need the channel 411 * width and short/long guard interval. 412 * 413 * For 11n aggregate frames, the required hacks are a little 414 * more subtle. You need to figure out the frame duration 415 * for each frame, including the delimiters. However, when 416 * a frame isn't received successfully, we won't hear it 417 * (unless you enable reception of CRC errored frames), so 418 * your duration calculation is going to be off. 419 * 420 * However, we can assume that the beacon frames won't be 421 * transmitted as aggregate frames, so we should be okay. 422 * Just add a check to ensure that we aren't handed something 423 * bad. 424 * 425 * For ath_hal_pkt_txtime() - for 11n rates, shortPreamble is 426 * actually short guard interval. For legacy rates, 427 * it's short preamble. 428 */ 429 txtime = ath_hal_pkt_txtime(ah, rt, rs->rs_datalen, 430 rix, 431 !! (rs->rs_flags & HAL_RX_2040), 432 (rix & 0x80) ? 433 (! (rs->rs_flags & HAL_RX_GI)) : rt->info[rix].shortPreamble); 434 /* NB: << 9 is to cvt to TU and /2 */ 435 nextslot = (rstamp - txtime) + (sc->sc_tdmabintval << 9); 436 437 /* 438 * For 802.11n chips: nextslottu needs to be the full TSF space, 439 * not just 0..65535 TU. 440 */ 441 nextslottu = TSF_TO_TU(nextslot>>32, nextslot); 442 /* 443 * Retrieve the hardware NextTBTT in usecs 444 * and calculate the difference between what the 445 * other station thinks and what we have programmed. This 446 * lets us figure how to adjust our timers to match. The 447 * adjustments are done by pulling the TSF forward and possibly 448 * rewriting the beacon timers. 449 */ 450 /* 451 * The logic here assumes the nexttbtt counter is in TSF 452 * but the prr-11n NICs are in TU. The HAL shifts them 453 * to TSF but there's two important differences: 454 * 455 * + The TU->TSF values have 0's for the low 9 bits, and 456 * + The counter wraps at TU_TO_TSF(HAL_BEACON_PERIOD + 1) for 457 * the pre-11n NICs, but not for the 11n NICs. 458 * 459 * So for now, just make sure the nexttbtt value we get 460 * matches the second issue or once nexttbtt exceeds this 461 * value, tsfdelta ends up becoming very negative and all 462 * of the adjustments get very messed up. 463 */ 464 465 /* 466 * We need to track the full nexttbtt rather than having it 467 * truncated at HAL_BEACON_PERIOD, as programming the 468 * nexttbtt (and related) registers for the 11n chips is 469 * actually going to take the full 32 bit space, rather than 470 * just 0..65535 TU. 471 */ 472 nexttbtt_full = ath_hal_getnexttbtt(ah); 473 nexttbtt = nexttbtt_full % (TU_TO_TSF(HAL_BEACON_PERIOD + 1)); 474 tsfdelta = (int32_t)((nextslot % TU_TO_TSF(HAL_BEACON_PERIOD + 1)) - nexttbtt); 475 476 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 477 "rs->rstamp %llu rstamp %llu tsf %llu txtime %d, nextslot %llu, " 478 "nextslottu %d, nextslottume %d\n", 479 (unsigned long long) rs->rs_tstamp, rstamp, tsf, txtime, 480 nextslot, nextslottu, TSF_TO_TU(nextslot >> 32, nextslot)); 481 DPRINTF(sc, ATH_DEBUG_TDMA, 482 " beacon tstamp: %llu (0x%016llx)\n", 483 le64toh(ni->ni_tstamp.tsf), 484 le64toh(ni->ni_tstamp.tsf)); 485 486 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 487 "nexttbtt %llu (0x%08llx) tsfdelta %d avg +%d/-%d\n", 488 nexttbtt, 489 (long long) nexttbtt, 490 tsfdelta, 491 TDMA_AVG(sc->sc_avgtsfdeltap), TDMA_AVG(sc->sc_avgtsfdeltam)); 492 493 if (tsfdelta < 0) { 494 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0); 495 TDMA_SAMPLE(sc->sc_avgtsfdeltam, -tsfdelta); 496 tsfdelta = -tsfdelta % 1024; 497 nextslottu++; 498 } else if (tsfdelta > 0) { 499 TDMA_SAMPLE(sc->sc_avgtsfdeltap, tsfdelta); 500 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0); 501 tsfdelta = 1024 - (tsfdelta % 1024); 502 nextslottu++; 503 } else { 504 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0); 505 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0); 506 } 507 tudelta = nextslottu - TSF_TO_TU(nexttbtt_full >> 32, nexttbtt_full); 508 509#ifdef ATH_DEBUG_ALQ 510 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE)) { 511 struct if_ath_alq_tdma_beacon_state t; 512 t.rx_tsf = htobe64(rstamp); 513 t.beacon_tsf = htobe64(le64toh(ni->ni_tstamp.tsf)); 514 t.tsf64 = htobe64(tsf); 515 t.nextslot_tsf = htobe64(nextslot); 516 t.nextslot_tu = htobe32(nextslottu); 517 t.txtime = htobe32(txtime); 518 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE, 519 sizeof(t), (char *) &t); 520 } 521 522 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC)) { 523 struct if_ath_alq_tdma_slot_calc t; 524 525 t.nexttbtt = htobe64(nexttbtt_full); 526 t.next_slot = htobe64(nextslot); 527 t.tsfdelta = htobe32(tsfdelta); 528 t.avg_plus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltap)); 529 t.avg_minus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltam)); 530 531 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC, 532 sizeof(t), (char *) &t); 533 } 534#endif 535 536 /* 537 * Copy sender's timetstamp into tdma ie so they can 538 * calculate roundtrip time. We submit a beacon frame 539 * below after any timer adjustment. The frame goes out 540 * at the next TBTT so the sender can calculate the 541 * roundtrip by inspecting the tdma ie in our beacon frame. 542 * 543 * NB: This tstamp is subtlely preserved when 544 * IEEE80211_BEACON_TDMA is marked (e.g. when the 545 * slot position changes) because ieee80211_add_tdma 546 * skips over the data. 547 */ 548 memcpy(ATH_VAP(vap)->av_boff.bo_tdma + 549 __offsetof(struct ieee80211_tdma_param, tdma_tstamp), 550 &ni->ni_tstamp.data, 8); 551#if 0 552 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 553 "tsf %llu nextslot %llu (%d, %d) nextslottu %u nexttbtt %llu (%d)\n", 554 (unsigned long long) tsf, (unsigned long long) nextslot, 555 (int)(nextslot - tsf), tsfdelta, nextslottu, nexttbtt, tudelta); 556#endif 557 /* 558 * Adjust the beacon timers only when pulling them forward 559 * or when going back by less than the beacon interval. 560 * Negative jumps larger than the beacon interval seem to 561 * cause the timers to stop and generally cause instability. 562 * This basically filters out jumps due to missed beacons. 563 */ 564 if (tudelta != 0 && (tudelta > 0 || -tudelta < sc->sc_tdmabintval)) { 565 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 566 "%s: calling ath_tdma_settimers; nextslottu=%d, bintval=%d\n", 567 __func__, 568 nextslottu, 569 sc->sc_tdmabintval); 570 ath_tdma_settimers(sc, nextslottu, sc->sc_tdmabintval); 571 sc->sc_stats.ast_tdma_timers++; 572 } 573 if (tsfdelta > 0) { 574 uint64_t tsf; 575 576 /* XXX should just teach ath_hal_adjusttsf() to do this */ 577 tsf = ath_hal_gettsf64(ah); 578 ath_hal_settsf64(ah, tsf + tsfdelta); 579 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 580 "%s: calling ath_hal_adjusttsf: TSF=%llu, tsfdelta=%d\n", 581 __func__, 582 tsf, 583 tsfdelta); 584 585#ifdef ATH_DEBUG_ALQ 586 if (if_ath_alq_checkdebug(&sc->sc_alq, 587 ATH_ALQ_TDMA_TSF_ADJUST)) { 588 struct if_ath_alq_tdma_tsf_adjust t; 589 590 t.tsfdelta = htobe32(tsfdelta); 591 t.tsf64_old = htobe64(tsf); 592 t.tsf64_new = htobe64(tsf + tsfdelta); 593 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TSF_ADJUST, 594 sizeof(t), (char *) &t); 595 } 596#endif /* ATH_DEBUG_ALQ */ 597 sc->sc_stats.ast_tdma_tsf++; 598 } 599 ath_tdma_beacon_send(sc, vap); /* prepare response */ 600#undef TU_TO_TSF 601#undef TSF_TO_TU 602} 603 604/* 605 * Transmit a beacon frame at SWBA. Dynamic updates 606 * to the frame contents are done as needed. 607 */ 608void 609ath_tdma_beacon_send(struct ath_softc *sc, struct ieee80211vap *vap) 610{ 611 struct ath_hal *ah = sc->sc_ah; 612 struct ath_buf *bf; 613 int otherant; 614 615 /* 616 * Check if the previous beacon has gone out. If 617 * not don't try to post another, skip this period 618 * and wait for the next. Missed beacons indicate 619 * a problem and should not occur. If we miss too 620 * many consecutive beacons reset the device. 621 */ 622 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) { 623 sc->sc_bmisscount++; 624 DPRINTF(sc, ATH_DEBUG_BEACON, 625 "%s: missed %u consecutive beacons\n", 626 __func__, sc->sc_bmisscount); 627 if (sc->sc_bmisscount >= ath_bstuck_threshold) 628 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask); 629 return; 630 } 631 if (sc->sc_bmisscount != 0) { 632 DPRINTF(sc, ATH_DEBUG_BEACON, 633 "%s: resume beacon xmit after %u misses\n", 634 __func__, sc->sc_bmisscount); 635 sc->sc_bmisscount = 0; 636 } 637 638 /* 639 * Check recent per-antenna transmit statistics and flip 640 * the default antenna if noticeably more frames went out 641 * on the non-default antenna. 642 * XXX assumes 2 anntenae 643 */ 644 if (!sc->sc_diversity) { 645 otherant = sc->sc_defant & 1 ? 2 : 1; 646 if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2) 647 ath_setdefantenna(sc, otherant); 648 sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0; 649 } 650 651 bf = ath_beacon_generate(sc, vap); 652 /* XXX We don't do cabq traffic, but just for completeness .. */ 653 ATH_TXQ_LOCK(sc->sc_cabq); 654 ath_beacon_cabq_start(sc); 655 ATH_TXQ_UNLOCK(sc->sc_cabq); 656 657 if (bf != NULL) { 658 /* 659 * Stop any current dma and put the new frame on the queue. 660 * This should never fail since we check above that no frames 661 * are still pending on the queue. 662 */ 663 if ((! sc->sc_isedma) && 664 (! ath_hal_stoptxdma(ah, sc->sc_bhalq))) { 665 DPRINTF(sc, ATH_DEBUG_ANY, 666 "%s: beacon queue %u did not stop?\n", 667 __func__, sc->sc_bhalq); 668 /* NB: the HAL still stops DMA, so proceed */ 669 } 670 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 671 ath_hal_txstart(ah, sc->sc_bhalq); 672 673 sc->sc_stats.ast_be_xmit++; /* XXX per-vap? */ 674 675 /* 676 * Record local TSF for our last send for use 677 * in arbitrating slot collisions. 678 */ 679 /* XXX should take a locked ref to iv_bss */ 680 vap->iv_bss->ni_tstamp.tsf = ath_hal_gettsf64(ah); 681 } 682} 683#endif /* IEEE80211_SUPPORT_TDMA */ 684