1164426Ssam/* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */ 2164426Ssam 3164426Ssam/*- 4164426Ssam * Copyright (c) 1994-1998 Mark Brinicombe. 5164426Ssam * Copyright (c) 1994 Brini. 6164426Ssam * All rights reserved. 7164426Ssam * 8164426Ssam * This code is derived from software written for Brini by Mark Brinicombe 9164426Ssam * 10164426Ssam * Redistribution and use in source and binary forms, with or without 11164426Ssam * modification, are permitted provided that the following conditions 12164426Ssam * are met: 13164426Ssam * 1. Redistributions of source code must retain the above copyright 14164426Ssam * notice, this list of conditions and the following disclaimer. 15164426Ssam * 2. Redistributions in binary form must reproduce the above copyright 16164426Ssam * notice, this list of conditions and the following disclaimer in the 17164426Ssam * documentation and/or other materials provided with the distribution. 18164426Ssam * 3. All advertising materials mentioning features or use of this software 19164426Ssam * must display the following acknowledgement: 20164426Ssam * This product includes software developed by Brini. 21164426Ssam * 4. The name of the company nor the name of the author may be used to 22164426Ssam * endorse or promote products derived from this software without specific 23164426Ssam * prior written permission. 24164426Ssam * 25164426Ssam * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26164426Ssam * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27164426Ssam * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28164426Ssam * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29164426Ssam * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30164426Ssam * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31164426Ssam * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32164426Ssam * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33164426Ssam * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34164426Ssam * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35164426Ssam * SUCH DAMAGE. 36164426Ssam * 37164426Ssam * RiscBSD kernel project 38164426Ssam * 39164426Ssam * machdep.c 40164426Ssam * 41164426Ssam * Machine dependant functions for kernel setup 42164426Ssam * 43236987Simp * This file needs a lot of work. 44164426Ssam * 45164426Ssam * Created : 17/09/94 46164426Ssam */ 47164426Ssam 48164426Ssam#include <sys/cdefs.h> 49164426Ssam__FBSDID("$FreeBSD$"); 50164426Ssam 51164426Ssam#define _ARM32_BUS_DMA_PRIVATE 52164426Ssam#include <sys/param.h> 53164426Ssam#include <sys/systm.h> 54164426Ssam#include <sys/sysproto.h> 55164426Ssam#include <sys/signalvar.h> 56164426Ssam#include <sys/imgact.h> 57164426Ssam#include <sys/kernel.h> 58164426Ssam#include <sys/ktr.h> 59164426Ssam#include <sys/linker.h> 60164426Ssam#include <sys/lock.h> 61164426Ssam#include <sys/malloc.h> 62164426Ssam#include <sys/mutex.h> 63164426Ssam#include <sys/pcpu.h> 64164426Ssam#include <sys/proc.h> 65164426Ssam#include <sys/ptrace.h> 66164426Ssam#include <sys/cons.h> 67164426Ssam#include <sys/bio.h> 68164426Ssam#include <sys/bus.h> 69164426Ssam#include <sys/buf.h> 70164426Ssam#include <sys/exec.h> 71164426Ssam#include <sys/kdb.h> 72164426Ssam#include <sys/msgbuf.h> 73266194Sian#include <machine/physmem.h> 74164426Ssam#include <machine/reg.h> 75164426Ssam#include <machine/cpu.h> 76164426Ssam 77164426Ssam#include <vm/vm.h> 78164426Ssam#include <vm/pmap.h> 79164426Ssam#include <vm/vm_object.h> 80164426Ssam#include <vm/vm_page.h> 81164426Ssam#include <vm/vm_map.h> 82259364Sian#include <machine/devmap.h> 83164426Ssam#include <machine/vmparam.h> 84164426Ssam#include <machine/pcb.h> 85164426Ssam#include <machine/undefined.h> 86164426Ssam#include <machine/machdep.h> 87164426Ssam#include <machine/metadata.h> 88164426Ssam#include <machine/armreg.h> 89164426Ssam#include <machine/bus.h> 90164426Ssam#include <sys/reboot.h> 91164426Ssam 92164426Ssam#include <arm/xscale/ixp425/ixp425reg.h> 93164426Ssam#include <arm/xscale/ixp425/ixp425var.h> 94164426Ssam 95164426Ssam#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 96164426Ssam#define KERNEL_PT_IO 1 97164426Ssam#define KERNEL_PT_IO_NUM 3 98164426Ssam#define KERNEL_PT_BEFOREKERN KERNEL_PT_IO + KERNEL_PT_IO_NUM 99164426Ssam#define KERNEL_PT_AFKERNEL KERNEL_PT_BEFOREKERN + 1 /* L2 table for mapping after kernel */ 100164426Ssam#define KERNEL_PT_AFKERNEL_NUM 9 101164426Ssam 102164426Ssam/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */ 103164426Ssam#define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM) 104164426Ssam 105164426Ssamstruct pv_addr kernel_pt_table[NUM_KERNEL_PTS]; 106164426Ssam 107164426Ssam/* Physical and virtual addresses for some global pages */ 108164426Ssam 109164426Ssamstruct pv_addr systempage; 110164426Ssamstruct pv_addr msgbufpv; 111164426Ssamstruct pv_addr irqstack; 112164426Ssamstruct pv_addr undstack; 113164426Ssamstruct pv_addr abtstack; 114164426Ssamstruct pv_addr kernelstack; 115164426Ssamstruct pv_addr minidataclean; 116164426Ssam 117164426Ssam/* Static device mappings. */ 118259364Sianstatic const struct arm_devmap_entry ixp425_devmap[] = { 119164426Ssam /* Physical/Virtual address for I/O space */ 120186352Ssam { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE, 121266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 122164426Ssam 123164426Ssam /* Expansion Bus */ 124186352Ssam { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE, 125266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 126164426Ssam 127188088Ssam /* CFI Flash on the Expansion Bus */ 128188088Ssam { IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE, 129266386Sian IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 130188088Ssam 131164426Ssam /* IXP425 PCI Configuration */ 132186352Ssam { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE, 133266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 134164426Ssam 135164426Ssam /* SDRAM Controller */ 136186352Ssam { IXP425_MCU_VBASE, IXP425_MCU_HWBASE, IXP425_MCU_SIZE, 137266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 138164426Ssam 139164426Ssam /* PCI Memory Space */ 140186352Ssam { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE, 141266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 142186352Ssam 143186352Ssam /* Q-Mgr Memory Space */ 144186352Ssam { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE, 145266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 146186352Ssam 147186352Ssam { 0 }, 148186352Ssam}; 149186352Ssam 150186352Ssam/* Static device mappings. */ 151259364Sianstatic const struct arm_devmap_entry ixp435_devmap[] = { 152186352Ssam /* Physical/Virtual address for I/O space */ 153186352Ssam { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE, 154266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 155186352Ssam 156186352Ssam { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE, 157266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 158186352Ssam 159186352Ssam /* IXP425 PCI Configuration */ 160186352Ssam { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE, 161266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 162186352Ssam 163186352Ssam /* DDRII Controller NB: mapped same place as IXP425 */ 164186352Ssam { IXP425_MCU_VBASE, IXP435_MCU_HWBASE, IXP425_MCU_SIZE, 165266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 166186352Ssam 167186352Ssam /* PCI Memory Space */ 168186352Ssam { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE, 169266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 170186352Ssam 171164426Ssam /* Q-Mgr Memory Space */ 172186352Ssam { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE, 173266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 174164426Ssam 175194654Ssam /* CFI Flash on the Expansion Bus */ 176194654Ssam { IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE, 177266386Sian IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 178194654Ssam 179186352Ssam /* USB1 Memory Space */ 180186352Ssam { IXP435_USB1_VBASE, IXP435_USB1_HWBASE, IXP435_USB1_SIZE, 181266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 182186352Ssam /* USB2 Memory Space */ 183186352Ssam { IXP435_USB2_VBASE, IXP435_USB2_HWBASE, IXP435_USB2_SIZE, 184266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 185186352Ssam 186194654Ssam /* GPS Memory Space */ 187194654Ssam { CAMBRIA_GPS_VBASE, CAMBRIA_GPS_HWBASE, CAMBRIA_GPS_SIZE, 188266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 189194654Ssam 190194654Ssam /* RS485 Memory Space */ 191194654Ssam { CAMBRIA_RS485_VBASE, CAMBRIA_RS485_HWBASE, CAMBRIA_RS485_SIZE, 192266386Sian VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, }, 193194654Ssam 194186352Ssam { 0 } 195164426Ssam}; 196164426Ssam 197164426Ssamextern vm_offset_t xscale_cache_clean_addr; 198164426Ssam 199164426Ssamvoid * 200236524Simpinitarm(struct arm_boot_params *abp) 201164426Ssam{ 202186352Ssam#define next_chunk2(a,b) (((a) + (b)) &~ ((b)-1)) 203186352Ssam#define next_page(a) next_chunk2(a,PAGE_SIZE) 204164426Ssam struct pv_addr kernel_l1pt; 205194784Sjeff struct pv_addr dpcpu; 206177886Sraj int loop, i; 207164426Ssam u_int l1pagetable; 208164426Ssam vm_offset_t freemempos; 209164426Ssam vm_offset_t freemem_pt; 210164426Ssam vm_offset_t afterkern; 211164426Ssam vm_offset_t freemem_after; 212164426Ssam vm_offset_t lastaddr; 213164426Ssam uint32_t memsize; 214164426Ssam 215266194Sian /* kernel text starts where we were loaded at boot */ 216266194Sian#define KERNEL_TEXT_OFF (abp->abp_physaddr - PHYSADDR) 217266194Sian#define KERNEL_TEXT_BASE (KERNBASE + KERNEL_TEXT_OFF) 218266194Sian#define KERNEL_TEXT_PHYS (PHYSADDR + KERNEL_TEXT_OFF) 219266194Sian 220237040Simp lastaddr = parse_boot_param(abp); 221266194Sian arm_physmem_kernaddr = abp->abp_physaddr; 222186352Ssam set_cpufuncs(); /* NB: sets cputype */ 223164426Ssam pcpu_init(pcpup, 0, sizeof(struct pcpu)); 224164426Ssam PCPU_SET(curthread, &thread0); 225164426Ssam 226294683Sian init_static_kenv(NULL, 0); 227294683Sian 228218666Scognet /* Do basic tuning, hz etc */ 229218666Scognet init_param1(); 230218666Scognet 231186352Ssam /* 232186352Ssam * We allocate memory downwards from where we were loaded 233186352Ssam * by RedBoot; first the L1 page table, then NUM_KERNEL_PTS 234186352Ssam * entries in the L2 page table. Past that we re-align the 235186352Ssam * allocation boundary so later data structures (stacks, etc) 236186352Ssam * can be mapped with different attributes (write-back vs 237186352Ssam * write-through). Note this leaves a gap for expansion 238186352Ssam * (or might be repurposed). 239186352Ssam */ 240266194Sian freemempos = abp->abp_physaddr; 241164426Ssam 242186352Ssam /* macros to simplify initial memory allocation */ 243186352Ssam#define alloc_pages(var, np) do { \ 244186352Ssam freemempos -= (np * PAGE_SIZE); \ 245186352Ssam (var) = freemempos; \ 246186352Ssam /* NB: this works because locore maps PA=VA */ \ 247186352Ssam memset((char *)(var), 0, ((np) * PAGE_SIZE)); \ 248186352Ssam} while (0) 249186352Ssam#define valloc_pages(var, np) do { \ 250186352Ssam alloc_pages((var).pv_pa, (np)); \ 251266194Sian (var).pv_va = (var).pv_pa + (KERNVIRTADDR - abp->abp_physaddr); \ 252186352Ssam} while (0) 253164426Ssam 254186352Ssam /* force L1 page table alignment */ 255164426Ssam while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 256164426Ssam freemempos -= PAGE_SIZE; 257186352Ssam /* allocate contiguous L1 page table */ 258164426Ssam valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 259186352Ssam /* now allocate L2 page tables; they are linked to L1 below */ 260164426Ssam for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 261164426Ssam if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 262164426Ssam valloc_pages(kernel_pt_table[loop], 263164426Ssam L2_TABLE_SIZE / PAGE_SIZE); 264164426Ssam } else { 265164426Ssam kernel_pt_table[loop].pv_pa = freemempos + 266164426Ssam (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) * 267164426Ssam L2_TABLE_SIZE_REAL; 268236987Simp kernel_pt_table[loop].pv_va = 269186352Ssam kernel_pt_table[loop].pv_pa + 270266194Sian (KERNVIRTADDR - abp->abp_physaddr); 271164426Ssam } 272164426Ssam } 273186352Ssam freemem_pt = freemempos; /* base of allocated pt's */ 274186352Ssam 275164426Ssam /* 276186352Ssam * Re-align allocation boundary so we can map the area 277186352Ssam * write-back instead of write-through for the stacks and 278186352Ssam * related structures allocated below. 279186352Ssam */ 280186352Ssam freemempos = PHYSADDR + 0x100000; 281186352Ssam /* 282164426Ssam * Allocate a page for the system page mapped to V0x00000000 283164426Ssam * This page will just contain the system vectors and can be 284164426Ssam * shared by all processes. 285164426Ssam */ 286164426Ssam valloc_pages(systempage, 1); 287164426Ssam 288194784Sjeff /* Allocate dynamic per-cpu area. */ 289194784Sjeff valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 290194784Sjeff dpcpu_init((void *)dpcpu.pv_va, 0); 291194784Sjeff 292164426Ssam /* Allocate stacks for all modes */ 293164426Ssam valloc_pages(irqstack, IRQ_STACK_SIZE); 294164426Ssam valloc_pages(abtstack, ABT_STACK_SIZE); 295164426Ssam valloc_pages(undstack, UND_STACK_SIZE); 296164426Ssam valloc_pages(kernelstack, KSTACK_PAGES); 297164426Ssam alloc_pages(minidataclean.pv_pa, 1); 298217688Spluknet valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 299164426Ssam 300164426Ssam /* 301186352Ssam * Now construct the L1 page table. First map the L2 302186352Ssam * page tables into the L1 so we can replace L1 mappings 303186352Ssam * later on if necessary 304164426Ssam */ 305164426Ssam l1pagetable = kernel_l1pt.pv_va; 306164426Ssam 307164426Ssam /* Map the L2 pages tables in the L1 page table */ 308164426Ssam pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1), 309164426Ssam &kernel_pt_table[KERNEL_PT_SYS]); 310164426Ssam pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE, 311186352Ssam &kernel_pt_table[KERNEL_PT_IO]); 312164426Ssam pmap_link_l2pt(l1pagetable, IXP425_MCU_VBASE, 313186352Ssam &kernel_pt_table[KERNEL_PT_IO + 1]); 314164426Ssam pmap_link_l2pt(l1pagetable, IXP425_PCI_MEM_VBASE, 315186352Ssam &kernel_pt_table[KERNEL_PT_IO + 2]); 316164426Ssam pmap_link_l2pt(l1pagetable, KERNBASE, 317164426Ssam &kernel_pt_table[KERNEL_PT_BEFOREKERN]); 318186352Ssam pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR, 0x100000, 319164426Ssam VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 320186352Ssam pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, PHYSADDR + 0x100000, 321164426Ssam 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 322186352Ssam pmap_map_chunk(l1pagetable, KERNEL_TEXT_BASE, KERNEL_TEXT_PHYS, 323186352Ssam next_chunk2(((uint32_t)lastaddr) - KERNEL_TEXT_BASE, L1_S_SIZE), 324164426Ssam VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 325186352Ssam freemem_after = next_page((int)lastaddr); 326186352Ssam afterkern = round_page(next_chunk2((vm_offset_t)lastaddr, L1_S_SIZE)); 327164426Ssam for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) { 328164426Ssam pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000, 329164426Ssam &kernel_pt_table[KERNEL_PT_AFKERNEL + i]); 330164426Ssam } 331236987Simp pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa, 332164426Ssam VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 333164426Ssam 334164426Ssam 335164426Ssam /* Map the Mini-Data cache clean area. */ 336164426Ssam xscale_setup_minidata(l1pagetable, afterkern, 337164426Ssam minidataclean.pv_pa); 338164426Ssam 339164426Ssam /* Map the vector page. */ 340164426Ssam pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 341164426Ssam VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 342186352Ssam if (cpu_is_ixp43x()) 343259364Sian arm_devmap_bootstrap(l1pagetable, ixp435_devmap); 344186352Ssam else 345259364Sian arm_devmap_bootstrap(l1pagetable, ixp425_devmap); 346164426Ssam /* 347164426Ssam * Give the XScale global cache clean code an appropriately 348164426Ssam * sized chunk of unmapped VA space starting at 0xff000000 349164426Ssam * (our device mappings end before this address). 350164426Ssam */ 351164426Ssam xscale_cache_clean_addr = 0xff000000U; 352164426Ssam 353164426Ssam cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 354164426Ssam setttb(kernel_l1pt.pv_pa); 355164426Ssam cpu_tlb_flushID(); 356164426Ssam cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 357186352Ssam 358164426Ssam /* 359164426Ssam * Pages were allocated during the secondary bootstrap for the 360164426Ssam * stacks for different CPU modes. 361164426Ssam * We must now set the r13 registers in the different CPU modes to 362164426Ssam * point to these stacks. 363164426Ssam * Since the ARM stacks use STMFD etc. we must set r13 to the top end 364164426Ssam * of the stack memory. 365164426Ssam */ 366240802Sandrew set_stackptrs(0); 367164426Ssam 368164426Ssam /* 369164426Ssam * We must now clean the cache again.... 370164426Ssam * Cleaning may be done by reading new data to displace any 371164426Ssam * dirty data in the cache. This will have happened in setttb() 372164426Ssam * but since we are boot strapping the addresses used for the read 373164426Ssam * may have just been remapped and thus the cache could be out 374164426Ssam * of sync. A re-clean after the switch will cure this. 375185513Sstas * After booting there are no gross relocations of the kernel thus 376164426Ssam * this problem will not occur after initarm(). 377164426Ssam */ 378164426Ssam cpu_idcache_wbinv_all(); 379259377Sian cpu_setup(""); 380259377Sian 381186352Ssam /* ready to setup the console (XXX move earlier if possible) */ 382186352Ssam cninit(); 383164426Ssam /* 384186352Ssam * Fetch the RAM size from the MCU registers. The 385186352Ssam * expansion bus was mapped above so we can now read 'em. 386164426Ssam */ 387186352Ssam if (cpu_is_ixp43x()) 388186352Ssam memsize = ixp435_ddram_size(); 389186352Ssam else 390186352Ssam memsize = ixp425_sdram_size(); 391164426Ssam 392164426Ssam undefined_init(); 393186352Ssam 394236828Sandrew init_proc0(kernelstack.pv_va); 395164426Ssam 396164426Ssam arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 397164426Ssam 398164426Ssam pmap_curmaxkvaddr = afterkern + PAGE_SIZE; 399247046Salc vm_max_kernel_address = 0xd0000000; 400247046Salc pmap_bootstrap(pmap_curmaxkvaddr, &kernel_l1pt); 401164426Ssam msgbufp = (void*)msgbufpv.pv_va; 402217688Spluknet msgbufinit(msgbufp, msgbufsize); 403164426Ssam mutex_init(); 404186352Ssam 405266194Sian /* 406266194Sian * Add the physical ram we have available. 407266194Sian * 408266194Sian * Exclude the kernel, and all the things we allocated which immediately 409266194Sian * follow the kernel, from the VM allocation pool but not from crash 410266194Sian * dumps. virtual_avail is a global variable which tracks the kva we've 411266194Sian * "allocated" while setting up pmaps. 412266194Sian * 413266194Sian * Prepare the list of physical memory available to the vm subsystem. 414266194Sian */ 415266194Sian arm_physmem_hardware_region(PHYSADDR, memsize); 416266194Sian arm_physmem_exclude_region(abp->abp_physaddr, 417266194Sian virtual_avail - KERNVIRTADDR, EXFLAG_NOALLOC); 418266194Sian arm_physmem_init_kernel_globals(); 419186352Ssam 420164426Ssam init_param2(physmem); 421164426Ssam kdb_init(); 422183557Sbms 423164426Ssam return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 424164426Ssam sizeof(struct pcb))); 425186352Ssam#undef next_page 426186352Ssam#undef next_chunk2 427164426Ssam} 428