1/*
2 * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses.  You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 *     Redistribution and use in source and binary forms, with or
11 *     without modification, are permitted provided that the following
12 *     conditions are met:
13 *
14 *      - Redistributions of source code must retain the above
15 *        copyright notice, this list of conditions and the following
16 *        disclaimer.
17 *
18 *      - Redistributions in binary form must reproduce the above
19 *        copyright notice, this list of conditions and the following
20 *        disclaimer in the documentation and/or other materials
21 *        provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#ifndef DOORBELL_H
34#define DOORBELL_H
35
36#ifdef __i386__
37
38static inline void mthca_write64(uint32_t val[2], struct mthca_context *ctx, int offset)
39{
40	/* i386 stack is aligned to 8 bytes, so this should be OK: */
41	uint8_t xmmsave[8] __attribute__((aligned(8)));
42
43	asm volatile (
44		"movlps %%xmm0,(%0); \n\t"
45		"movlps (%1),%%xmm0; \n\t"
46		"movlps %%xmm0,(%2); \n\t"
47		"movlps (%0),%%xmm0; \n\t"
48		:
49		: "r" (xmmsave), "r" (val), "r" (ctx->uar + offset)
50		: "memory" );
51}
52
53static inline void mthca_write_db_rec(uint32_t val[2], uint32_t *db)
54{
55	/* i386 stack is aligned to 8 bytes, so this should be OK: */
56	uint8_t xmmsave[8] __attribute__((aligned(8)));
57
58	asm volatile (
59		"movlps %%xmm0,(%0); \n\t"
60		"movlps (%1),%%xmm0; \n\t"
61		"movlps %%xmm0,(%2); \n\t"
62		"movlps (%0),%%xmm0; \n\t"
63		:
64		: "r" (xmmsave), "r" (val), "r" (db)
65		: "memory" );
66}
67
68#elif SIZEOF_LONG == 8
69
70#if __BYTE_ORDER == __LITTLE_ENDIAN
71#  define MTHCA_PAIR_TO_64(val) ((uint64_t) val[1] << 32 | val[0])
72#elif __BYTE_ORDER == __BIG_ENDIAN
73#  define MTHCA_PAIR_TO_64(val) ((uint64_t) val[0] << 32 | val[1])
74#else
75#  error __BYTE_ORDER not defined
76#endif
77
78static inline void mthca_write64(uint32_t val[2], struct mthca_context *ctx, int offset)
79{
80	*(volatile uint64_t *) (ctx->uar + offset) = MTHCA_PAIR_TO_64(val);
81}
82
83static inline void mthca_write_db_rec(uint32_t val[2], uint32_t *db)
84{
85	*(volatile uint64_t *) db = MTHCA_PAIR_TO_64(val);
86}
87
88#else
89
90static inline void mthca_write64(uint32_t val[2], struct mthca_context *ctx, int offset)
91{
92	pthread_spin_lock(&ctx->uar_lock);
93	*(volatile uint32_t *) (ctx->uar + offset)     = val[0];
94	*(volatile uint32_t *) (ctx->uar + offset + 4) = val[1];
95	pthread_spin_unlock(&ctx->uar_lock);
96}
97
98static inline void mthca_write_db_rec(uint32_t val[2], uint32_t *db)
99{
100	*(volatile uint32_t *) db       = val[0];
101	mb();
102	*(volatile uint32_t *) (db + 1) = val[1];
103}
104
105#endif
106
107#endif /* MTHCA_H */
108