1//===- PromoteMemoryToRegister.cpp - Convert allocas to registers ---------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file promotes memory references to be register references. It promotes 11// alloca instructions which only have loads and stores as uses. An alloca is 12// transformed by using iterated dominator frontiers to place PHI nodes, then 13// traversing the function in depth-first order to rewrite loads and stores as 14// appropriate. 15// 16// The algorithm used here is based on: 17// 18// Sreedhar and Gao. A linear time algorithm for placing phi-nodes. 19// In Proceedings of the 22nd ACM SIGPLAN-SIGACT Symposium on Principles of 20// Programming Languages 21// POPL '95. ACM, New York, NY, 62-73. 22// 23// It has been modified to not explicitly use the DJ graph data structure and to 24// directly compute pruned SSA using per-variable liveness information. 25// 26//===----------------------------------------------------------------------===// 27 28#define DEBUG_TYPE "mem2reg" 29#include "llvm/Transforms/Utils/PromoteMemToReg.h" 30#include "llvm/ADT/ArrayRef.h" 31#include "llvm/ADT/DenseMap.h" 32#include "llvm/ADT/STLExtras.h" 33#include "llvm/ADT/SmallPtrSet.h" 34#include "llvm/ADT/SmallVector.h" 35#include "llvm/ADT/Statistic.h" 36#include "llvm/Analysis/AliasSetTracker.h" 37#include "llvm/Analysis/Dominators.h" 38#include "llvm/Analysis/InstructionSimplify.h" 39#include "llvm/Analysis/ValueTracking.h" 40#include "llvm/DIBuilder.h" 41#include "llvm/DebugInfo.h" 42#include "llvm/IR/Constants.h" 43#include "llvm/IR/DerivedTypes.h" 44#include "llvm/IR/Function.h" 45#include "llvm/IR/Instructions.h" 46#include "llvm/IR/IntrinsicInst.h" 47#include "llvm/IR/Metadata.h" 48#include "llvm/Support/CFG.h" 49#include "llvm/Transforms/Utils/Local.h" 50#include <algorithm> 51#include <queue> 52using namespace llvm; 53 54STATISTIC(NumLocalPromoted, "Number of alloca's promoted within one block"); 55STATISTIC(NumSingleStore, "Number of alloca's promoted with a single store"); 56STATISTIC(NumDeadAlloca, "Number of dead alloca's removed"); 57STATISTIC(NumPHIInsert, "Number of PHI nodes inserted"); 58 59bool llvm::isAllocaPromotable(const AllocaInst *AI) { 60 // FIXME: If the memory unit is of pointer or integer type, we can permit 61 // assignments to subsections of the memory unit. 62 63 // Only allow direct and non-volatile loads and stores... 64 for (Value::const_use_iterator UI = AI->use_begin(), UE = AI->use_end(); 65 UI != UE; ++UI) { // Loop over all of the uses of the alloca 66 const User *U = *UI; 67 if (const LoadInst *LI = dyn_cast<LoadInst>(U)) { 68 // Note that atomic loads can be transformed; atomic semantics do 69 // not have any meaning for a local alloca. 70 if (LI->isVolatile()) 71 return false; 72 } else if (const StoreInst *SI = dyn_cast<StoreInst>(U)) { 73 if (SI->getOperand(0) == AI) 74 return false; // Don't allow a store OF the AI, only INTO the AI. 75 // Note that atomic stores can be transformed; atomic semantics do 76 // not have any meaning for a local alloca. 77 if (SI->isVolatile()) 78 return false; 79 } else if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(U)) { 80 if (II->getIntrinsicID() != Intrinsic::lifetime_start && 81 II->getIntrinsicID() != Intrinsic::lifetime_end) 82 return false; 83 } else if (const BitCastInst *BCI = dyn_cast<BitCastInst>(U)) { 84 if (BCI->getType() != Type::getInt8PtrTy(U->getContext())) 85 return false; 86 if (!onlyUsedByLifetimeMarkers(BCI)) 87 return false; 88 } else if (const GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(U)) { 89 if (GEPI->getType() != Type::getInt8PtrTy(U->getContext())) 90 return false; 91 if (!GEPI->hasAllZeroIndices()) 92 return false; 93 if (!onlyUsedByLifetimeMarkers(GEPI)) 94 return false; 95 } else { 96 return false; 97 } 98 } 99 100 return true; 101} 102 103namespace { 104 105struct AllocaInfo { 106 SmallVector<BasicBlock *, 32> DefiningBlocks; 107 SmallVector<BasicBlock *, 32> UsingBlocks; 108 109 StoreInst *OnlyStore; 110 BasicBlock *OnlyBlock; 111 bool OnlyUsedInOneBlock; 112 113 Value *AllocaPointerVal; 114 DbgDeclareInst *DbgDeclare; 115 116 void clear() { 117 DefiningBlocks.clear(); 118 UsingBlocks.clear(); 119 OnlyStore = 0; 120 OnlyBlock = 0; 121 OnlyUsedInOneBlock = true; 122 AllocaPointerVal = 0; 123 DbgDeclare = 0; 124 } 125 126 /// Scan the uses of the specified alloca, filling in the AllocaInfo used 127 /// by the rest of the pass to reason about the uses of this alloca. 128 void AnalyzeAlloca(AllocaInst *AI) { 129 clear(); 130 131 // As we scan the uses of the alloca instruction, keep track of stores, 132 // and decide whether all of the loads and stores to the alloca are within 133 // the same basic block. 134 for (Value::use_iterator UI = AI->use_begin(), E = AI->use_end(); 135 UI != E;) { 136 Instruction *User = cast<Instruction>(*UI++); 137 138 if (StoreInst *SI = dyn_cast<StoreInst>(User)) { 139 // Remember the basic blocks which define new values for the alloca 140 DefiningBlocks.push_back(SI->getParent()); 141 AllocaPointerVal = SI->getOperand(0); 142 OnlyStore = SI; 143 } else { 144 LoadInst *LI = cast<LoadInst>(User); 145 // Otherwise it must be a load instruction, keep track of variable 146 // reads. 147 UsingBlocks.push_back(LI->getParent()); 148 AllocaPointerVal = LI; 149 } 150 151 if (OnlyUsedInOneBlock) { 152 if (OnlyBlock == 0) 153 OnlyBlock = User->getParent(); 154 else if (OnlyBlock != User->getParent()) 155 OnlyUsedInOneBlock = false; 156 } 157 } 158 159 DbgDeclare = FindAllocaDbgDeclare(AI); 160 } 161}; 162 163// Data package used by RenamePass() 164class RenamePassData { 165public: 166 typedef std::vector<Value *> ValVector; 167 168 RenamePassData() : BB(NULL), Pred(NULL), Values() {} 169 RenamePassData(BasicBlock *B, BasicBlock *P, const ValVector &V) 170 : BB(B), Pred(P), Values(V) {} 171 BasicBlock *BB; 172 BasicBlock *Pred; 173 ValVector Values; 174 175 void swap(RenamePassData &RHS) { 176 std::swap(BB, RHS.BB); 177 std::swap(Pred, RHS.Pred); 178 Values.swap(RHS.Values); 179 } 180}; 181 182/// \brief This assigns and keeps a per-bb relative ordering of load/store 183/// instructions in the block that directly load or store an alloca. 184/// 185/// This functionality is important because it avoids scanning large basic 186/// blocks multiple times when promoting many allocas in the same block. 187class LargeBlockInfo { 188 /// \brief For each instruction that we track, keep the index of the 189 /// instruction. 190 /// 191 /// The index starts out as the number of the instruction from the start of 192 /// the block. 193 DenseMap<const Instruction *, unsigned> InstNumbers; 194 195public: 196 197 /// This code only looks at accesses to allocas. 198 static bool isInterestingInstruction(const Instruction *I) { 199 return (isa<LoadInst>(I) && isa<AllocaInst>(I->getOperand(0))) || 200 (isa<StoreInst>(I) && isa<AllocaInst>(I->getOperand(1))); 201 } 202 203 /// Get or calculate the index of the specified instruction. 204 unsigned getInstructionIndex(const Instruction *I) { 205 assert(isInterestingInstruction(I) && 206 "Not a load/store to/from an alloca?"); 207 208 // If we already have this instruction number, return it. 209 DenseMap<const Instruction *, unsigned>::iterator It = InstNumbers.find(I); 210 if (It != InstNumbers.end()) 211 return It->second; 212 213 // Scan the whole block to get the instruction. This accumulates 214 // information for every interesting instruction in the block, in order to 215 // avoid gratuitus rescans. 216 const BasicBlock *BB = I->getParent(); 217 unsigned InstNo = 0; 218 for (BasicBlock::const_iterator BBI = BB->begin(), E = BB->end(); BBI != E; 219 ++BBI) 220 if (isInterestingInstruction(BBI)) 221 InstNumbers[BBI] = InstNo++; 222 It = InstNumbers.find(I); 223 224 assert(It != InstNumbers.end() && "Didn't insert instruction?"); 225 return It->second; 226 } 227 228 void deleteValue(const Instruction *I) { InstNumbers.erase(I); } 229 230 void clear() { InstNumbers.clear(); } 231}; 232 233struct PromoteMem2Reg { 234 /// The alloca instructions being promoted. 235 std::vector<AllocaInst *> Allocas; 236 DominatorTree &DT; 237 DIBuilder DIB; 238 239 /// An AliasSetTracker object to update. If null, don't update it. 240 AliasSetTracker *AST; 241 242 /// Reverse mapping of Allocas. 243 DenseMap<AllocaInst *, unsigned> AllocaLookup; 244 245 /// \brief The PhiNodes we're adding. 246 /// 247 /// That map is used to simplify some Phi nodes as we iterate over it, so 248 /// it should have deterministic iterators. We could use a MapVector, but 249 /// since we already maintain a map from BasicBlock* to a stable numbering 250 /// (BBNumbers), the DenseMap is more efficient (also supports removal). 251 DenseMap<std::pair<unsigned, unsigned>, PHINode *> NewPhiNodes; 252 253 /// For each PHI node, keep track of which entry in Allocas it corresponds 254 /// to. 255 DenseMap<PHINode *, unsigned> PhiToAllocaMap; 256 257 /// If we are updating an AliasSetTracker, then for each alloca that is of 258 /// pointer type, we keep track of what to copyValue to the inserted PHI 259 /// nodes here. 260 std::vector<Value *> PointerAllocaValues; 261 262 /// For each alloca, we keep track of the dbg.declare intrinsic that 263 /// describes it, if any, so that we can convert it to a dbg.value 264 /// intrinsic if the alloca gets promoted. 265 SmallVector<DbgDeclareInst *, 8> AllocaDbgDeclares; 266 267 /// The set of basic blocks the renamer has already visited. 268 /// 269 SmallPtrSet<BasicBlock *, 16> Visited; 270 271 /// Contains a stable numbering of basic blocks to avoid non-determinstic 272 /// behavior. 273 DenseMap<BasicBlock *, unsigned> BBNumbers; 274 275 /// Maps DomTreeNodes to their level in the dominator tree. 276 DenseMap<DomTreeNode *, unsigned> DomLevels; 277 278 /// Lazily compute the number of predecessors a block has. 279 DenseMap<const BasicBlock *, unsigned> BBNumPreds; 280 281public: 282 PromoteMem2Reg(ArrayRef<AllocaInst *> Allocas, DominatorTree &DT, 283 AliasSetTracker *AST) 284 : Allocas(Allocas.begin(), Allocas.end()), DT(DT), 285 DIB(*DT.getRoot()->getParent()->getParent()), AST(AST) {} 286 287 void run(); 288 289private: 290 void RemoveFromAllocasList(unsigned &AllocaIdx) { 291 Allocas[AllocaIdx] = Allocas.back(); 292 Allocas.pop_back(); 293 --AllocaIdx; 294 } 295 296 unsigned getNumPreds(const BasicBlock *BB) { 297 unsigned &NP = BBNumPreds[BB]; 298 if (NP == 0) 299 NP = std::distance(pred_begin(BB), pred_end(BB)) + 1; 300 return NP - 1; 301 } 302 303 void DetermineInsertionPoint(AllocaInst *AI, unsigned AllocaNum, 304 AllocaInfo &Info); 305 void ComputeLiveInBlocks(AllocaInst *AI, AllocaInfo &Info, 306 const SmallPtrSet<BasicBlock *, 32> &DefBlocks, 307 SmallPtrSet<BasicBlock *, 32> &LiveInBlocks); 308 void RenamePass(BasicBlock *BB, BasicBlock *Pred, 309 RenamePassData::ValVector &IncVals, 310 std::vector<RenamePassData> &Worklist); 311 bool QueuePhiNode(BasicBlock *BB, unsigned AllocaIdx, unsigned &Version); 312}; 313 314} // end of anonymous namespace 315 316static void removeLifetimeIntrinsicUsers(AllocaInst *AI) { 317 // Knowing that this alloca is promotable, we know that it's safe to kill all 318 // instructions except for load and store. 319 320 for (Value::use_iterator UI = AI->use_begin(), UE = AI->use_end(); 321 UI != UE;) { 322 Instruction *I = cast<Instruction>(*UI); 323 ++UI; 324 if (isa<LoadInst>(I) || isa<StoreInst>(I)) 325 continue; 326 327 if (!I->getType()->isVoidTy()) { 328 // The only users of this bitcast/GEP instruction are lifetime intrinsics. 329 // Follow the use/def chain to erase them now instead of leaving it for 330 // dead code elimination later. 331 for (Value::use_iterator UI = I->use_begin(), UE = I->use_end(); 332 UI != UE;) { 333 Instruction *Inst = cast<Instruction>(*UI); 334 ++UI; 335 Inst->eraseFromParent(); 336 } 337 } 338 I->eraseFromParent(); 339 } 340} 341 342/// \brief Rewrite as many loads as possible given a single store. 343/// 344/// When there is only a single store, we can use the domtree to trivially 345/// replace all of the dominated loads with the stored value. Do so, and return 346/// true if this has successfully promoted the alloca entirely. If this returns 347/// false there were some loads which were not dominated by the single store 348/// and thus must be phi-ed with undef. We fall back to the standard alloca 349/// promotion algorithm in that case. 350static bool rewriteSingleStoreAlloca(AllocaInst *AI, AllocaInfo &Info, 351 LargeBlockInfo &LBI, 352 DominatorTree &DT, 353 AliasSetTracker *AST) { 354 StoreInst *OnlyStore = Info.OnlyStore; 355 bool StoringGlobalVal = !isa<Instruction>(OnlyStore->getOperand(0)); 356 BasicBlock *StoreBB = OnlyStore->getParent(); 357 int StoreIndex = -1; 358 359 // Clear out UsingBlocks. We will reconstruct it here if needed. 360 Info.UsingBlocks.clear(); 361 362 for (Value::use_iterator UI = AI->use_begin(), E = AI->use_end(); UI != E;) { 363 Instruction *UserInst = cast<Instruction>(*UI++); 364 if (!isa<LoadInst>(UserInst)) { 365 assert(UserInst == OnlyStore && "Should only have load/stores"); 366 continue; 367 } 368 LoadInst *LI = cast<LoadInst>(UserInst); 369 370 // Okay, if we have a load from the alloca, we want to replace it with the 371 // only value stored to the alloca. We can do this if the value is 372 // dominated by the store. If not, we use the rest of the mem2reg machinery 373 // to insert the phi nodes as needed. 374 if (!StoringGlobalVal) { // Non-instructions are always dominated. 375 if (LI->getParent() == StoreBB) { 376 // If we have a use that is in the same block as the store, compare the 377 // indices of the two instructions to see which one came first. If the 378 // load came before the store, we can't handle it. 379 if (StoreIndex == -1) 380 StoreIndex = LBI.getInstructionIndex(OnlyStore); 381 382 if (unsigned(StoreIndex) > LBI.getInstructionIndex(LI)) { 383 // Can't handle this load, bail out. 384 Info.UsingBlocks.push_back(StoreBB); 385 continue; 386 } 387 388 } else if (LI->getParent() != StoreBB && 389 !DT.dominates(StoreBB, LI->getParent())) { 390 // If the load and store are in different blocks, use BB dominance to 391 // check their relationships. If the store doesn't dom the use, bail 392 // out. 393 Info.UsingBlocks.push_back(LI->getParent()); 394 continue; 395 } 396 } 397 398 // Otherwise, we *can* safely rewrite this load. 399 Value *ReplVal = OnlyStore->getOperand(0); 400 // If the replacement value is the load, this must occur in unreachable 401 // code. 402 if (ReplVal == LI) 403 ReplVal = UndefValue::get(LI->getType()); 404 LI->replaceAllUsesWith(ReplVal); 405 if (AST && LI->getType()->isPointerTy()) 406 AST->deleteValue(LI); 407 LI->eraseFromParent(); 408 LBI.deleteValue(LI); 409 } 410 411 // Finally, after the scan, check to see if the store is all that is left. 412 if (!Info.UsingBlocks.empty()) 413 return false; // If not, we'll have to fall back for the remainder. 414 415 // Record debuginfo for the store and remove the declaration's 416 // debuginfo. 417 if (DbgDeclareInst *DDI = Info.DbgDeclare) { 418 DIBuilder DIB(*AI->getParent()->getParent()->getParent()); 419 ConvertDebugDeclareToDebugValue(DDI, Info.OnlyStore, DIB); 420 DDI->eraseFromParent(); 421 LBI.deleteValue(DDI); 422 } 423 // Remove the (now dead) store and alloca. 424 Info.OnlyStore->eraseFromParent(); 425 LBI.deleteValue(Info.OnlyStore); 426 427 if (AST) 428 AST->deleteValue(AI); 429 AI->eraseFromParent(); 430 LBI.deleteValue(AI); 431 return true; 432} 433 434/// Many allocas are only used within a single basic block. If this is the 435/// case, avoid traversing the CFG and inserting a lot of potentially useless 436/// PHI nodes by just performing a single linear pass over the basic block 437/// using the Alloca. 438/// 439/// If we cannot promote this alloca (because it is read before it is written), 440/// return true. This is necessary in cases where, due to control flow, the 441/// alloca is potentially undefined on some control flow paths. e.g. code like 442/// this is potentially correct: 443/// 444/// for (...) { if (c) { A = undef; undef = B; } } 445/// 446/// ... so long as A is not used before undef is set. 447static void promoteSingleBlockAlloca(AllocaInst *AI, const AllocaInfo &Info, 448 LargeBlockInfo &LBI, 449 AliasSetTracker *AST) { 450 // The trickiest case to handle is when we have large blocks. Because of this, 451 // this code is optimized assuming that large blocks happen. This does not 452 // significantly pessimize the small block case. This uses LargeBlockInfo to 453 // make it efficient to get the index of various operations in the block. 454 455 // Walk the use-def list of the alloca, getting the locations of all stores. 456 typedef SmallVector<std::pair<unsigned, StoreInst *>, 64> StoresByIndexTy; 457 StoresByIndexTy StoresByIndex; 458 459 for (Value::use_iterator UI = AI->use_begin(), E = AI->use_end(); UI != E; 460 ++UI) 461 if (StoreInst *SI = dyn_cast<StoreInst>(*UI)) 462 StoresByIndex.push_back(std::make_pair(LBI.getInstructionIndex(SI), SI)); 463 464 // Sort the stores by their index, making it efficient to do a lookup with a 465 // binary search. 466 std::sort(StoresByIndex.begin(), StoresByIndex.end(), less_first()); 467 468 // Walk all of the loads from this alloca, replacing them with the nearest 469 // store above them, if any. 470 for (Value::use_iterator UI = AI->use_begin(), E = AI->use_end(); UI != E;) { 471 LoadInst *LI = dyn_cast<LoadInst>(*UI++); 472 if (!LI) 473 continue; 474 475 unsigned LoadIdx = LBI.getInstructionIndex(LI); 476 477 // Find the nearest store that has a lower index than this load. 478 StoresByIndexTy::iterator I = 479 std::lower_bound(StoresByIndex.begin(), StoresByIndex.end(), 480 std::make_pair(LoadIdx, static_cast<StoreInst *>(0)), 481 less_first()); 482 483 if (I == StoresByIndex.begin()) 484 // If there is no store before this load, the load takes the undef value. 485 LI->replaceAllUsesWith(UndefValue::get(LI->getType())); 486 else 487 // Otherwise, there was a store before this load, the load takes its value. 488 LI->replaceAllUsesWith(llvm::prior(I)->second->getOperand(0)); 489 490 if (AST && LI->getType()->isPointerTy()) 491 AST->deleteValue(LI); 492 LI->eraseFromParent(); 493 LBI.deleteValue(LI); 494 } 495 496 // Remove the (now dead) stores and alloca. 497 while (!AI->use_empty()) { 498 StoreInst *SI = cast<StoreInst>(AI->use_back()); 499 // Record debuginfo for the store before removing it. 500 if (DbgDeclareInst *DDI = Info.DbgDeclare) { 501 DIBuilder DIB(*AI->getParent()->getParent()->getParent()); 502 ConvertDebugDeclareToDebugValue(DDI, SI, DIB); 503 } 504 SI->eraseFromParent(); 505 LBI.deleteValue(SI); 506 } 507 508 if (AST) 509 AST->deleteValue(AI); 510 AI->eraseFromParent(); 511 LBI.deleteValue(AI); 512 513 // The alloca's debuginfo can be removed as well. 514 if (DbgDeclareInst *DDI = Info.DbgDeclare) { 515 DDI->eraseFromParent(); 516 LBI.deleteValue(DDI); 517 } 518 519 ++NumLocalPromoted; 520} 521 522void PromoteMem2Reg::run() { 523 Function &F = *DT.getRoot()->getParent(); 524 525 if (AST) 526 PointerAllocaValues.resize(Allocas.size()); 527 AllocaDbgDeclares.resize(Allocas.size()); 528 529 AllocaInfo Info; 530 LargeBlockInfo LBI; 531 532 for (unsigned AllocaNum = 0; AllocaNum != Allocas.size(); ++AllocaNum) { 533 AllocaInst *AI = Allocas[AllocaNum]; 534 535 assert(isAllocaPromotable(AI) && "Cannot promote non-promotable alloca!"); 536 assert(AI->getParent()->getParent() == &F && 537 "All allocas should be in the same function, which is same as DF!"); 538 539 removeLifetimeIntrinsicUsers(AI); 540 541 if (AI->use_empty()) { 542 // If there are no uses of the alloca, just delete it now. 543 if (AST) 544 AST->deleteValue(AI); 545 AI->eraseFromParent(); 546 547 // Remove the alloca from the Allocas list, since it has been processed 548 RemoveFromAllocasList(AllocaNum); 549 ++NumDeadAlloca; 550 continue; 551 } 552 553 // Calculate the set of read and write-locations for each alloca. This is 554 // analogous to finding the 'uses' and 'definitions' of each variable. 555 Info.AnalyzeAlloca(AI); 556 557 // If there is only a single store to this value, replace any loads of 558 // it that are directly dominated by the definition with the value stored. 559 if (Info.DefiningBlocks.size() == 1) { 560 if (rewriteSingleStoreAlloca(AI, Info, LBI, DT, AST)) { 561 // The alloca has been processed, move on. 562 RemoveFromAllocasList(AllocaNum); 563 ++NumSingleStore; 564 continue; 565 } 566 } 567 568 // If the alloca is only read and written in one basic block, just perform a 569 // linear sweep over the block to eliminate it. 570 if (Info.OnlyUsedInOneBlock) { 571 promoteSingleBlockAlloca(AI, Info, LBI, AST); 572 573 // The alloca has been processed, move on. 574 RemoveFromAllocasList(AllocaNum); 575 continue; 576 } 577 578 // If we haven't computed dominator tree levels, do so now. 579 if (DomLevels.empty()) { 580 SmallVector<DomTreeNode *, 32> Worklist; 581 582 DomTreeNode *Root = DT.getRootNode(); 583 DomLevels[Root] = 0; 584 Worklist.push_back(Root); 585 586 while (!Worklist.empty()) { 587 DomTreeNode *Node = Worklist.pop_back_val(); 588 unsigned ChildLevel = DomLevels[Node] + 1; 589 for (DomTreeNode::iterator CI = Node->begin(), CE = Node->end(); 590 CI != CE; ++CI) { 591 DomLevels[*CI] = ChildLevel; 592 Worklist.push_back(*CI); 593 } 594 } 595 } 596 597 // If we haven't computed a numbering for the BB's in the function, do so 598 // now. 599 if (BBNumbers.empty()) { 600 unsigned ID = 0; 601 for (Function::iterator I = F.begin(), E = F.end(); I != E; ++I) 602 BBNumbers[I] = ID++; 603 } 604 605 // If we have an AST to keep updated, remember some pointer value that is 606 // stored into the alloca. 607 if (AST) 608 PointerAllocaValues[AllocaNum] = Info.AllocaPointerVal; 609 610 // Remember the dbg.declare intrinsic describing this alloca, if any. 611 if (Info.DbgDeclare) 612 AllocaDbgDeclares[AllocaNum] = Info.DbgDeclare; 613 614 // Keep the reverse mapping of the 'Allocas' array for the rename pass. 615 AllocaLookup[Allocas[AllocaNum]] = AllocaNum; 616 617 // At this point, we're committed to promoting the alloca using IDF's, and 618 // the standard SSA construction algorithm. Determine which blocks need PHI 619 // nodes and see if we can optimize out some work by avoiding insertion of 620 // dead phi nodes. 621 DetermineInsertionPoint(AI, AllocaNum, Info); 622 } 623 624 if (Allocas.empty()) 625 return; // All of the allocas must have been trivial! 626 627 LBI.clear(); 628 629 // Set the incoming values for the basic block to be null values for all of 630 // the alloca's. We do this in case there is a load of a value that has not 631 // been stored yet. In this case, it will get this null value. 632 // 633 RenamePassData::ValVector Values(Allocas.size()); 634 for (unsigned i = 0, e = Allocas.size(); i != e; ++i) 635 Values[i] = UndefValue::get(Allocas[i]->getAllocatedType()); 636 637 // Walks all basic blocks in the function performing the SSA rename algorithm 638 // and inserting the phi nodes we marked as necessary 639 // 640 std::vector<RenamePassData> RenamePassWorkList; 641 RenamePassWorkList.push_back(RenamePassData(F.begin(), 0, Values)); 642 do { 643 RenamePassData RPD; 644 RPD.swap(RenamePassWorkList.back()); 645 RenamePassWorkList.pop_back(); 646 // RenamePass may add new worklist entries. 647 RenamePass(RPD.BB, RPD.Pred, RPD.Values, RenamePassWorkList); 648 } while (!RenamePassWorkList.empty()); 649 650 // The renamer uses the Visited set to avoid infinite loops. Clear it now. 651 Visited.clear(); 652 653 // Remove the allocas themselves from the function. 654 for (unsigned i = 0, e = Allocas.size(); i != e; ++i) { 655 Instruction *A = Allocas[i]; 656 657 // If there are any uses of the alloca instructions left, they must be in 658 // unreachable basic blocks that were not processed by walking the dominator 659 // tree. Just delete the users now. 660 if (!A->use_empty()) 661 A->replaceAllUsesWith(UndefValue::get(A->getType())); 662 if (AST) 663 AST->deleteValue(A); 664 A->eraseFromParent(); 665 } 666 667 // Remove alloca's dbg.declare instrinsics from the function. 668 for (unsigned i = 0, e = AllocaDbgDeclares.size(); i != e; ++i) 669 if (DbgDeclareInst *DDI = AllocaDbgDeclares[i]) 670 DDI->eraseFromParent(); 671 672 // Loop over all of the PHI nodes and see if there are any that we can get 673 // rid of because they merge all of the same incoming values. This can 674 // happen due to undef values coming into the PHI nodes. This process is 675 // iterative, because eliminating one PHI node can cause others to be removed. 676 bool EliminatedAPHI = true; 677 while (EliminatedAPHI) { 678 EliminatedAPHI = false; 679 680 // Iterating over NewPhiNodes is deterministic, so it is safe to try to 681 // simplify and RAUW them as we go. If it was not, we could add uses to 682 // the values we replace with in a non deterministic order, thus creating 683 // non deterministic def->use chains. 684 for (DenseMap<std::pair<unsigned, unsigned>, PHINode *>::iterator 685 I = NewPhiNodes.begin(), 686 E = NewPhiNodes.end(); 687 I != E;) { 688 PHINode *PN = I->second; 689 690 // If this PHI node merges one value and/or undefs, get the value. 691 if (Value *V = SimplifyInstruction(PN, 0, 0, &DT)) { 692 if (AST && PN->getType()->isPointerTy()) 693 AST->deleteValue(PN); 694 PN->replaceAllUsesWith(V); 695 PN->eraseFromParent(); 696 NewPhiNodes.erase(I++); 697 EliminatedAPHI = true; 698 continue; 699 } 700 ++I; 701 } 702 } 703 704 // At this point, the renamer has added entries to PHI nodes for all reachable 705 // code. Unfortunately, there may be unreachable blocks which the renamer 706 // hasn't traversed. If this is the case, the PHI nodes may not 707 // have incoming values for all predecessors. Loop over all PHI nodes we have 708 // created, inserting undef values if they are missing any incoming values. 709 // 710 for (DenseMap<std::pair<unsigned, unsigned>, PHINode *>::iterator 711 I = NewPhiNodes.begin(), 712 E = NewPhiNodes.end(); 713 I != E; ++I) { 714 // We want to do this once per basic block. As such, only process a block 715 // when we find the PHI that is the first entry in the block. 716 PHINode *SomePHI = I->second; 717 BasicBlock *BB = SomePHI->getParent(); 718 if (&BB->front() != SomePHI) 719 continue; 720 721 // Only do work here if there the PHI nodes are missing incoming values. We 722 // know that all PHI nodes that were inserted in a block will have the same 723 // number of incoming values, so we can just check any of them. 724 if (SomePHI->getNumIncomingValues() == getNumPreds(BB)) 725 continue; 726 727 // Get the preds for BB. 728 SmallVector<BasicBlock *, 16> Preds(pred_begin(BB), pred_end(BB)); 729 730 // Ok, now we know that all of the PHI nodes are missing entries for some 731 // basic blocks. Start by sorting the incoming predecessors for efficient 732 // access. 733 std::sort(Preds.begin(), Preds.end()); 734 735 // Now we loop through all BB's which have entries in SomePHI and remove 736 // them from the Preds list. 737 for (unsigned i = 0, e = SomePHI->getNumIncomingValues(); i != e; ++i) { 738 // Do a log(n) search of the Preds list for the entry we want. 739 SmallVectorImpl<BasicBlock *>::iterator EntIt = std::lower_bound( 740 Preds.begin(), Preds.end(), SomePHI->getIncomingBlock(i)); 741 assert(EntIt != Preds.end() && *EntIt == SomePHI->getIncomingBlock(i) && 742 "PHI node has entry for a block which is not a predecessor!"); 743 744 // Remove the entry 745 Preds.erase(EntIt); 746 } 747 748 // At this point, the blocks left in the preds list must have dummy 749 // entries inserted into every PHI nodes for the block. Update all the phi 750 // nodes in this block that we are inserting (there could be phis before 751 // mem2reg runs). 752 unsigned NumBadPreds = SomePHI->getNumIncomingValues(); 753 BasicBlock::iterator BBI = BB->begin(); 754 while ((SomePHI = dyn_cast<PHINode>(BBI++)) && 755 SomePHI->getNumIncomingValues() == NumBadPreds) { 756 Value *UndefVal = UndefValue::get(SomePHI->getType()); 757 for (unsigned pred = 0, e = Preds.size(); pred != e; ++pred) 758 SomePHI->addIncoming(UndefVal, Preds[pred]); 759 } 760 } 761 762 NewPhiNodes.clear(); 763} 764 765/// \brief Determine which blocks the value is live in. 766/// 767/// These are blocks which lead to uses. Knowing this allows us to avoid 768/// inserting PHI nodes into blocks which don't lead to uses (thus, the 769/// inserted phi nodes would be dead). 770void PromoteMem2Reg::ComputeLiveInBlocks( 771 AllocaInst *AI, AllocaInfo &Info, 772 const SmallPtrSet<BasicBlock *, 32> &DefBlocks, 773 SmallPtrSet<BasicBlock *, 32> &LiveInBlocks) { 774 775 // To determine liveness, we must iterate through the predecessors of blocks 776 // where the def is live. Blocks are added to the worklist if we need to 777 // check their predecessors. Start with all the using blocks. 778 SmallVector<BasicBlock *, 64> LiveInBlockWorklist(Info.UsingBlocks.begin(), 779 Info.UsingBlocks.end()); 780 781 // If any of the using blocks is also a definition block, check to see if the 782 // definition occurs before or after the use. If it happens before the use, 783 // the value isn't really live-in. 784 for (unsigned i = 0, e = LiveInBlockWorklist.size(); i != e; ++i) { 785 BasicBlock *BB = LiveInBlockWorklist[i]; 786 if (!DefBlocks.count(BB)) 787 continue; 788 789 // Okay, this is a block that both uses and defines the value. If the first 790 // reference to the alloca is a def (store), then we know it isn't live-in. 791 for (BasicBlock::iterator I = BB->begin();; ++I) { 792 if (StoreInst *SI = dyn_cast<StoreInst>(I)) { 793 if (SI->getOperand(1) != AI) 794 continue; 795 796 // We found a store to the alloca before a load. The alloca is not 797 // actually live-in here. 798 LiveInBlockWorklist[i] = LiveInBlockWorklist.back(); 799 LiveInBlockWorklist.pop_back(); 800 --i, --e; 801 break; 802 } 803 804 if (LoadInst *LI = dyn_cast<LoadInst>(I)) { 805 if (LI->getOperand(0) != AI) 806 continue; 807 808 // Okay, we found a load before a store to the alloca. It is actually 809 // live into this block. 810 break; 811 } 812 } 813 } 814 815 // Now that we have a set of blocks where the phi is live-in, recursively add 816 // their predecessors until we find the full region the value is live. 817 while (!LiveInBlockWorklist.empty()) { 818 BasicBlock *BB = LiveInBlockWorklist.pop_back_val(); 819 820 // The block really is live in here, insert it into the set. If already in 821 // the set, then it has already been processed. 822 if (!LiveInBlocks.insert(BB)) 823 continue; 824 825 // Since the value is live into BB, it is either defined in a predecessor or 826 // live into it to. Add the preds to the worklist unless they are a 827 // defining block. 828 for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) { 829 BasicBlock *P = *PI; 830 831 // The value is not live into a predecessor if it defines the value. 832 if (DefBlocks.count(P)) 833 continue; 834 835 // Otherwise it is, add to the worklist. 836 LiveInBlockWorklist.push_back(P); 837 } 838 } 839} 840 841/// At this point, we're committed to promoting the alloca using IDF's, and the 842/// standard SSA construction algorithm. Determine which blocks need phi nodes 843/// and see if we can optimize out some work by avoiding insertion of dead phi 844/// nodes. 845void PromoteMem2Reg::DetermineInsertionPoint(AllocaInst *AI, unsigned AllocaNum, 846 AllocaInfo &Info) { 847 // Unique the set of defining blocks for efficient lookup. 848 SmallPtrSet<BasicBlock *, 32> DefBlocks; 849 DefBlocks.insert(Info.DefiningBlocks.begin(), Info.DefiningBlocks.end()); 850 851 // Determine which blocks the value is live in. These are blocks which lead 852 // to uses. 853 SmallPtrSet<BasicBlock *, 32> LiveInBlocks; 854 ComputeLiveInBlocks(AI, Info, DefBlocks, LiveInBlocks); 855 856 // Use a priority queue keyed on dominator tree level so that inserted nodes 857 // are handled from the bottom of the dominator tree upwards. 858 typedef std::pair<DomTreeNode *, unsigned> DomTreeNodePair; 859 typedef std::priority_queue<DomTreeNodePair, SmallVector<DomTreeNodePair, 32>, 860 less_second> IDFPriorityQueue; 861 IDFPriorityQueue PQ; 862 863 for (SmallPtrSet<BasicBlock *, 32>::const_iterator I = DefBlocks.begin(), 864 E = DefBlocks.end(); 865 I != E; ++I) { 866 if (DomTreeNode *Node = DT.getNode(*I)) 867 PQ.push(std::make_pair(Node, DomLevels[Node])); 868 } 869 870 SmallVector<std::pair<unsigned, BasicBlock *>, 32> DFBlocks; 871 SmallPtrSet<DomTreeNode *, 32> Visited; 872 SmallVector<DomTreeNode *, 32> Worklist; 873 while (!PQ.empty()) { 874 DomTreeNodePair RootPair = PQ.top(); 875 PQ.pop(); 876 DomTreeNode *Root = RootPair.first; 877 unsigned RootLevel = RootPair.second; 878 879 // Walk all dominator tree children of Root, inspecting their CFG edges with 880 // targets elsewhere on the dominator tree. Only targets whose level is at 881 // most Root's level are added to the iterated dominance frontier of the 882 // definition set. 883 884 Worklist.clear(); 885 Worklist.push_back(Root); 886 887 while (!Worklist.empty()) { 888 DomTreeNode *Node = Worklist.pop_back_val(); 889 BasicBlock *BB = Node->getBlock(); 890 891 for (succ_iterator SI = succ_begin(BB), SE = succ_end(BB); SI != SE; 892 ++SI) { 893 DomTreeNode *SuccNode = DT.getNode(*SI); 894 895 // Quickly skip all CFG edges that are also dominator tree edges instead 896 // of catching them below. 897 if (SuccNode->getIDom() == Node) 898 continue; 899 900 unsigned SuccLevel = DomLevels[SuccNode]; 901 if (SuccLevel > RootLevel) 902 continue; 903 904 if (!Visited.insert(SuccNode)) 905 continue; 906 907 BasicBlock *SuccBB = SuccNode->getBlock(); 908 if (!LiveInBlocks.count(SuccBB)) 909 continue; 910 911 DFBlocks.push_back(std::make_pair(BBNumbers[SuccBB], SuccBB)); 912 if (!DefBlocks.count(SuccBB)) 913 PQ.push(std::make_pair(SuccNode, SuccLevel)); 914 } 915 916 for (DomTreeNode::iterator CI = Node->begin(), CE = Node->end(); CI != CE; 917 ++CI) { 918 if (!Visited.count(*CI)) 919 Worklist.push_back(*CI); 920 } 921 } 922 } 923 924 if (DFBlocks.size() > 1) 925 std::sort(DFBlocks.begin(), DFBlocks.end()); 926 927 unsigned CurrentVersion = 0; 928 for (unsigned i = 0, e = DFBlocks.size(); i != e; ++i) 929 QueuePhiNode(DFBlocks[i].second, AllocaNum, CurrentVersion); 930} 931 932/// \brief Queue a phi-node to be added to a basic-block for a specific Alloca. 933/// 934/// Returns true if there wasn't already a phi-node for that variable 935bool PromoteMem2Reg::QueuePhiNode(BasicBlock *BB, unsigned AllocaNo, 936 unsigned &Version) { 937 // Look up the basic-block in question. 938 PHINode *&PN = NewPhiNodes[std::make_pair(BBNumbers[BB], AllocaNo)]; 939 940 // If the BB already has a phi node added for the i'th alloca then we're done! 941 if (PN) 942 return false; 943 944 // Create a PhiNode using the dereferenced type... and add the phi-node to the 945 // BasicBlock. 946 PN = PHINode::Create(Allocas[AllocaNo]->getAllocatedType(), getNumPreds(BB), 947 Allocas[AllocaNo]->getName() + "." + Twine(Version++), 948 BB->begin()); 949 ++NumPHIInsert; 950 PhiToAllocaMap[PN] = AllocaNo; 951 952 if (AST && PN->getType()->isPointerTy()) 953 AST->copyValue(PointerAllocaValues[AllocaNo], PN); 954 955 return true; 956} 957 958/// \brief Recursively traverse the CFG of the function, renaming loads and 959/// stores to the allocas which we are promoting. 960/// 961/// IncomingVals indicates what value each Alloca contains on exit from the 962/// predecessor block Pred. 963void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred, 964 RenamePassData::ValVector &IncomingVals, 965 std::vector<RenamePassData> &Worklist) { 966NextIteration: 967 // If we are inserting any phi nodes into this BB, they will already be in the 968 // block. 969 if (PHINode *APN = dyn_cast<PHINode>(BB->begin())) { 970 // If we have PHI nodes to update, compute the number of edges from Pred to 971 // BB. 972 if (PhiToAllocaMap.count(APN)) { 973 // We want to be able to distinguish between PHI nodes being inserted by 974 // this invocation of mem2reg from those phi nodes that already existed in 975 // the IR before mem2reg was run. We determine that APN is being inserted 976 // because it is missing incoming edges. All other PHI nodes being 977 // inserted by this pass of mem2reg will have the same number of incoming 978 // operands so far. Remember this count. 979 unsigned NewPHINumOperands = APN->getNumOperands(); 980 981 unsigned NumEdges = std::count(succ_begin(Pred), succ_end(Pred), BB); 982 assert(NumEdges && "Must be at least one edge from Pred to BB!"); 983 984 // Add entries for all the phis. 985 BasicBlock::iterator PNI = BB->begin(); 986 do { 987 unsigned AllocaNo = PhiToAllocaMap[APN]; 988 989 // Add N incoming values to the PHI node. 990 for (unsigned i = 0; i != NumEdges; ++i) 991 APN->addIncoming(IncomingVals[AllocaNo], Pred); 992 993 // The currently active variable for this block is now the PHI. 994 IncomingVals[AllocaNo] = APN; 995 996 // Get the next phi node. 997 ++PNI; 998 APN = dyn_cast<PHINode>(PNI); 999 if (APN == 0) 1000 break; 1001 1002 // Verify that it is missing entries. If not, it is not being inserted 1003 // by this mem2reg invocation so we want to ignore it. 1004 } while (APN->getNumOperands() == NewPHINumOperands); 1005 } 1006 } 1007 1008 // Don't revisit blocks. 1009 if (!Visited.insert(BB)) 1010 return; 1011 1012 for (BasicBlock::iterator II = BB->begin(); !isa<TerminatorInst>(II);) { 1013 Instruction *I = II++; // get the instruction, increment iterator 1014 1015 if (LoadInst *LI = dyn_cast<LoadInst>(I)) { 1016 AllocaInst *Src = dyn_cast<AllocaInst>(LI->getPointerOperand()); 1017 if (!Src) 1018 continue; 1019 1020 DenseMap<AllocaInst *, unsigned>::iterator AI = AllocaLookup.find(Src); 1021 if (AI == AllocaLookup.end()) 1022 continue; 1023 1024 Value *V = IncomingVals[AI->second]; 1025 1026 // Anything using the load now uses the current value. 1027 LI->replaceAllUsesWith(V); 1028 if (AST && LI->getType()->isPointerTy()) 1029 AST->deleteValue(LI); 1030 BB->getInstList().erase(LI); 1031 } else if (StoreInst *SI = dyn_cast<StoreInst>(I)) { 1032 // Delete this instruction and mark the name as the current holder of the 1033 // value 1034 AllocaInst *Dest = dyn_cast<AllocaInst>(SI->getPointerOperand()); 1035 if (!Dest) 1036 continue; 1037 1038 DenseMap<AllocaInst *, unsigned>::iterator ai = AllocaLookup.find(Dest); 1039 if (ai == AllocaLookup.end()) 1040 continue; 1041 1042 // what value were we writing? 1043 IncomingVals[ai->second] = SI->getOperand(0); 1044 // Record debuginfo for the store before removing it. 1045 if (DbgDeclareInst *DDI = AllocaDbgDeclares[ai->second]) 1046 ConvertDebugDeclareToDebugValue(DDI, SI, DIB); 1047 BB->getInstList().erase(SI); 1048 } 1049 } 1050 1051 // 'Recurse' to our successors. 1052 succ_iterator I = succ_begin(BB), E = succ_end(BB); 1053 if (I == E) 1054 return; 1055 1056 // Keep track of the successors so we don't visit the same successor twice 1057 SmallPtrSet<BasicBlock *, 8> VisitedSuccs; 1058 1059 // Handle the first successor without using the worklist. 1060 VisitedSuccs.insert(*I); 1061 Pred = BB; 1062 BB = *I; 1063 ++I; 1064 1065 for (; I != E; ++I) 1066 if (VisitedSuccs.insert(*I)) 1067 Worklist.push_back(RenamePassData(*I, Pred, IncomingVals)); 1068 1069 goto NextIteration; 1070} 1071 1072void llvm::PromoteMemToReg(ArrayRef<AllocaInst *> Allocas, DominatorTree &DT, 1073 AliasSetTracker *AST) { 1074 // If there is nothing to do, bail out... 1075 if (Allocas.empty()) 1076 return; 1077 1078 PromoteMem2Reg(Allocas, DT, AST).run(); 1079} 1080