1/*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28/*
29 * @OSF_COPYRIGHT@
30 */
31/*
32 * Mach Operating System
33 * Copyright (c) 1992-1989 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
49 *  School of Computer Science
50 *  Carnegie Mellon University
51 *  Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56/*
57 */
58
59#ifndef	_I386_FP_SAVE_H_
60#define	_I386_FP_SAVE_H_
61
62#ifdef  MACH_KERNEL_PRIVATE
63
64
65struct 	x86_fx_thread_state {
66	unsigned short  fx_control;     /* control */
67	unsigned short  fx_status;      /* status */
68	unsigned char  	fx_tag;         /* register tags */
69	unsigned char	fx_bbz1;	/* better be zero when calling fxrtstor */
70	unsigned short  fx_opcode;
71	unsigned int    fx_eip;         /* eip  instruction */
72	unsigned short  fx_cs;          /* cs instruction */
73	unsigned short  fx_bbz2;	/* better be zero when calling fxrtstor */
74	unsigned int    fx_dp;          /* data address */
75	unsigned short  fx_ds;          /* data segment */
76	unsigned short  fx_bbz3;	/* better be zero when calling fxrtstor */
77	unsigned int  	fx_MXCSR;
78	unsigned int  	fx_MXCSR_MASK;
79	unsigned short  fx_reg_word[8][8];      /* STx/MMx registers */
80	unsigned short  fx_XMM_reg[8][16];	/* XMM0-XMM15 on 64 bit processors */
81                                                /* XMM0-XMM7  on 32 bit processors... unused storage reserved */
82
83	unsigned char 	fx_reserved[16*5];	/* reserved by intel for future
84						 * expansion */
85	unsigned int	fp_valid;
86	unsigned int	fp_save_layout;
87	unsigned char	fx_pad[8];
88}__attribute__ ((packed));
89
90struct x86_avx_thread_state {
91	unsigned short  fx_control;     /* control */
92	unsigned short  fx_status;      /* status */
93	unsigned char  	fx_tag;         /* register tags */
94	unsigned char	fx_bbz1;	/* reserved zero */
95	unsigned short  fx_opcode;
96	unsigned int    fx_eip;         /* eip  instruction */
97	unsigned short  fx_cs;          /* cs instruction */
98	unsigned short  fx_bbz2;	/* reserved zero */
99	unsigned int    fx_dp;          /* data address */
100	unsigned short  fx_ds;          /* data segment */
101	unsigned short  fx_bbz3;	/* reserved zero */
102	unsigned int  	fx_MXCSR;
103	unsigned int  	fx_MXCSR_MASK;
104	unsigned short  fx_reg_word[8][8];      /* STx/MMx registers */
105	unsigned short  fx_XMM_reg[8][16];	/* XMM0-XMM15 on 64 bit processors */
106                                                /* XMM0-XMM7  on 32 bit processors... unused storage reserved */
107	unsigned char 	fx_reserved[16*5];	/* reserved */
108	unsigned int	fp_valid;
109	unsigned int	fp_save_layout;
110	unsigned char	fx_pad[8];
111
112	struct	xsave_header {			/* Offset 512, xsave header */
113		uint64_t xsbv;
114		char	xhrsvd[56];
115	}_xh;
116
117	unsigned int	x_YMMH_reg[4][16];	/* Offset 576, high YMMs*/
118}__attribute__ ((packed));
119
120#endif /* MACH_KERNEL_PRIVATE */
121/*
122 * Control register
123 */
124#define	FPC_IE		0x0001		/* enable invalid operation
125					   exception */
126#define FPC_IM		FPC_IE
127#define	FPC_DE		0x0002		/* enable denormalized operation
128					   exception */
129#define FPC_DM		FPC_DE
130#define	FPC_ZE		0x0004		/* enable zero-divide exception */
131#define FPC_ZM		FPC_ZE
132#define	FPC_OE		0x0008		/* enable overflow exception */
133#define FPC_OM		FPC_OE
134#define	FPC_UE		0x0010		/* enable underflow exception */
135#define	FPC_PE		0x0020		/* enable precision exception */
136#define	FPC_PC		0x0300		/* precision control: */
137#define	FPC_PC_24	0x0000			/* 24 bits */
138#define	FPC_PC_53	0x0200			/* 53 bits */
139#define	FPC_PC_64	0x0300			/* 64 bits */
140#define	FPC_RC		0x0c00		/* rounding control: */
141#define	FPC_RC_RN	0x0000			/* round to nearest or even */
142#define	FPC_RC_RD	0x0400			/* round down */
143#define	FPC_RC_RU	0x0800			/* round up */
144#define	FPC_RC_CHOP	0x0c00			/* chop */
145#define	FPC_IC		0x1000		/* infinity control (obsolete) */
146#define	FPC_IC_PROJ	0x0000			/* projective infinity */
147#define	FPC_IC_AFF	0x1000			/* affine infinity (std) */
148
149/*
150 * Status register
151 */
152#define	FPS_IE		0x0001		/* invalid operation */
153#define	FPS_DE		0x0002		/* denormalized operand */
154#define	FPS_ZE		0x0004		/* divide by zero */
155#define	FPS_OE		0x0008		/* overflow */
156#define	FPS_UE		0x0010		/* underflow */
157#define	FPS_PE		0x0020		/* precision */
158#define	FPS_SF		0x0040		/* stack flag */
159#define	FPS_ES		0x0080		/* error summary */
160#define	FPS_C0		0x0100		/* condition code bit 0 */
161#define	FPS_C1		0x0200		/* condition code bit 1 */
162#define	FPS_C2		0x0400		/* condition code bit 2 */
163#define	FPS_TOS		0x3800		/* top-of-stack pointer */
164#define	FPS_TOS_SHIFT	11
165#define	FPS_C3		0x4000		/* condition code bit 3 */
166#define	FPS_BUSY	0x8000		/* FPU busy */
167
168/*
169 * Kind of floating-point support provided by kernel.
170 */
171#define	FP_NO		0		/* no floating point */
172#define	FP_SOFT		1		/* software FP emulator */
173#define	FP_287		2		/* 80287 */
174#define	FP_387		3		/* 80387 or 80486 */
175#define FP_FXSR		4		/* Fast save/restore SIMD Extension */
176
177#endif	/* _I386_FP_SAVE_H_ */
178