1/* 2 * Copyright 2013, winocm. <winocm@icloud.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without modification, 6 * are permitted provided that the following conditions are met: 7 * 8 * Redistributions of source code must retain the above copyright notice, this 9 * list of conditions and the following disclaimer. 10 * 11 * Redistributions in binary form must reproduce the above copyright notice, this 12 * list of conditions and the following disclaimer in the documentation and/or 13 * other materials provided with the distribution. 14 * 15 * If you are going to use this software in any form that does not involve 16 * releasing the source to this project or improving it, let me know beforehand. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29/* 30 * ARM interrupt vector table 31 */ 32 33#include <arm/arch.h> 34#include <assym.s> 35 36/* 37 * PLEASE DO NOT MESS WITH THE STRUCTURE OF THIS FILE. IT IS MAPPED 38 * TO HIGH MEMORY AND IF YOU MESS ANYTHING UP, EXCEPTION HANDLERS 39 * WILL NOT WORK. PLEASE DO NOT TOUCH THE ALIGNMENT OR ANYTHING. 40 * 41 * IF YOU ARE INTENT ON CHANGING THE lowGloVerification STRING 42 * ALSO LOOK AT arm_vm_init.c. THANK YOU FOR LISTENING. 43 */ 44 45.align 12 46.text 47.code 32 48/* 49 * I honestly wish llvm supported the "ldr rX, =var" syntax. 50 */ 51.globl _ExceptionVectorsBase 52_ExceptionVectorsBase: 53 ldr pc, [pc, #24] // reset 54 ldr pc, [pc, #24] // undef 55 ldr pc, [pc, #24] // swi 56 ldr pc, [pc, #24] // prefetch 57 ldr pc, [pc, #24] // data abort 58 ldr pc, [pc, #24] // dataexc 59 ldr pc, [pc, #24] // irq 60 mov pc, r9 61 62_vectorTable: 63 .long _fleh_reset 64 .long _fleh_undef 65 .long _fleh_swi 66 .long _fleh_prefabt 67 .long _fleh_dataabt 68 .long _fleh_dataexc 69 .long _fleh_irq 70 .long 0x0 71 72lowGloVerification: 73 .asciz "Scolecit" 74 75.org 4096 76 77