1/* cpufunc.h,v 1.40.22.4 2007/11/08 10:59:33 matt Exp */ 2 3/* 4 * Copyright (c) 1997 Mark Brinicombe. 5 * Copyright (c) 1997 Causality Limited 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Causality Limited. 19 * 4. The name of Causality Limited may not be used to endorse or promote 20 * products derived from this software without specific prior written 21 * permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY CAUSALITY LIMITED ``AS IS'' AND ANY EXPRESS 24 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL CAUSALITY LIMITED BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * RiscBSD kernel project 36 * 37 * cpufunc.h 38 * 39 * Prototypes for cpu, mmu and tlb related functions. 40 */ 41 42#ifndef _ARM_CPUFUNC_H_ 43#define _ARM_CPUFUNC_H_ 44 45typedef int bool, vsize_t; 46 47extern void arm_cpu_sleep(int); 48extern void arm_setttb(u_int, bool); 49extern void arm_context_switch(u_int); 50extern void arm_set_context_id(u_int); 51extern void arm_tlb_flushID_SE(u_int); 52extern void arm_tlb_flushID_ASID(u_int); 53extern void arm_tlb_flushID_RANGE(u_int, u_int); 54extern void arm_tlb_flushID(void); 55extern void arm_drain_writebuf(void); 56 57extern void arm_icache_sync_range(vaddr_t, vsize_t); 58extern void arm_icache_sync_all(void); 59extern void arm_dcache_wb_range(vaddr_t, vsize_t); 60extern void arm_dcache_wbinv_range(vaddr_t, vsize_t); 61extern void arm_dcache_inv_range(vaddr_t, vsize_t); 62extern void arm_idcache_wbinv_range(vaddr_t, vsize_t); 63extern void arm_idcache_wbinv_all(void); 64extern void arm_dcache_wbinv_all(void); 65 66extern void arm_setup(char *string); 67 68#endif /* !_ARM_CPUFUNC_H_ */