1/* ********************************************************************* 2 * Broadcom Common Firmware Environment (CFE) 3 * 4 * HSP UI Commands File: ui_hspcmds.c 5 * 6 * This file contains BCM1480 HSP console command extensions 7 * 8 * Code was leveraged from 'bcm1480_pci_machdep.c' and 'ui_pmcmd.c' 9 * 10 * Author: Kean Hurley 11 * 12 ********************************************************************* 13 * 14 * Copyright 2000,2001,2002,2003,2004,2005,2006 15 * Broadcom Corporation. All rights reserved. 16 * 17 * This software is furnished under license and may be used and 18 * copied only in accordance with the following terms and 19 * conditions. Subject to these conditions, you may download, 20 * copy, install, use, modify and distribute modified or unmodified 21 * copies of this software in source and/or binary form. No title 22 * or ownership is transferred hereby. 23 * 24 * 1) Any source code used, modified or distributed must reproduce 25 * and retain this copyright notice and list of conditions 26 * as they appear in the source file. 27 * 28 * 2) No right is granted to use any trade name, trademark, or 29 * logo of Broadcom Corporation. The "Broadcom Corporation" 30 * name may not be used to endorse or promote products derived 31 * from this software without the prior written permission of 32 * Broadcom Corporation. 33 * 34 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR 35 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED 36 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 37 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 38 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 39 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, 40 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 41 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 42 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 43 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 44 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 45 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 46 * THE POSSIBILITY OF SUCH DAMAGE. 47 ********************************************************************* */ 48 49 50#ifndef DOXYGEN_IGNORE_EXTERNAL 51//---------------------------------------------------------- 52/** 53 54@file ui_hspcmds.c 55 56 This file contains BCM1480 HSP console command extensions 57 58 @todo 59 60 @author Kean Hurley 61 62 Copyright 2006 Broadcom, Inc. 63 64 This computer program is CONFIDENTIAL and a TRADE SECRET of BROADCOM. 65 The receipt or possession of this program does not convey 66 rights to reproduce or disclose its contents, or to manufacture, use, 67 or sell anything that it may describe, in whole or in part, without the 68 specific written consent of BROADCOM. Any reproduction of 69 this program without the express written consent of BROADCOM is a 70 violation of the copyright laws and may subject you to criminal 71 prosecution. 72 73 74 <b>History:</b> 75 76 @verbatim 77 78 Engineer Date PR Description 79 --------------------------------------------- 80 Kean Hurley 06/05/06 Creation 81 82 @endverbatim 83*/ 84//---------------------------------------------------------- 85#endif // DOXYGEN_IGNORE_EXTERNAL 86 87/*********************************************************** 88* 89* Included files 90* 91***********************************************************/ 92#include "cfe.h" 93#include "sbmips.h" 94#include "ui_command.h" 95 96#include "lib_physio.h" 97 98#include "pcivar.h" 99#include "pci_internal.h" 100#include "pcireg.h" 101#include "ldtreg.h" 102 103#include "bcm1480_regs.h" 104#include "bcm1480_hr.h" 105#include "bcm1480_ht.h" 106#include "bcm1480_hsp.h" 107#include "bcm1480_scd.h" 108 109#include "ui_bitfields.h" 110 111#include "bcm1480_hsp_utils.h" 112 113/*********************************************************** 114* 115* Global variables 116* 117***********************************************************/ 118 119/*********************************************************** 120* 121* Defined values, enumerated types, macros, typedefs 122* internal to this file 123* 124***********************************************************/ 125 126#define WRITECSR(x,y) phys_write64(x,y) 127#define READCSR(x) phys_read64(x) 128 129 130static bitfield_t spi4_txintstat[] = { 131 {M_BCM1480_HSP_TX_INT_TSTATTIMEOUT,"TSTAT_Timeout"}, 132 {M_BCM1480_HSP_TX_INT_DIP2RXERR,"DIP2_Error"}, 133 {M_BCM1480_HSP_TX_INT_SPI4RESET,"Port_Reset"}, 134 {0,NULL}}; 135 136static bitfield_t spi4_rxintstat[] = { 137 {M_BCM1480_HSP_RX_INT_PERVCERR,"per_vc_err"}, 138 {M_BCM1480_HSP_RX_INT_EOPABORT,"eop_abort"}, 139 {M_BCM1480_HSP_RX_INT_SPI4PROTOERR,"spi4_proto_err"}, 140 {M_BCM1480_HSP_RX_INT_ESTOREOVERFLOW,"estore_ovflo"}, 141 {M_BCM1480_HSP_RX_INT_ALPHATRAINERR,"alpha_train_err"}, 142 {M_BCM1480_HSP_RX_INT_DIP4ERROR,"dip4_err"}, 143 {M_BCM1480_HSP_RX_INT_HRERROR,"hr_err"}, 144 {M_BCM1480_HSP_RX_INT_INTOVERFLOW,"intrnl_ovflo"}, 145 {0,NULL}}; 146 147static bitfield_t spi4_txcalibration[] = { 148 {M_BCM1480_HSP_CAL_STARTCAL2,"StartCal|NotStartCal"}, 149 {M_BCM1480_HSP_CAL_PDTEST,"PDTest"}, 150 {M_BCM1480_HSP_CAL_CALFIN,"Cal_Finish|Cal_Inprog"}, 151 {M_BCM1480_HSP_CAL_S100M66M,"TestTXREF/2|TestTXREF/1"}, 152 {M_BCM1480_HSP_CAL_NO_CALIB,"No_Calib|Auto_Calib"}, 153 {M_BCM1480_HSP_CAL_BMODE,"BMode"}, 154 {M_BCM1480_HSP_CAL_CALSETP,"calsetp"}, 155 {M_BCM1480_HSP_CAL_CALSETN,"calsetn"}, 156 {M_BCM1480_HSP_CAL_CALPSTAT,"calpstat"}, 157 {M_BCM1480_HSP_CAL_CALNSTAT,"calnstat"}, 158 {0,NULL}}; 159 160static bitfield_t htb_status[] = { 161 {PCI_STATUS_PARITY_ERROR,"PCI_data_error(parity/crc)"}, 162 {PCI_STATUS_SYSTEM_ERROR,"PCI_system_error"}, 163 {PCI_STATUS_MASTER_ABORT,"PCI_master_abort"}, 164 {PCI_STATUS_MASTER_TARGET_ABORT,"PCI_target_abort(sent)"}, 165 {PCI_STATUS_TARGET_TARGET_ABORT,"PCI_target_abort(rcvd)"}, 166 {0,NULL}}; 167 168static bitfield_t htb_linkctrl[] = { 169 {M_BCM1480_HTB_LINKCTRL_CRCFLEN, "CRC_sync_flood_enable"}, 170 {M_BCM1480_HTB_LINKCTRL_LINKFAIL,"Link_fail"}, 171 {M_BCM1480_HTB_LINKCTRL_CRCERR,"CRC_error"}, 172 {0,NULL}}; 173 174static bitfield_t htb_linkfreqerr[] = { 175 {M_BCM1480_HTB_LINKFQERR_PROTERR,"Protocol_error"}, 176 {M_BCM1480_HTB_LINKFQERR_OVFLERR,"Overflow_error"}, 177 {M_BCM1480_HTB_LINKFQERR_EOCERR, "EOC_error"}, 178 {0,NULL}}; 179 180static bitfield_t htb_errhndl[] = { 181 {M_BCM1480_HTB_ERRHNDL_PROFLEN, "Protocol_error_sync_flood_enable"}, 182 {M_BCM1480_HTB_LINKFQERR_OVFLERR, "Overflow_error_sync_flood_enable"}, 183 {M_BCM1480_HTB_ERRHNDL_CHNFAIL,"Chain_failed_(sync_flood)_error"}, 184 {M_BCM1480_HTB_ERRHNDL_RSPERR, "Response_error"}, 185 {0,NULL}}; 186 187 188 189/*********************************************************** 190* 191* Static variables 192* 193***********************************************************/ 194// Documented 195 196 197/*********************************************************** 198* 199* Function prototypes of static functions 200* 201***********************************************************/ 202#ifndef DOXYGEN_IGNORE_ALWAYS 203static uint32_t hsp_ht_log_errors(uint32_t port); 204static uint32_t hsp_spi4_log_errors(uint32_t port); 205#endif 206 207int ui_init_hspcmds(void); 208 209/*********************************************************** 210* 211* Functions 212* 213***********************************************************/ 214 215 216static int ui_cmd_ht_show_errors(ui_cmdline_t *cmd,int argc,char *argv[]) 217{ 218 char *x; 219 uint32_t port = 0; 220 221 if ((x = cmd_getarg(cmd,0))) 222 { 223 port = atoi(x); 224 } 225 226 if (!HSP_IS_PORT_HT_MODE(port)) 227 { 228 printf("WARNING Port %d is NOT in HT mode.\n",port); 229 } 230 231 232 if ( cmd_sw_isset(cmd,"-reset") != NULL ) 233 { 234 hsp_ht_reset_errors(port); 235 } 236 237 238 if ( cmd_sw_value(cmd,"-sync_flood",&x)) 239 { 240 hsp_ht_enable_sync_flood_on_errors( port, atoi(x)); 241 } 242 243 244 hsp_ht_log_errors( port ); 245 246 return(0); 247} 248 249 250 251static int ui_cmd_spi4_show_errors(ui_cmdline_t *cmd,int argc,char *argv[]) 252{ 253 char *x; 254 uint32_t port = 0; 255 256 if ((x = cmd_getarg(cmd,0))) 257 { 258 port = atoi(x); 259 } 260 261 if (!HSP_IS_PORT_SPI4_MODE(port)) 262 { 263 printf("WARNING Port %d is NOT in SPI4 mode.\n",port); 264 } 265 266 if ( cmd_sw_isset(cmd,"-reset") != NULL ) 267 { 268 hsp_spi4_reset_errors(port); 269 } 270 271 272 hsp_spi4_log_errors( port ); 273 274 return(0); 275} 276 277 278static int ui_cmd_hsp_txram(ui_cmdline_t *cmd,int argc,char *argv[]) 279{ 280 char *x; 281 hsaddr_t port = 0,ctlreg,datareg; 282 int low,high,idx; 283 284 low = 0; high = 65535; 285 286 if ((x = cmd_getarg(cmd,0))) port = atoi(x); 287 else ui_showusage(cmd); 288 289 if ((x = cmd_getarg(cmd,1))) low = xtoi(x); 290 if ((x = cmd_getarg(cmd,2))) high = xtoi(x); 291 292 ctlreg = A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_TX_RAM_READCTL); 293 datareg = A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_TX_RAM_READWINDOW); 294 295 for (idx = low; idx <= high; idx++) { 296 WRITECSR(ctlreg,V_BCM1480_HSP_TXVIS_RAM_ADDR(idx) | 297 V_BCM1480_HSP_TXVIS_RAM(K_BCM1480_HSP_TXVIS_RAM_DRAM_128_151)); 298 printf("%04X: %016llX ",idx,READCSR(datareg)); 299 300 WRITECSR(ctlreg,V_BCM1480_HSP_TXVIS_RAM_ADDR(idx) | 301 V_BCM1480_HSP_TXVIS_RAM(K_BCM1480_HSP_TXVIS_RAM_DRAM_64_127)); 302 printf("%016llX ",READCSR(datareg)); 303 304 WRITECSR(ctlreg,V_BCM1480_HSP_TXVIS_RAM_ADDR(idx) | 305 V_BCM1480_HSP_TXVIS_RAM(K_BCM1480_HSP_TXVIS_RAM_DRAM_0_63)); 306 printf("%016llX\n",READCSR(datareg)); 307 if (console_status()) break; 308 } 309 310 return 0; 311 312} 313 314static int ui_cmd_hsp_rxram(ui_cmdline_t *cmd,int argc,char *argv[]) 315{ 316 char *x; 317 hsaddr_t port = 0,ctlreg,datareg; 318 int low,high,idx; 319 320 low = 0; high = 65535; 321 322 if ((x = cmd_getarg(cmd,0))) port = atoi(x); 323 else return ui_showusage(cmd); 324 325 if ((x = cmd_getarg(cmd,1))) low = xtoi(x); 326 if ((x = cmd_getarg(cmd,2))) high = xtoi(x); 327 328 ctlreg = A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_RX_RAM_READCTL); 329 datareg = A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_RX_RAM_READWINDOW); 330 331 for (idx = low; idx <= high; idx++) { 332 WRITECSR(ctlreg,V_BCM1480_HSP_TXVIS_RAM_ADDR(idx) | 333 V_BCM1480_HSP_TXVIS_RAM(K_BCM1480_HSP_RXVIS_RAM_DRAM_128_151)); 334 printf("%04X: %016llX ",idx,READCSR(datareg)); 335 336 WRITECSR(ctlreg,V_BCM1480_HSP_TXVIS_RAM_ADDR(idx) | 337 V_BCM1480_HSP_TXVIS_RAM(K_BCM1480_HSP_RXVIS_RAM_DRAM_64_127)); 338 printf("%016llX ",READCSR(datareg)); 339 340 WRITECSR(ctlreg,V_BCM1480_HSP_TXVIS_RAM_ADDR(idx) | 341 V_BCM1480_HSP_TXVIS_RAM(K_BCM1480_HSP_RXVIS_RAM_DRAM_0_63)); 342 343 printf("%016llX\n",READCSR(datareg)); 344 if (console_status()) break; 345 } 346 347 return 0; 348 349} 350 351static int ui_cmd_hsp_txvis(ui_cmdline_t *cmd,int argc,char *argv[]) 352{ 353 uint64_t port,reg; 354 uint64_t idx = 0; 355 uint64_t val,val2,val3; 356 hsaddr_t ctlreg,datareg; 357 358 if (!cmd_getarg(cmd,1)) return ui_showusage(cmd); 359 port = atoi(cmd_getarg(cmd,0)); 360 reg = atoi(cmd_getarg(cmd,1)); 361 362 ctlreg = A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_TX_RF_READCTL); 363 datareg = A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_TX_RF_READWINDOW); 364 365 printf("Dumping visibility of TX port %d register file #%d\n",(int)port,(int)reg); 366 367 switch (reg) { 368 default: 369 for (idx = 0; idx < 24; idx++) { 370 WRITECSR(ctlreg, 371 V_BCM1480_HSP_TXRFVIS_RAM(reg) | 372 V_BCM1480_HSP_TXRFVIS_RAM_ADDR(idx)); 373 printf("Regfile[%02X] = %016llX\n",idx,READCSR(datareg)); 374 } 375 376 break; 377 case 0: 378 for (idx = 0; idx < 24; idx++) { 379 WRITECSR(ctlreg, 380 V_BCM1480_HSP_TXRFVIS_RAM(reg+0) | 381 V_BCM1480_HSP_TXRFVIS_RAM_ADDR(idx)); 382 val = READCSR(datareg); 383 WRITECSR(ctlreg, 384 V_BCM1480_HSP_TXRFVIS_RAM(reg+1) | 385 V_BCM1480_HSP_TXRFVIS_RAM_ADDR(idx)); 386 val2 = READCSR(datareg); 387 WRITECSR(ctlreg, 388 V_BCM1480_HSP_TXRFVIS_RAM(reg+8) | 389 V_BCM1480_HSP_TXRFVIS_RAM_ADDR(idx)); 390 val3 = READCSR(datareg); 391 printf("Chan %2d Head:%04X Tail:%04X Phit:%04X\n",idx, 392 (uint32_t)val,(uint32_t)val2,(uint32_t)val3); 393 } 394 break; 395 396 397 case 2: case 5: 398 for (idx = 0; idx < 24; idx++) { 399 WRITECSR(ctlreg, 400 V_BCM1480_HSP_TXRFVIS_RAM(reg+0) | 401 V_BCM1480_HSP_TXRFVIS_RAM_ADDR(idx)); 402 val = READCSR(datareg); 403 WRITECSR(ctlreg, 404 V_BCM1480_HSP_TXRFVIS_RAM(reg+1) | 405 V_BCM1480_HSP_TXRFVIS_RAM_ADDR(idx)); 406 val2 = READCSR(datareg); 407 WRITECSR(ctlreg, 408 V_BCM1480_HSP_TXRFVIS_RAM(reg+2) | 409 V_BCM1480_HSP_TXRFVIS_RAM_ADDR(idx)); 410 val3 = READCSR(datareg); 411 printf("Chan %2d Meta:%08llX %s %s BC:%2d %s IVC:%2d Data:%02llX_%016llX\n",idx,val3, 412 (val3 & 1) ? "SOP" : "---", 413 (val3 & 2) ? "EOP" : "---", 414 (int)((val3 >> 2) & 15), 415 (val3 & 64) ? "ERR" : "OK ", 416 (int)(val3 >> 7), 417 val2,val); 418 } 419 break; 420 421 case 9: 422 for (idx = 0; idx < 24; idx++) { 423 WRITECSR(ctlreg, 424 V_BCM1480_HSP_TXRFVIS_RAM(reg) | 425 V_BCM1480_HSP_TXRFVIS_RAM_ADDR(idx)); 426 val = READCSR(datareg); 427 printf("Chan %2d Push:%d Pop:%d\n",idx, 428 (int)(val & 0x0F),(int)((val >> 4) & 0x0F)); 429 } 430 break; 431 432 case 10: 433 WRITECSR(ctlreg, 434 V_BCM1480_HSP_TXRFVIS_RAM(reg) | 435 V_BCM1480_HSP_TXRFVIS_RAM_ADDR(0)); 436 val = READCSR(datareg); 437 printf("Ready to pick: %06llx\n",((val >> 32) & 0xFFFFFF)); 438 printf("IVC OK: %06llx\n",(val & 0xFFFFFF)); 439 break; 440 441 } 442 443 return 0; 444} 445 446static int ui_cmd_hsp_rxvis(ui_cmdline_t *cmd,int argc,char *argv[]) 447{ 448 uint64_t port,reg; 449 uint64_t idx; 450 uint64_t val,val2,val3; 451 hsaddr_t ctlreg,datareg; 452 453 if (!cmd_getarg(cmd,1)) return ui_showusage(cmd); 454 port = atoi(cmd_getarg(cmd,0)); 455 reg = atoi(cmd_getarg(cmd,1)); 456 457 ctlreg = A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_RX_RF_READCTL); 458 datareg = A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_RX_RF_READWINDOW); 459 460 printf("Dumping visibility of RX port %d register file #%d\n",(int)port,(int)reg); 461 462 463 switch (reg) { 464 case 0: 465 for (idx = 0; idx < 24; idx++) { 466 WRITECSR(ctlreg, 467 V_BCM1480_HSP_RXRFVIS_RAM(reg+0) | 468 V_BCM1480_HSP_RXRFVIS_RAM_ADDR(idx)); 469 val = READCSR(datareg); 470 WRITECSR(ctlreg, 471 V_BCM1480_HSP_RXRFVIS_RAM(reg+1) | 472 V_BCM1480_HSP_RXRFVIS_RAM_ADDR(idx)); 473 val2 = READCSR(datareg); 474 WRITECSR(ctlreg, 475 V_BCM1480_HSP_RXRFVIS_RAM(reg+2) | 476 V_BCM1480_HSP_RXRFVIS_RAM_ADDR(idx)); 477 val3 = READCSR(datareg); 478 printf("Chan %2d Meta:%016llX Data:%016llX_%016llX\n",idx, 479 val3,val,val2); 480 } 481 break; 482 case 5: 483 for (idx = 0; idx < 24; idx++) { 484 WRITECSR(ctlreg, 485 V_BCM1480_HSP_RXRFVIS_RAM(reg+0) | 486 V_BCM1480_HSP_RXRFVIS_RAM_ADDR(idx)); 487 val = READCSR(datareg); 488 WRITECSR(ctlreg, 489 V_BCM1480_HSP_RXRFVIS_RAM(reg+1) | 490 V_BCM1480_HSP_RXRFVIS_RAM_ADDR(idx)); 491 val2 = READCSR(datareg); 492 WRITECSR(ctlreg, 493 V_BCM1480_HSP_RXRFVIS_RAM(reg+3) | 494 V_BCM1480_HSP_RXRFVIS_RAM_ADDR(idx)); 495 val3 = READCSR(datareg); 496 printf("Chan %2d Head:%04X Tail:%04X Phit:%04X\n",idx, 497 (uint32_t)val,(uint32_t)val2,(uint32_t)val3); 498 } 499 break; 500 default: 501 for (idx = 0; idx < 32; idx++) { 502 WRITECSR(ctlreg, 503 V_BCM1480_HSP_RXRFVIS_RAM(reg) | 504 V_BCM1480_HSP_RXRFVIS_RAM_ADDR(idx)); 505 printf("Regfile[%02X] = %016llX\n",idx,READCSR(datareg)); 506 } 507 } 508 509 return 0; 510} 511 512 513 514static int ui_cmd_spi4_show(ui_cmdline_t *cmd,int argc,char *argv[]) 515{ 516 int port = 0; 517 char *x; 518 uint64_t reg; 519 520 if ((x = cmd_getarg(cmd,0))) port = atoi(x); 521 522 if (!HSP_IS_PORT_SPI4_MODE(port)) 523 { 524 printf("WARNING Port %d is NOT in SPI4 mode.\n",port); 525 } 526 527 printf("** Port %d **\n",port); 528 reg = READCSR(A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_TX_SPI4_PORT_INT_STATUS)); 529 printf("TX SPI-4 Interrupt Status: %016llX",reg); 530 printf(" [ %s]\n",showfields(spi4_txintstat,reg)); 531 532 reg = READCSR(A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_TX_CALIBRATION)); 533 printf("TX SPI-4 Calibration: %016llX",reg); 534 printf(" [ %s]\n",showfields(spi4_txcalibration,reg)); 535 536 reg = READCSR(A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_RX_SPI4_PORT_INT_STATUS)); 537 printf("RX SPI-4 Interrupt Status: %016llX",reg); 538 printf(" [ %s]\n",showfields(spi4_rxintstat,reg)); 539 540 reg = READCSR(A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_RX_CALIBRATION)); 541 printf("RX SPI-4 Calibration: %016llX",reg); 542 printf(" [ %s]\n",showfields(spi4_txcalibration,reg)); /* same fields as TX */ 543 544 return 0; 545} 546 547 548/** 549 uint32_t hsp_ht_log_errors(uint32_t port) 550*/ 551uint32_t hsp_ht_log_errors(uint32_t port) 552{ 553 pcireg_t reg; 554 555 if (!HSP_IS_PORT_HT_MODE(port)) 556 { 557 printf("WARNING Port %d is NOT in HT mode.\n",port); 558 } 559 560 printf("** Port %d HT Error Status - Summary( %s ) **\n", port, 561 hsp_ht_check_for_errors(port) ? "Error" : "No Errors" ); 562 563 reg = pci_conf_read32(BCM1480_EXTx_BRIDGE(port), PCI_COMMAND_STATUS_REG); 564 printf("HT/PCI Primary Status: %08X",reg); 565 printf(" [ %s]\n",showfields(htb_status, (uint64_t) reg)); 566 567 reg = pci_conf_read32(BCM1480_EXTx_BRIDGE(port), PPB_IO_STATUS_REG); 568 printf("HT/PCI Secondary Status: %08X",reg); 569 printf(" [ %s]\n",showfields(htb_status, (uint64_t) reg)); 570 571 reg = pci_conf_read32(BCM1480_EXTx_BRIDGE(port), R_BCM1480_HTB_LINKCTRL); 572 printf("HT Link Ctrl / Status: %08X",reg); 573 printf(" [ %s]\n",showfields(htb_linkctrl, (uint64_t) reg)); 574 575 reg = pci_conf_read32(BCM1480_EXTx_BRIDGE(port), R_BCM1480_HTB_LINKFREQERR); 576 printf("HT Link Error: %08X",reg); 577 printf(" [ %s]\n",showfields(htb_linkfreqerr, (uint64_t) reg)); 578 579 reg = pci_conf_read32(BCM1480_EXTx_BRIDGE(port), R_BCM1480_HTB_ERRHNDL); 580 printf("HT Error Handling : %08X",reg); 581 printf(" [ %s]\n",showfields(htb_errhndl, (uint64_t) reg)); 582 583 return (0); 584} 585 586 587/** 588 uint32_t hsp_spi4_log_errors(uint32_t port) 589*/ 590uint32_t hsp_spi4_log_errors(uint32_t port) 591{ 592 uint64_t reg; 593 594 if (!HSP_IS_PORT_SPI4_MODE(port)) 595 { 596 printf("WARNING Port %d is NOT in SPI4 mode.\n",port); 597 } 598 599 printf("** Port %d SPI4 Error Status - Summary( %s ) **\n", port, 600 hsp_spi4_check_for_errors(port) ? "Error" : "No Errors" ); 601 602 reg = READCSR(A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_TX_SPI4_PORT_INT_STATUS)); 603 printf("TX SPI-4 Interrupt Status: %016llX",reg); 604 printf(" [ %s]\n",showfields(spi4_txintstat,reg)); 605 606 reg = READCSR(A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_RX_SPI4_PORT_INT_STATUS)); 607 printf("RX SPI-4 Interrupt Status: %016llX",reg); 608 printf(" [ %s]\n",showfields(spi4_rxintstat,reg)); 609 return (0); 610} 611 612 613 614 615/* ********************************************************************* 616 * ui_init_hspcmds() 617 * 618 * Add HSP-specific commands to the command table 619 * 620 * Input parameters: 621 * nothing 622 * 623 * Return value: 624 * 0 625 ********************************************************************* */ 626 627int ui_init_hspcmds(void) 628{ 629 630 cmd_addcmd("hsp txvis", 631 ui_cmd_hsp_txvis, 632 NULL, 633 "Display TX RF Visibility", 634 "hsp txvis <port> (reg)", 635 ""); 636 637 cmd_addcmd("hsp rxvis", 638 ui_cmd_hsp_rxvis, 639 NULL, 640 "Display RX RF Visibility", 641 "hsp rxvis <port> (reg)", 642 ""); 643 644 cmd_addcmd("hsp txram", 645 ui_cmd_hsp_txram, 646 NULL, 647 "Display TX buffer RAM", 648 "hsp txram <port>", 649 ""); 650 651 cmd_addcmd("hsp rxram", 652 ui_cmd_hsp_rxram, 653 NULL, 654 "Display RX buffer RAM", 655 "hsp rxram <port> [low] [high]", 656 ""); 657 658 cmd_addcmd("hsp ht errors", 659 ui_cmd_ht_show_errors, 660 NULL, 661 "Display/Reset HT Error Registers", 662 "hsp ht errors <port> \n", 663 "-sync_flood=*;Enable (1) / Disable (0) on all HT errors (CRC, Protocol, Overflow)|" 664 "-reset; Reset latched errors"); 665 666 cmd_addcmd("hsp spi4 errors", 667 ui_cmd_spi4_show_errors, 668 NULL, 669 "Display/Reset SPI4 Error Registers", 670 "hsp spi4 errors <port> \n", 671 "-reset; Reset latched errors"); 672 673 cmd_addcmd("hsp spi4 show", 674 ui_cmd_spi4_show, 675 NULL, 676 "Display TX/RX registers", 677 "hsp spi4 show 0|1|2", 678 ""); 679 680 return 0; 681} 682 683 684 685 686 687/* ********************************************************************* 688 * Bit Wrangling 689 ********************************************************************* */ 690 691char *showfields(bitfield_t *fields,uint64_t val) 692{ 693 int left,right; 694 int idx; 695 static char buffer[512]; 696 char fieldname[128]; 697 char *p = buffer; 698 char *x,*setstr,*clearstr; 699 700 *p = '\0'; 701 while (fields->name) { 702 703 /* Determine left and right edge of bit field */ 704 right = -1; left = -1; 705 for (idx = 0; idx < 64; idx++) { 706 if ((right < 0) && (fields->field & (1LL << idx))) right = idx; 707 if ((left < 0) && (fields->field & (0x8000000000000000LL >> idx))) left = (63-idx); 708 } 709 710 /* If same, it's a one bit field */ 711 if (right == left) { 712 strcpy(fieldname,fields->name); 713 x = strchr(fieldname,'|'); 714 if (x) { 715 *x++ = '\0'; setstr = fieldname; clearstr = x; 716 } 717 else { 718 setstr = fieldname; clearstr = NULL; 719 } 720 721 if (fields->field & val) p += sprintf(p,"%s ",setstr); 722 else { 723 if (clearstr) p += sprintf(p,"%s ",clearstr); 724 } 725 } 726 else { 727 p += sprintf(p,"%s=%u ",fields->name, 728 (int)((fields->field & val) >> right)); 729 } 730 731 fields++; 732 } 733 734 return buffer; 735} 736