1/*  *********************************************************************
2    *  Broadcom Common Firmware Environment (CFE)
3    *
4    *  Board device initialization		File: bcm91480b_pci.c
5    *
6    *  This is the part of the board support package for boards
7    *  that support PCI. It describes the board-specific slots/devices
8    *  and wiring thereof.
9    *
10    *********************************************************************
11    *
12    *  Copyright 2000,2001,2002,2003
13    *  Broadcom Corporation. All rights reserved.
14    *
15    *  This software is furnished under license and may be used and
16    *  copied only in accordance with the following terms and
17    *  conditions.  Subject to these conditions, you may download,
18    *  copy, install, use, modify and distribute modified or unmodified
19    *  copies of this software in source and/or binary form.  No title
20    *  or ownership is transferred hereby.
21    *
22    *  1) Any source code used, modified or distributed must reproduce
23    *     and retain this copyright notice and list of conditions
24    *     as they appear in the source file.
25    *
26    *  2) No right is granted to use any trade name, trademark, or
27    *     logo of Broadcom Corporation.  The "Broadcom Corporation"
28    *     name may not be used to endorse or promote products derived
29    *     from this software without the prior written permission of
30    *     Broadcom Corporation.
31    *
32    *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
33    *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
34    *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
35    *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
36    *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
37    *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
38    *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
39    *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
40    *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
41    *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
42    *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
43    *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
44    *     THE POSSIBILITY OF SUCH DAMAGE.
45    ********************************************************************* */
46
47#include "cfe.h"
48
49#include "bcm91480b.h"
50#include "bcm1480_regs.h"
51
52#include "pcireg.h"
53#include "pcivar.h"
54#include "pci_internal.h"
55
56/* PCI interrupt mapping on the BCM91480b board:
57   Only device id 1 is implemented as a PCI(X) connector, and
58   there are no on-board devices.  Note 1280-style IDSEL mappings.
59
60   Slot    IDSEL   DevID  INT{A,B,C,D}   shift
61  (PHB)      -       0       {A,-,-,-}     0
62    1       17       1       {A,B,C,D}     0 (identity)
63    -        -       -                     1 (A->B, B->C, C->D, D->A)
64    -                                      2 (A->C, B->D, C->A, D->B)
65    -                                      3 (A->D, B->A, C->B, D->C)
66*/
67
68extern int _pciverbose;
69
70/* Return the base shift of a slot or device on the motherboard.
71   This is board specific, for the bcm91480b only. */
72uint8_t
73pci_int_shift_0(pcitag_t tag)
74{
75    int bus, device;
76
77    pci_break_tag(tag, NULL, &bus, &device, NULL);
78
79    if (bus != 0)
80	return 0;
81    switch (device) {
82    case 0: case 1:
83	return 0;
84    default:
85	return 0;
86    }
87  return 0;
88}
89
90/* Return the mapping of a bcm91480b device/function interrupt to an
91   interrupt line.  For the BCM1480, return 1-4 to indicate the
92   pci_inta - pci_intd inputs to the interrupt mapper, respectively,
93   or 0 if there is no mapping. */
94uint8_t
95pci_int_map_0(pcitag_t tag)
96{
97    pcireg_t data;
98    int pin, bus, device;
99
100    data = pci_conf_read(tag, PCI_BPARAM_INTERRUPT_REG);
101    pin = PCI_INTERRUPT_PIN(data);
102    if (pin == 0) {
103	/* No IRQ used. */
104	return 0;
105    }
106    if (pin > 4) {
107	if (_pciverbose >= 1)
108	    pci_tagprintf(tag, "pci_map_int: bad interrupt pin %d\n", pin);
109	return 0;
110    }
111
112    pci_break_tag(tag, NULL, &bus, &device, NULL);
113
114    if (bus != 0)
115	return 0;
116
117    switch (device) {
118    case 0:
119    case 1:
120        return (((pin - 1) + pci_int_shift_0(tag)) % 4) + 1;
121    default:
122        return 0;
123    }
124    return 0;
125}
126
127
128/* PCI-X clock initialization functions. */
129
130void
131pci_clock_reset(void)
132{
133    SBWRITECSR(A_GPIO_PIN_CLR, M_GPIO_PCIX_FREQALL);
134}
135
136void
137pci_clock_enable(int on)
138{
139    /* No separate enable. */
140}
141
142unsigned int
143pci_clock_select(unsigned int freq)
144{
145    unsigned int selected;
146
147    /* Clear and selectively reset the controlling GPIO pins. */
148
149    SBWRITECSR(A_GPIO_PIN_CLR, M_GPIO_PCIX_FREQALL);
150
151    if (freq >= 133) {
152	selected = 133;
153	SBWRITECSR(A_GPIO_PIN_SET, M_GPIO_PCIX_FREQ133);
154	}
155    else if (freq >= 100) {
156	selected = 100;
157	SBWRITECSR(A_GPIO_PIN_SET, M_GPIO_PCIX_FREQ100);
158	}
159    else if (freq >= 66) {
160	selected = 66;
161	SBWRITECSR(A_GPIO_PIN_SET, M_GPIO_PCIX_FREQ66);
162	}
163    else {
164	selected = 33;
165	SBWRITECSR(A_GPIO_PIN_SET, M_GPIO_PCIX_FREQ33);
166	}
167
168    return selected;
169}
170
171
172/* Local HT topology (master/slave) information. */
173
174int
175ldt_slave_mode(int port)
176{
177    unsigned int board_config;
178
179    /* For now, treat ports 0 and 1 the same, as controlled by the
180       setting of the CFG_NODE_ID bit in sys_cfg.  Port 2 is dedicated
181       to the PLX bridge and does not support node interconnect. */
182
183    board_config = board_get_config();
184
185    switch (port) {
186	case 0:  case 1:
187	    return ((board_config & BOARD_CFG_NODE_ID) != 0);
188	default:
189	    return 0;
190	}
191}
192