1/** 2 * \file 3 * \brief Header file for the PCI driver 4 */ 5 6/* 7 * Copyright (c) 2007, 2008, 2009, 2011, 2014, ETH Zurich. 8 * All rights reserved. 9 * 10 * This file is distributed under the terms in the attached LICENSE file. 11 * If you do not find this file, copies can be found by writing to: 12 * ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group. 13 */ 14 15#ifndef PCI_H_ 16#define PCI_H_ 17 18#include <string.h> 19 20#include <pci/confspace/mackerelpci.h> 21#include <pci/confspace/pci_confspace.h> 22#include <dev/pci_hdr0_dev.h> 23#include <dev/pci_hdr1_dev.h> 24 25/// BIOS area is 1MB in size 26#define BIOS_BITS 20 27 28#if 0 29 30struct pci_device_info { 31 struct pci_address addr; 32 struct bus *bus; 33 uint16_t vendor_id; 34 uint16_t device_id; 35 pci_hdr0_class_code_t classcode; 36 bool pcie; 37 uint32_t irq; 38 struct device_mem *bar_info; 39 int nr_allocated_bars; 40 bool driver_loaded; 41#if 0 42 void *lowlevel_representation; /**< representation of the hardware 43 access to the upper part 44 of the per core instance of the driver. 45 not used by applications (or libraries) */ 46 void *logical_representation; /**< representation of the device to 47 libraries/applications (such as 48 representing "eth0") */ 49#endif 50}; 51#endif 52 53errval_t pci_setup_root_complex(void); 54void pci_add_root(struct pci_address addr, uint8_t maxchild, char* handle); 55void pci_program_bridges(void); 56void pci_init(void); 57void pci_init_datastructures(void); 58 59errval_t device_init(uint32_t class_code, 60 uint32_t sub_class, 61 uint32_t prog_if, 62 uint32_t vendor_id, 63 uint32_t device_id, 64 uint32_t *bus, 65 uint32_t *dev, 66 uint32_t *fun, 67 bool *pcie, 68 int *nr_allocated_bars); 69 70 71uint32_t pci_setup_interrupt(uint32_t bus, 72 uint32_t dev, 73 uint32_t fun); 74errval_t device_reregister_interrupt(uint8_t coreid, int vector, 75 uint32_t class_code, uint32_t sub_class, uint32_t prog_if, 76 uint32_t vendor_id, uint32_t device_id, uint32_t *bus, 77 uint32_t *dev,uint32_t *fun); 78int pci_bar_to_caps_index(uint8_t bus, uint8_t dev, uint8_t fun, uint8_t BAR); 79int pci_get_bar_nr_for_index(uint8_t bus, uint8_t dev, uint8_t fun, uint8_t idx); 80int pci_get_nr_caps_for_bar(uint8_t bus, uint8_t dev, uint8_t fun, uint8_t index); 81struct capref pci_get_bar_cap_for_device(uint8_t bus, uint8_t dev, uint8_t fun, 82 uint8_t index); 83uint8_t pci_get_bar_cap_type_for_device(uint8_t bus, uint8_t dev, uint8_t fun, 84 uint8_t index); 85void pci_enable_interrupt_for_device(uint32_t bus, uint32_t dev, uint32_t fun, 86 bool pcie); 87errval_t pcie_setup_confspace(void); 88 89errval_t pci_msix_enable_confspace(struct pci_address *addr, int enable); 90errval_t pci_msix_enable(struct pci_address *addr, uint16_t *count); 91errval_t pci_msix_vector_init(struct pci_address *addr, uint16_t idx, 92 uint8_t destination, uint8_t vector); 93 94errval_t pci_start_virtual_function_for_device(struct pci_address* addr, 95 uint32_t vf_number); 96errval_t pci_get_vf_addr_of_device(struct pci_address addr, 97 uint32_t vf_num, 98 struct pci_address* vf_addr); 99 100errval_t pci_setup_connection_to_kaluga(void); 101extern const char *skb_bridge_program; 102extern uint16_t max_numvfs; 103extern bool decoding_net; 104extern bool enable_vfs; 105 106#endif // PCI_H_ 107