1/*
2 * Copyright (c) 2019, ETH Zurich.
3 * All rights reserved.
4 *
5 * This file is distributed under the terms in the attached LICENSE file.
6 * If you do not find this file, copies can be found by writing to:
7 * ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group.
8 */
9
10#ifndef ENET_H_
11#define ENET_H_
12
13
14//#define ENET_DEBUG_OPTION 1
15
16#if defined(ENET_DEBUG_OPTION)
17#define ENET_DEBUG(x...) debug_printf("[enet] " x);
18#else
19#define ENET_DEBUG(fmt, ...) ((void)0)
20#endif
21
22
23#define ENET_PROMISC
24
25#define TX_RING_SIZE 512
26#define ENET_RX_FRSIZE 2048
27#define ENET_RX_PAGES 256
28
29#define ENET_MAX_PKT_SIZE 1536
30#define ENET_MAX_BUF_SIZE 2048
31
32#define RX_RING_SIZE (BASE_PAGE_SIZE / ENET_RX_FRSIZE) * ENET_RX_PAGES
33
34
35#define ENET_RX_EMPTY 0x8000
36#define ENET_SC_WRAP ((ushort)0x2000)
37#define ENET_RX_intr ((ushort)0x1000)
38#define ENET_RX_LAST ((ushort) 0x0800)
39#define ENET_RX_FIRST ((ushort) 0x0400)
40#define ENET_RX_MISS ((ushort) 0x0100)
41#define ENET_RX_LG ((ushort) 0x0020)
42#define ENET_RX_NO ((ushort) 0x0010)
43#define ENET_RX_SH ((ushort) 0x0008)
44#define ENET_RX_CR ((ushort) 0x0004)
45#define ENET_RX_OV ((ushort) 0x0002)
46#define ENET_RX_CL ((ushort) 0x0001)
47#define ENET_RX_STATS ((ushort) 0x013f)
48
49#define ENET_TX_READY 0x8000
50#define ENET_TX_WRAP 0x2000
51#define ENET_TX_LAST 0x0800
52#define ENET_TX_CRC 0x0400
53
54struct region_entry {
55    uint32_t rid;
56    struct dmem mem;
57    struct region_entry* next;
58};
59
60struct enet_queue {
61    struct devq q;
62    size_t size;
63
64    // stop and wake threashold
65    uint16_t stop_th;
66    uint16_t wake_th;
67    char* tso_hdr;
68
69    struct dmem desc_mem;
70    enet_t* d;
71
72    // hd + tail
73    size_t head;
74    size_t tail;
75
76    // alignment
77    size_t align;
78
79    // Descriptor + Cleanq
80    enet_bufdesc_array_t *ring;
81    struct devq_buf *ring_bufs;
82
83    struct region_entry* regions;
84};
85
86struct enet_driver_state {
87    struct bfdriver_instance *bfi;
88    struct capref regs;
89    lvaddr_t d_vaddr;
90
91    struct enet_queue* rxq;
92    struct enet_queue* txq;
93    enet_t* d;
94    uint64_t mac;
95
96    uint32_t phy_id;
97
98    struct capref rx_mem;
99    struct capref tx_mem;
100};
101
102#define ENET_HASH_BITS 6
103#define ENET_CRC32_POLY 0xEDB88320
104
105#endif // ndef ENET_H_
106