1/* 2 ACPI MADT Facts 3 4 Copyright (c) 2017, ETH Zurich. 5 All rights reserved. 6 7 This file is distributed under the terms in the attached LICENSE file. 8 If you do not find this file, copies can be found by writing to: 9 ETH Zurich D-INFK, Universit\"atstr. 6, CH-8092 Zurich. Attn: Systems Group. 10 */ 11 12schema acpimadt "ACPI Multiple APIC Description Table (MADT)" { 13 14 section "Introduction" { 15 16 text { 17 "The ACPI interrupt model describes all interrupts for the entire " 18 "system in a uniform interrupt model implementation. Supported " 19 "interrupt models include the PC-AT-compatible dual 8259 interrupt " 20 "controller, for Intel processor-based systems, the Intel Advanced " 21 "programmable Interrupt Controller (APIC) and Intel Streamlined " 22 "Advanced Programmable Interrupt Controller (SAPIC), and, for ARM " 23 "processor-based systems, the Generic Interrupt Controller (GIC) " 24 25 "ACPI represents all interrupts as 'flat' values known as global " 26 "system interrupts. Therefore to support APICs, SAPICs or GICs on an " 27 "ACPI-enabled system, each used interrupt input must be mapped to the " 28 "global system interrupt value used by ACPI. " 29 }; 30 }; 31 32 33 /* 34 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 35 */ 36 37 /* 0: Processor Local APIC */ 38 39 namespace local "x86 Local Namespace" { 40 41 fact apic "Processor Local APIC" { 42 uint8 ProcessorId "ACPI processor id"; 43 uint8 Id "Processor's local APIC id"; 44 uint32 LapicFlags "Local APIC flags"; 45 }; 46 47 flags apicflags 32 "Local APIC Flags" { 48 0 enabled "If zero, this processor is unusable"; 49 }; 50 51 /* 4: Local APIC NMI */ 52 53 fact apicnmi "Local APIC NMI" { 54 uint8 ProcessorId "ACPI processor id"; 55 uint16 IntiFlags "Interrupt Flags"; 56 uint8 Lint "LINTn to which NMI is connected"; 57 }; 58 59 60 /* 5: Address Override */ 61 62 fact apicoverride "Address Override" { 63 uint16 Reserved "Reserved"; 64 uint64 Address "APIC physical address"; 65 }; 66 67 68 /* 7: Local Sapic */ 69 70 fact sapic "Local Sapic" { 71 uint8 ProcessorId "ACPI processor id"; 72 uint8 Id "SAPIC ID"; 73 uint8 Eid "SAPIC EID"; 74 uint8 Reserved "Reserved"; 75 uint16 Reserved2 "Reserved"; 76 uint32 LapicFlags "LapicFlags"; 77 uint32 Uid "Numeric UID - ACPI 3.0"; 78 string UidString "String UID - ACPI 3.0"; 79 }; 80 81 82 /* 9: Processor Local X2APIC (ACPI 4.0) */ 83 84 85 fact x2apic "Processor Local X2APIC (ACPI 4.0)" { 86 uint16 Reserved "Reserved"; 87 uint32 LocalApicId "Processor x2APIC ID"; 88 uint32 LapicFlags "Lapic Flags"; 89 uint32 Uid "ACPI processor UID"; 90 }; 91 92 93 /* 10: Local X2APIC NMI (ACPI 4.0) */ 94 95 fact x2apicnmi "Local X2APIC NMI (ACPI 4.0)" { 96 uint16 IntiFlags "IntFlags"; 97 uint32 Uid "ACPI processor UID"; 98 uint8 Lint "LINTn to which NMI is connected"; 99 }; 100 101 }; 102 103 namespace io "x86 IO Nanespace" { 104 /* 1: IO APIC */ 105 106 text {"In an APIC implementation, there are one or more I/O APICs. Each I/O APIC has a series of interrupt inputs, referred to as INTIn, where the value of n is from 0 to the number of the last interrupt input on the I/O APIC"}; 107 108 fact apic "I/O APIC Structure" { 109 uint8 Id "The I/O APIC's ID."; 110 uint8 Reserved "Reserved. Must be zero."; 111 uint32 Address "The 32-bit unique physical address to access this I/O APIC"; 112 uint32 GlobalIrqBase "The global system interrupt number where this I/O APIC's interrupt inputs start."; 113 }; 114 115 /* 6: I/O Sapic */ 116 117 fact sapic "I/O Sapic" { 118 uint8 Id "I/O SAPIC ID"; 119 uint8 Reserved "Reserved"; 120 uint32 GlobalIrqBase "Global interrupt for SAPIC start"; 121 uint64 Address "SAPIC physical address"; 122 }; 123 124 }; 125 126 namespace interrupt "Interrupt Namespace" { 127 128 /* 2: Interrupt Override */ 129 130 fact override "Interrupt Override" { 131 uint8 Bus "0 - ISA"; 132 uint8 SourceIrq "Interrupt source (IRQ)"; 133 uint32 GlobalIrq "Global system interrupt"; 134 uint16 IntiFlags "IntiFlags"; 135 }; 136 137 /* 8: Platform Interrupt Source */ 138 139 fact source "Platform Interrupt Source " { 140 uint16 IntiFlags "IntiFlags"; 141 uint8 Type "1=PMI, 2=INIT, 3=corrected"; 142 uint8 Id "Processor ID"; 143 uint8 Eid "Processor EID "; 144 uint8 IoSapicVector "Vector value for PMI interrupts"; 145 uint32 GlobalIrq "Global system interrupt"; 146 uint32 SFlags "Interrupt Source Flags"; 147 }; 148 149 }; 150 151 namespace nmi "NMI" { 152 /* 3: NMI Source */ 153 154 fact source "NMI Source" { 155 uint16 IntiFlags "IntIflags"; 156 uint32 GlobalIrq "Global system interrupt"; 157 }; 158 }; 159 160 161 namespace generic "ARM Generic Interrupt Controllers" { 162 163 /* 11: Generic Interrupt (ACPI 5.0 + ACPI 6.0 changes) */ 164 165 fact interrupt "Generic Interrupt (ACPI 5.0 + ACPI 6.0 changes)" { 166 uint32 CpuInterfaceNumber ""; 167 uint32 Uid ""; 168 uint32 GICFlags ""; 169 uint32 ParkingVersion ""; 170 uint32 PerformanceInterrupt ""; 171 uint64 ParkedAddress ""; 172 uint64 BaseAddress ""; 173 uint64 GicvBaseAddress ""; 174 uint64 GichBaseAddress ""; 175 uint32 VgicInterrupt ""; 176 uint64 GicrBaseAddress ""; 177 uint64 ArmMpidr ""; 178 uint8 EfficiencyClass ""; 179 }; 180 181 182 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 183 184 fact distributor "Generic Distributor (ACPI 5.0 + ACPI 6.0 changes)" { 185 uint32 GicId ""; 186 uint64 BaseAddress ""; 187 uint32 GlobalIrqBase ""; 188 uint8 Version ""; 189 }; 190 191 192 193 /* 13: Generic MSI Frame (ACPI 5.1) */ 194 195 fact msiframe "Generic MSI Frame (ACPI 5.1)" { 196 uint32 MsiFrameId ""; 197 uint64 BaseAddress ""; 198 uint32 MSIFlags ""; 199 uint16 SpiCount ""; 200 uint16 SpiBase ""; 201 } ; 202 203 /* Masks for Flags field above */ 204 205 206 /* 14: Generic Redistributor (ACPI 5.1) */ 207 208 fact redistributor "Generic Redistributor (ACPI 5.1)" { 209 uint64 BaseAddress ""; 210 uint32 Length ""; 211 } ; 212 213 214 /* 15: Generic Translator (ACPI 6.0) */ 215 216 fact translator "Generic Translator (ACPI 6.0)" { 217 uint32 TranslationId ""; 218 uint64 BaseAddress ""; 219 } ; 220 221 }; 222}; 223