1/*- 2 * Copyright (c) 2010 Isilon Systems, Inc. 3 * Copyright (c) 2010 iX Systems, Inc. 4 * Copyright (c) 2010 Panasas, Inc. 5 * Copyright (c) 2013, 2014 Mellanox Technologies, Ltd. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice unmodified, this list of conditions, and the following 13 * disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30/* 31 #ifndef _LINUX_PCI_H_ 32 #define _LINUX_PCI_H_ 33 34 #define CONFIG_PCI_MSI 35 36 #include <linux/types.h> 37 38 #include <sys/param.h> 39 #include <sys/bus.h> 40 #include <sys/pciio.h> 41 #include <sys/rman.h> 42 #include <dev/pci/pcivar.h> 43 #include <dev/pci/pcireg.h> 44 #include <dev/pci/pci_private.h> 45 46 #include <machine/resource.h> 47 */ 48#include <linux/list.h> 49#include <linux/kernel.h> 50/* 51 #include <linux/dmapool.h> 52 #include <linux/dma-mapping.h> 53 #include <linux/compiler.h> 54 #include <linux/errno.h> 55 #include <asm/atomic.h> 56 #include <linux/device.h> 57 */ 58struct pci_device_id { 59 uint32_t vendor; 60 uint32_t device; 61 uint32_t subvendor; 62 uint32_t subdevice; 63 uint32_t class_mask; 64 uintptr_t driver_data; 65}; 66/* 67 #define MODULE_DEVICE_TABLE(bus, table) 68 #define PCI_ANY_ID (-1) 69 #define PCI_VENDOR_ID_MELLANOX 0x15b3 70 #define PCI_VENDOR_ID_TOPSPIN 0x1867 71 #define PCI_DEVICE_ID_MELLANOX_TAVOR 0x5a44 72 #define PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE 0x5a46 73 #define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT 0x6278 74 #define PCI_DEVICE_ID_MELLANOX_ARBEL 0x6282 75 #define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c 76 #define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274 77 78 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) 79 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) 80 #define PCI_FUNC(devfn) ((devfn) & 0x07) 81 82 #define PCI_VDEVICE(_vendor, _device) \ 83 .vendor = PCI_VENDOR_ID_##_vendor, .device = (_device), \ 84 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 85 #define PCI_DEVICE(_vendor, _device) \ 86 .vendor = (_vendor), .device = (_device), \ 87 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 88 89 #define to_pci_dev(n) container_of(n, struct pci_dev, dev) 90 91 #define PCI_VENDOR_ID PCIR_DEVVENDOR 92 #define PCI_COMMAND PCIR_COMMAND 93 #define PCI_EXP_DEVCTL PCIER_DEVICE_CTL Device Control 94 #define PCI_EXP_LNKCTL PCIER_LINK_CTL Link Control 95 #define PCI_EXP_FLAGS_TYPE PCIEM_FLAGS_TYPE Device/Port type 96 #define PCI_EXP_DEVCAP PCIER_DEVICE_CAP Device capabilities 97 #define PCI_EXP_DEVSTA PCIER_DEVICE_STA Device Status 98 #define PCI_EXP_LNKCAP PCIER_LINK_CAP Link Capabilities 99 #define PCI_EXP_LNKSTA PCIER_LINK_STA Link Status 100 #define PCI_EXP_SLTCAP PCIER_SLOT_CAP Slot Capabilities 101 #define PCI_EXP_SLTCTL PCIER_SLOT_CTL Slot Control 102 #define PCI_EXP_SLTSTA PCIER_SLOT_STA Slot Status 103 #define PCI_EXP_RTCTL PCIER_ROOT_CTL Root Control 104 #define PCI_EXP_RTCAP PCIER_ROOT_CAP Root Capabilities 105 #define PCI_EXP_RTSTA PCIER_ROOT_STA Root Status 106 #define PCI_EXP_DEVCAP2 PCIER_DEVICE_CAP2 Device Capabilities 2 107 #define PCI_EXP_DEVCTL2 PCIER_DEVICE_CTL2 Device Control 2 108 #define PCI_EXP_LNKCAP2 PCIER_LINK_CAP2 Link Capabilities 2 109 #define PCI_EXP_LNKCTL2 PCIER_LINK_CTL2 Link Control 2 110 #define PCI_EXP_LNKSTA2 PCIER_LINK_STA2 Link Status 2 111 #define PCI_EXP_FLAGS PCIER_FLAGS Capabilities register 112 #define PCI_EXP_FLAGS_VERS PCIEM_FLAGS_VERSION Capability version 113 #define PCI_EXP_TYPE_ROOT_PORT PCIEM_TYPE_ROOT_PORT Root Port 114 #define PCI_EXP_TYPE_ENDPOINT PCIEM_TYPE_ENDPOINT Express Endpoint 115 #define PCI_EXP_TYPE_LEG_END PCIEM_TYPE_LEGACY_ENDPOINT Legacy Endpoint 116 #define PCI_EXP_TYPE_DOWNSTREAM PCIEM_TYPE_DOWNSTREAM_PORT Downstream Port 117 #define PCI_EXP_FLAGS_SLOT PCIEM_FLAGS_SLOT Slot implemented 118 #define PCI_EXP_TYPE_RC_EC PCIEM_TYPE_ROOT_EC Root Complex Event Collector 119 120 121 #define IORESOURCE_MEM SYS_RES_MEMORY 122 #define IORESOURCE_IO SYS_RES_IOPORT 123 #define IORESOURCE_IRQ SYS_RES_IRQ 124 */ 125struct pci_dev; 126 127struct pci_driver { 128 struct list_head links; 129 char *name; 130 const struct pci_device_id *id_table; 131 int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); 132 void (*remove)(struct pci_dev *dev); 133 int (*suspend)(struct pci_dev *dev, pm_message_t state); /*Device suspended*/ 134 int (*resume)(struct pci_dev *dev); /* Device woken up*/ 135 const struct pci_error_handlers *err_handler; 136}; 137/* 138 139 extern struct list_head pci_drivers; 140 extern struct list_head pci_devices; 141 extern spinlock_t pci_lock; 142 143 #define __devexit_p(x) x 144 145 */ 146struct pci_dev { 147 /*struct device dev; 148 struct list_head links; 149 struct pci_driver *pdrv; 150 uint64_t dma_mask;*/ 151 uint16_t device; 152 uint16_t vendor; 153 unsigned int irq; 154 /*unsigned int devfn; 155 uint8_t revision;*/ 156}; 157/* 158 static inline struct resource_list_entry * 159 _pci_get_rle(struct pci_dev *pdev, int type, int rid) 160 { 161 struct pci_devinfo *dinfo; 162 struct resource_list *rl; 163 164 dinfo = device_get_ivars(pdev->dev.bsddev); 165 rl = &dinfo->resources; 166 return resource_list_find(rl, type, rid); 167 } 168 169 static inline struct resource_list_entry * 170 _pci_get_bar(struct pci_dev *pdev, int bar) 171 { 172 struct resource_list_entry *rle; 173 174 bar = PCIR_BAR(bar); 175 if ((rle = _pci_get_rle(pdev, SYS_RES_MEMORY, bar)) == NULL) 176 rle = _pci_get_rle(pdev, SYS_RES_IOPORT, bar); 177 return (rle); 178 } 179 180 static inline struct device * 181 _pci_find_irq_dev(unsigned int irq) 182 { 183 struct pci_dev *pdev; 184 185 spin_lock(&pci_lock); 186 list_for_each_entry(pdev, &pci_devices, links) { 187 if (irq == pdev->dev.irq) 188 break; 189 if (irq >= pdev->dev.msix && irq < pdev->dev.msix_max) 190 break; 191 } 192 spin_unlock(&pci_lock); 193 if (pdev) 194 return &pdev->dev; 195 return (NULL); 196 } 197 198 static inline unsigned long 199 pci_resource_start(struct pci_dev *pdev, int bar) 200 { 201 struct resource_list_entry *rle; 202 203 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 204 return (0); 205 return rle->start; 206 } 207 208 static inline unsigned long 209 pci_resource_len(struct pci_dev *pdev, int bar) 210 { 211 struct resource_list_entry *rle; 212 213 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 214 return (0); 215 return rle->count; 216 } 217 218 219 * All drivers just seem to want to inspect the type not flags. 220 221 static inline int 222 pci_resource_flags(struct pci_dev *pdev, int bar) 223 { 224 struct resource_list_entry *rle; 225 226 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 227 return (0); 228 return rle->type; 229 } 230 231 static inline const char * 232 pci_name(struct pci_dev *d) 233 { 234 235 return device_get_desc(d->dev.bsddev); 236 } 237 238 static inline void * 239 pci_get_drvdata(struct pci_dev *pdev) 240 { 241 242 return dev_get_drvdata(&pdev->dev); 243 } 244 245 static inline void 246 pci_set_drvdata(struct pci_dev *pdev, void *data) 247 { 248 249 dev_set_drvdata(&pdev->dev, data); 250 } 251 252 static inline int 253 pci_enable_device(struct pci_dev *pdev) 254 { 255 256 pci_enable_io(pdev->dev.bsddev, SYS_RES_IOPORT); 257 pci_enable_io(pdev->dev.bsddev, SYS_RES_MEMORY); 258 return (0); 259 } 260 261 static inline void 262 pci_disable_device(struct pci_dev *pdev) 263 { 264 } 265 266 static inline int 267 pci_set_master(struct pci_dev *pdev) 268 { 269 270 pci_enable_busmaster(pdev->dev.bsddev); 271 return (0); 272 } 273 274 static inline int 275 pci_clear_master(struct pci_dev *pdev) 276 { 277 278 pci_disable_busmaster(pdev->dev.bsddev); 279 return (0); 280 } 281 282 static inline int 283 pci_request_region(struct pci_dev *pdev, int bar, const char *res_name) 284 { 285 int rid; 286 int type; 287 288 type = pci_resource_flags(pdev, bar); 289 if (type == 0) 290 return (-ENODEV); 291 rid = PCIR_BAR(bar); 292 if (bus_alloc_resource_any(pdev->dev.bsddev, type, &rid, 293 RF_ACTIVE) == NULL) 294 return (-EINVAL); 295 return (0); 296 } 297 298 static inline void 299 pci_release_region(struct pci_dev *pdev, int bar) 300 { 301 struct resource_list_entry *rle; 302 303 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 304 return; 305 bus_release_resource(pdev->dev.bsddev, rle->type, rle->rid, rle->res); 306 } 307 308 static inline void 309 pci_release_regions(struct pci_dev *pdev) 310 { 311 int i; 312 313 for (i = 0; i <= PCIR_MAX_BAR_0; i++) 314 pci_release_region(pdev, i); 315 } 316 317 static inline int 318 pci_request_regions(struct pci_dev *pdev, const char *res_name) 319 { 320 int error; 321 int i; 322 323 for (i = 0; i <= PCIR_MAX_BAR_0; i++) { 324 error = pci_request_region(pdev, i, res_name); 325 if (error && error != -ENODEV) { 326 pci_release_regions(pdev); 327 return (error); 328 } 329 } 330 return (0); 331 } 332 333 static inline void 334 pci_disable_msix(struct pci_dev *pdev) 335 { 336 337 pci_release_msi(pdev->dev.bsddev); 338 } 339 340 #define PCI_CAP_ID_EXP PCIY_EXPRESS 341 #define PCI_CAP_ID_PCIX PCIY_PCIX 342 343 344 static inline int 345 pci_find_capability(struct pci_dev *pdev, int capid) 346 { 347 int reg; 348 349 if (pci_find_cap(pdev->dev.bsddev, capid, ®)) 350 return (0); 351 return (reg); 352 } 353 354 355 356 357 * 358 * pci_pcie_cap - get the saved PCIe capability offset 359 * @dev: PCI device 360 * 361 * PCIe capability offset is calculated at PCI device initialization 362 * time and saved in the data structure. This function returns saved 363 * PCIe capability offset. Using this instead of pci_find_capability() 364 * reduces unnecessary search in the PCI configuration space. If you 365 * need to calculate PCIe capability offset from raw device for some 366 * reasons, please use pci_find_capability() instead. 367 368 static inline int pci_pcie_cap(struct pci_dev *dev) 369 { 370 return pci_find_capability(dev, PCI_CAP_ID_EXP); 371 } 372 373 374 static inline int 375 pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val) 376 { 377 378 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1); 379 return (0); 380 } 381 382 static inline int 383 pci_read_config_word(struct pci_dev *pdev, int where, u16 *val) 384 { 385 386 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2); 387 return (0); 388 } 389 390 static inline int 391 pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val) 392 { 393 394 *val = (u32)pci_read_config(pdev->dev.bsddev, where, 4); 395 return (0); 396 } 397 398 static inline int 399 pci_write_config_byte(struct pci_dev *pdev, int where, u8 val) 400 { 401 402 pci_write_config(pdev->dev.bsddev, where, val, 1); 403 return (0); 404 } 405 406 static inline int 407 pci_write_config_word(struct pci_dev *pdev, int where, u16 val) 408 { 409 410 pci_write_config(pdev->dev.bsddev, where, val, 2); 411 return (0); 412 } 413 414 static inline int 415 pci_write_config_dword(struct pci_dev *pdev, int where, u32 val) 416 { 417 418 pci_write_config(pdev->dev.bsddev, where, val, 4); 419 return (0); 420 } 421 422 static struct pci_driver * 423 linux_pci_find(device_t dev, const struct pci_device_id **idp) 424 { 425 const struct pci_device_id *id; 426 struct pci_driver *pdrv; 427 uint16_t vendor; 428 uint16_t device; 429 430 vendor = pci_get_vendor(dev); 431 device = pci_get_device(dev); 432 433 spin_lock(&pci_lock); 434 list_for_each_entry(pdrv, &pci_drivers, links) { 435 for (id = pdrv->id_table; id->vendor != 0; id++) { 436 if (vendor == id->vendor && device == id->device) { 437 *idp = id; 438 spin_unlock(&pci_lock); 439 return (pdrv); 440 } 441 } 442 } 443 spin_unlock(&pci_lock); 444 return (NULL); 445 } 446 447 static inline int 448 linux_pci_probe(device_t dev) 449 { 450 const struct pci_device_id *id; 451 struct pci_driver *pdrv; 452 453 if ((pdrv = linux_pci_find(dev, &id)) == NULL) 454 return (ENXIO); 455 if (device_get_driver(dev) != &pdrv->driver) 456 return (ENXIO); 457 device_set_desc(dev, pdrv->name); 458 return (0); 459 } 460 461 static inline int 462 linux_pci_attach(device_t dev) 463 { 464 struct resource_list_entry *rle; 465 struct pci_dev *pdev; 466 struct pci_driver *pdrv; 467 const struct pci_device_id *id; 468 int error; 469 470 pdrv = linux_pci_find(dev, &id); 471 pdev = device_get_softc(dev); 472 pdev->dev.parent = &linux_rootdev; 473 pdev->dev.bsddev = dev; 474 INIT_LIST_HEAD(&pdev->dev.irqents); 475 pdev->device = id->device; 476 pdev->vendor = id->vendor; 477 pdev->dev.dma_mask = &pdev->dma_mask; 478 pdev->pdrv = pdrv; 479 kobject_init(&pdev->dev.kobj, &dev_ktype); 480 kobject_set_name(&pdev->dev.kobj, device_get_nameunit(dev)); 481 kobject_add(&pdev->dev.kobj, &linux_rootdev.kobj, 482 kobject_name(&pdev->dev.kobj)); 483 rle = _pci_get_rle(pdev, SYS_RES_IRQ, 0); 484 if (rle) 485 pdev->dev.irq = rle->start; 486 else 487 pdev->dev.irq = 0; 488 pdev->irq = pdev->dev.irq; 489 mtx_unlock(&Giant); 490 spin_lock(&pci_lock); 491 list_add(&pdev->links, &pci_devices); 492 spin_unlock(&pci_lock); 493 error = pdrv->probe(pdev, id); 494 mtx_lock(&Giant); 495 if (error) { 496 spin_lock(&pci_lock); 497 list_del(&pdev->links); 498 spin_unlock(&pci_lock); 499 put_device(&pdev->dev); 500 return (-error); 501 } 502 return (0); 503 } 504 505 static inline int 506 linux_pci_detach(device_t dev) 507 { 508 struct pci_dev *pdev; 509 510 pdev = device_get_softc(dev); 511 mtx_unlock(&Giant); 512 pdev->pdrv->remove(pdev); 513 mtx_lock(&Giant); 514 spin_lock(&pci_lock); 515 list_del(&pdev->links); 516 spin_unlock(&pci_lock); 517 put_device(&pdev->dev); 518 519 return (0); 520 } 521 522 static device_method_t pci_methods[] = { 523 DEVMETHOD(device_probe, linux_pci_probe), 524 DEVMETHOD(device_attach, linux_pci_attach), 525 DEVMETHOD(device_detach, linux_pci_detach), 526 {0, 0} 527 }; 528 529 static inline int 530 pci_register_driver(struct pci_driver *pdrv) 531 { 532 devclass_t bus; 533 int error; 534 535 spin_lock(&pci_lock); 536 list_add(&pdrv->links, &pci_drivers); 537 spin_unlock(&pci_lock); 538 bus = devclass_find("pci"); 539 pdrv->driver.name = pdrv->name; 540 pdrv->driver.methods = pci_methods; 541 pdrv->driver.size = sizeof(struct pci_dev); 542 mtx_lock(&Giant); 543 error = devclass_add_driver(bus, &pdrv->driver, BUS_PASS_DEFAULT, 544 &pdrv->bsdclass); 545 mtx_unlock(&Giant); 546 if (error) 547 return (-error); 548 return (0); 549 } 550 551 static inline void 552 pci_unregister_driver(struct pci_driver *pdrv) 553 { 554 devclass_t bus; 555 556 list_del(&pdrv->links); 557 bus = devclass_find("pci"); 558 mtx_lock(&Giant); 559 devclass_delete_driver(bus, &pdrv->driver); 560 mtx_unlock(&Giant); 561 } 562 563 struct msix_entry { 564 int entry; 565 int vector; 566 }; 567 568 569 * Enable msix, positive errors indicate actual number of available 570 * vectors. Negative errors are failures. 571 * 572 * NB: define added to prevent this definition of pci_enable_msix from 573 * clashing with the native FreeBSD version. 574 575 #define pci_enable_msix linux_pci_enable_msix 576 static inline int 577 pci_enable_msix(struct pci_dev *pdev, struct msix_entry *entries, int nreq) 578 { 579 struct resource_list_entry *rle; 580 int error; 581 int avail; 582 int i; 583 584 avail = pci_msix_count(pdev->dev.bsddev); 585 if (avail < nreq) { 586 if (avail == 0) 587 return -EINVAL; 588 return avail; 589 } 590 avail = nreq; 591 if ((error = -pci_alloc_msix(pdev->dev.bsddev, &avail)) != 0) 592 return error; 593 594 * Handle case where "pci_alloc_msix()" may allocate less 595 * interrupts than available and return with no error: 596 597 if (avail < nreq) { 598 pci_release_msi(pdev->dev.bsddev); 599 return avail; 600 } 601 rle = _pci_get_rle(pdev, SYS_RES_IRQ, 1); 602 pdev->dev.msix = rle->start; 603 pdev->dev.msix_max = rle->start + avail; 604 for (i = 0; i < nreq; i++) 605 entries[i].vector = pdev->dev.msix + i; 606 return (0); 607 } 608 609 #define pci_enable_msix_range linux_pci_enable_msix_range 610 static inline int 611 pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, 612 int minvec, int maxvec) 613 { 614 int nvec = maxvec; 615 int rc; 616 617 if (maxvec < minvec) 618 return (-ERANGE); 619 620 do { 621 rc = pci_enable_msix(dev, entries, nvec); 622 if (rc < 0) { 623 return (rc); 624 } else if (rc > 0) { 625 if (rc < minvec) 626 return (-ENOSPC); 627 nvec = rc; 628 } 629 } while (rc); 630 return (nvec); 631 } 632 */ 633static inline int pci_channel_offline(void) { 634 return false; 635} 636/* 637 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) 638 { 639 return -ENODEV; 640 } 641 static inline void pci_disable_sriov(struct pci_dev *dev) 642 { 643 } 644 645 * 646 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table 647 * @_table: device table name 648 * 649 * This macro is used to create a struct pci_device_id array (a device table) 650 * in a generic manner. 651 652 #define DEFINE_PCI_DEVICE_TABLE(_table) \ 653 const struct pci_device_id _table[] __devinitdata 654 655 656 XXX This should not be necessary. 657 #define pcix_set_mmrbc(d, v) 0 658 #define pcix_get_max_mmrbc(d) 0 659 #define pcie_set_readrq(d, v) 0 660 661 #define PCI_DMA_BIDIRECTIONAL 0 662 #define PCI_DMA_TODEVICE 1 663 #define PCI_DMA_FROMDEVICE 2 664 #define PCI_DMA_NONE 3 665 666 #define pci_pool dma_pool 667 #define pci_pool_destroy dma_pool_destroy 668 #define pci_pool_alloc dma_pool_alloc 669 #define pci_pool_free dma_pool_free 670 #define pci_pool_create(_name, _pdev, _size, _align, _alloc) \ 671 dma_pool_create(_name, &(_pdev)->dev, _size, _align, _alloc) 672 #define pci_free_consistent(_hwdev, _size, _vaddr, _dma_handle) \ 673 dma_free_coherent((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 674 _size, _vaddr, _dma_handle) 675 #define pci_map_sg(_hwdev, _sg, _nents, _dir) \ 676 dma_map_sg((_hwdev) == NULL ? NULL : &(_hwdev->dev), \ 677 _sg, _nents, (enum dma_data_direction)_dir) 678 #define pci_map_single(_hwdev, _ptr, _size, _dir) \ 679 dma_map_single((_hwdev) == NULL ? NULL : &(_hwdev->dev), \ 680 (_ptr), (_size), (enum dma_data_direction)_dir) 681 #define pci_unmap_single(_hwdev, _addr, _size, _dir) \ 682 dma_unmap_single((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 683 _addr, _size, (enum dma_data_direction)_dir) 684 #define pci_unmap_sg(_hwdev, _sg, _nents, _dir) \ 685 dma_unmap_sg((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 686 _sg, _nents, (enum dma_data_direction)_dir) 687 #define pci_map_page(_hwdev, _page, _offset, _size, _dir) \ 688 dma_map_page((_hwdev) == NULL ? NULL : &(_hwdev)->dev, _page,\ 689 _offset, _size, (enum dma_data_direction)_dir) 690 #define pci_unmap_page(_hwdev, _dma_address, _size, _dir) \ 691 dma_unmap_page((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 692 _dma_address, _size, (enum dma_data_direction)_dir) 693 #define pci_set_dma_mask(_pdev, mask) dma_set_mask(&(_pdev)->dev, (mask)) 694 #define pci_dma_mapping_error(_pdev, _dma_addr) \ 695 dma_mapping_error(&(_pdev)->dev, _dma_addr) 696 #define pci_set_consistent_dma_mask(_pdev, _mask) \ 697 dma_set_coherent_mask(&(_pdev)->dev, (_mask)) 698 #define DECLARE_PCI_UNMAP_ADDR(x) DEFINE_DMA_UNMAP_ADDR(x); 699 #define DECLARE_PCI_UNMAP_LEN(x) DEFINE_DMA_UNMAP_LEN(x); 700 #define pci_unmap_addr dma_unmap_addr 701 #define pci_unmap_addr_set dma_unmap_addr_set 702 #define pci_unmap_len dma_unmap_len 703 #define pci_unmap_len_set dma_unmap_len_set 704 705 typedef unsigned int __bitwise pci_channel_state_t; 706 typedef unsigned int __bitwise pci_ers_result_t; 707 708 enum pci_channel_state { 709 I/O channel is in normal state 710 pci_channel_io_normal = (__force pci_channel_state_t) 1, 711 712 I/O to channel is blocked 713 pci_channel_io_frozen = (__force pci_channel_state_t) 2, 714 715 PCI card is dead 716 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, 717 }; 718 719 enum pci_ers_result { 720 no result/none/not supported in device driver 721 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, 722 723 Device driver can recover without slot reset 724 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, 725 726 Device driver wants slot to be reset. 727 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, 728 729 Device has completely failed, is unrecoverable 730 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, 731 732 Device driver is fully recovered and operational 733 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, 734 }; 735 736 737 PCI bus error event callbacks 738 struct pci_error_handlers { 739 PCI bus error detected on this device 740 pci_ers_result_t (*error_detected)(struct pci_dev *dev, 741 enum pci_channel_state error); 742 743 MMIO has been re-enabled, but not DMA 744 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); 745 746 PCI Express link has been reset 747 pci_ers_result_t (*link_reset)(struct pci_dev *dev); 748 749 PCI slot has been reset 750 pci_ers_result_t (*slot_reset)(struct pci_dev *dev); 751 752 Device driver may resume normal operations 753 void (*resume)(struct pci_dev *dev); 754 }; 755 756 freeBSD does not support SRIOV - yet 757 static inline struct pci_dev *pci_physfn(struct pci_dev *dev) 758 { 759 return dev; 760 } 761 762 static inline bool pci_is_pcie(struct pci_dev *dev) 763 { 764 return !!pci_pcie_cap(dev); 765 } 766 767 static inline u16 pcie_flags_reg(struct pci_dev *dev) 768 { 769 int pos; 770 u16 reg16; 771 772 pos = pci_find_capability(dev, PCI_CAP_ID_EXP); 773 if (!pos) 774 return 0; 775 776 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16); 777 778 return reg16; 779 } 780 781 782 static inline int pci_pcie_type(struct pci_dev *dev) 783 { 784 return (pcie_flags_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4; 785 } 786 787 static inline int pcie_cap_version(struct pci_dev *dev) 788 { 789 return pcie_flags_reg(dev) & PCI_EXP_FLAGS_VERS; 790 } 791 792 static inline bool pcie_cap_has_lnkctl(struct pci_dev *dev) 793 { 794 int type = pci_pcie_type(dev); 795 796 return pcie_cap_version(dev) > 1 || 797 type == PCI_EXP_TYPE_ROOT_PORT || 798 type == PCI_EXP_TYPE_ENDPOINT || 799 type == PCI_EXP_TYPE_LEG_END; 800 } 801 802 static inline bool pcie_cap_has_devctl(const struct pci_dev *dev) 803 { 804 return true; 805 } 806 807 static inline bool pcie_cap_has_sltctl(struct pci_dev *dev) 808 { 809 int type = pci_pcie_type(dev); 810 811 return pcie_cap_version(dev) > 1 || 812 type == PCI_EXP_TYPE_ROOT_PORT || 813 (type == PCI_EXP_TYPE_DOWNSTREAM && 814 pcie_flags_reg(dev) & PCI_EXP_FLAGS_SLOT); 815 } 816 817 static inline bool pcie_cap_has_rtctl(struct pci_dev *dev) 818 { 819 int type = pci_pcie_type(dev); 820 821 return pcie_cap_version(dev) > 1 || 822 type == PCI_EXP_TYPE_ROOT_PORT || 823 type == PCI_EXP_TYPE_RC_EC; 824 } 825 826 static bool pcie_capability_reg_implemented(struct pci_dev *dev, int pos) 827 { 828 if (!pci_is_pcie(dev)) 829 return false; 830 831 switch (pos) { 832 case PCI_EXP_FLAGS_TYPE: 833 return true; 834 case PCI_EXP_DEVCAP: 835 case PCI_EXP_DEVCTL: 836 case PCI_EXP_DEVSTA: 837 return pcie_cap_has_devctl(dev); 838 case PCI_EXP_LNKCAP: 839 case PCI_EXP_LNKCTL: 840 case PCI_EXP_LNKSTA: 841 return pcie_cap_has_lnkctl(dev); 842 case PCI_EXP_SLTCAP: 843 case PCI_EXP_SLTCTL: 844 case PCI_EXP_SLTSTA: 845 return pcie_cap_has_sltctl(dev); 846 case PCI_EXP_RTCTL: 847 case PCI_EXP_RTCAP: 848 case PCI_EXP_RTSTA: 849 return pcie_cap_has_rtctl(dev); 850 case PCI_EXP_DEVCAP2: 851 case PCI_EXP_DEVCTL2: 852 case PCI_EXP_LNKCAP2: 853 case PCI_EXP_LNKCTL2: 854 case PCI_EXP_LNKSTA2: 855 return pcie_cap_version(dev) > 1; 856 default: 857 return false; 858 } 859 } 860 861 862 static inline int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val) 863 { 864 if (pos & 1) 865 return -EINVAL; 866 867 if (!pcie_capability_reg_implemented(dev, pos)) 868 return 0; 869 870 return pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val); 871 } 872 873 874 #endif _LINUX_PCI_H_ 875 */ 876