1/* 2 - 3 * Copyright (c) 2010 Isilon Systems, Inc. 4 * Copyright (c) 2010 iX Systems, Inc. 5 * Copyright (c) 2010 Panasas, Inc. 6 * Copyright (c) 2013, 2014 Mellanox Technologies, Ltd. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice unmodified, this list of conditions, and the following 14 * disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 30 #ifndef _LINUX_DMA_MAPPING_H_ 31 #define _LINUX_DMA_MAPPING_H_ 32 33 #include <linux/types.h> 34 */ 35#include <linux/device.h> 36/* 37 #include <linux/err.h> 38 */ 39#include <linux/dma-attrs.h> 40#include <linux/scatterlist.h> 41/* 42 #include <linux/mm.h> 43 #include <linux/page.h> 44 45 #include <sys/systm.h> 46 #include <sys/malloc.h> 47 48 #include <vm/vm.h> 49 #include <vm/vm_page.h> 50 #include <vm/pmap.h> 51 52 #include <machine/bus.h> 53 #include <machine/pmap.h> 54 */ 55enum dma_data_direction { 56 DMA_BIDIRECTIONAL = 0, DMA_TO_DEVICE = 1, DMA_FROM_DEVICE = 2, DMA_NONE = 3, 57}; 58/* 59 struct dma_map_ops { 60 void* (*alloc_coherent)(struct device *dev, size_t size, 61 dma_addr_t *dma_handle, gfp_t gfp); 62 void (*free_coherent)(struct device *dev, size_t size, 63 void *vaddr, dma_addr_t dma_handle); 64 dma_addr_t (*map_page)(struct device *dev, struct page *page, 65 unsigned long offset, size_t size, enum dma_data_direction dir, 66 struct dma_attrs *attrs); 67 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, 68 size_t size, enum dma_data_direction dir, struct dma_attrs *attrs); 69 int (*map_sg)(struct device *dev, struct scatterlist *sg, 70 int nents, enum dma_data_direction dir, struct dma_attrs *attrs); 71 void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nents, 72 enum dma_data_direction dir, struct dma_attrs *attrs); 73 void (*sync_single_for_cpu)(struct device *dev, dma_addr_t dma_handle, 74 size_t size, enum dma_data_direction dir); 75 void (*sync_single_for_device)(struct device *dev, 76 dma_addr_t dma_handle, size_t size, enum dma_data_direction dir); 77 void (*sync_single_range_for_cpu)(struct device *dev, 78 dma_addr_t dma_handle, unsigned long offset, size_t size, 79 enum dma_data_direction dir); 80 void (*sync_single_range_for_device)(struct device *dev, 81 dma_addr_t dma_handle, unsigned long offset, size_t size, 82 enum dma_data_direction dir); 83 void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, 84 int nents, enum dma_data_direction dir); 85 void (*sync_sg_for_device)(struct device *dev, struct scatterlist *sg, 86 int nents, enum dma_data_direction dir); 87 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr); 88 int (*dma_supported)(struct device *dev, u64 mask); 89 int is_phys; 90 }; 91 92 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL << (n)) - 1)) 93 94 static inline int 95 dma_supported(struct device *dev, u64 mask) 96 { 97 98 XXX busdma takes care of this elsewhere. 99 return (1); 100 } 101 102 static inline int 103 dma_set_mask(struct device *dev, u64 dma_mask) 104 { 105 106 if (!dev->dma_mask || !dma_supported(dev, dma_mask)) 107 return -EIO; 108 109 *dev->dma_mask = dma_mask; 110 return (0); 111 } 112 113 static inline int 114 dma_set_coherent_mask(struct device *dev, u64 mask) 115 { 116 117 if (!dma_supported(dev, mask)) 118 return -EIO; 119 XXX Currently we don't support a seperate coherent mask. 120 return 0; 121 } 122 123 static inline void * 124 dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, 125 gfp_t flag) 126 { 127 vm_paddr_t high; 128 size_t align; 129 void *mem; 130 131 if (dev->dma_mask) 132 high = *dev->dma_mask; 133 else 134 high = BUS_SPACE_MAXADDR_32BIT; 135 align = PAGE_SIZE << get_order(size); 136 mem = (void *)kmem_alloc_contig(kmem_arena, size, flag, 0, high, align, 137 0, VM_MEMATTR_DEFAULT); 138 if (mem) 139 *dma_handle = vtophys(mem); 140 else 141 *dma_handle = 0; 142 return (mem); 143 } 144 145 static inline void * 146 dma_zalloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, 147 gfp_t flag) 148 { 149 150 return (dma_alloc_coherent(dev, size, dma_handle, flag | __GFP_ZERO)); 151 } 152 153 static inline void 154 dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, 155 dma_addr_t dma_handle) 156 { 157 158 kmem_free(kmem_arena, (vm_offset_t)cpu_addr, size); 159 } 160 161 XXX This only works with no iommu. 162 static inline dma_addr_t 163 dma_map_single_attrs(struct device *dev, void *ptr, size_t size, 164 enum dma_data_direction dir, struct dma_attrs *attrs) 165 { 166 167 return vtophys(ptr); 168 } 169 170 static inline void 171 dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, size_t size, 172 enum dma_data_direction dir, struct dma_attrs *attrs) 173 { 174 } 175 static inline int 176 dma_map_sg_attrs(struct device *dev, struct scatterlist *sgl, int nents, 177 enum dma_data_direction dir, struct dma_attrs *attrs) 178 { 179 struct scatterlist *sg; 180 int i; 181 182 for_each_sg(sgl, sg, nents, i) 183 sg_dma_address(sg) = sg_phys(sg); 184 185 return (nents); 186 } 187 static inline void 188 dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, 189 enum dma_data_direction dir, struct dma_attrs *attrs) 190 { 191 } 192 193 static inline dma_addr_t 194 dma_map_page(struct device *dev, struct page *page, 195 unsigned long offset, size_t size, enum dma_data_direction direction) 196 { 197 198 return VM_PAGE_TO_PHYS(page) + offset; 199 } 200 201 static inline void 202 dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, 203 enum dma_data_direction direction) 204 { 205 } 206 207 static inline void dma_sync_single_for_cpu(struct device *dev, 208 dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) { 209 } 210 211 static inline void 212 dma_sync_single(struct device *dev, dma_addr_t addr, size_t size, 213 enum dma_data_direction dir) 214 { 215 dma_sync_single_for_cpu(dev, addr, size, dir); 216 } 217 218 static inline void 219 dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, 220 size_t size, enum dma_data_direction direction) 221 { 222 } 223 224 static inline void 225 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, 226 enum dma_data_direction direction) 227 { 228 } 229 230 static inline void 231 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, 232 enum dma_data_direction direction) 233 { 234 } 235 236 static inline void 237 dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, 238 unsigned long offset, size_t size, int direction) 239 { 240 } 241 242 static inline void 243 dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, 244 unsigned long offset, size_t size, int direction) 245 { 246 } 247 248 static inline int 249 dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 250 { 251 252 return (0); 253 } 254 255 static inline unsigned int dma_set_max_seg_size(struct device *dev, 256 unsigned int size) 257 { 258 return (0); 259 } 260 261 262 #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, NULL) 263 #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, NULL) 264 #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, NULL) 265 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, NULL) 266 267 #define DEFINE_DMA_UNMAP_ADDR(name) dma_addr_t name 268 #define DEFINE_DMA_UNMAP_LEN(name) __u32 name 269 #define dma_unmap_addr(p, name) ((p)->name) 270 #define dma_unmap_addr_set(p, name, v) (((p)->name) = (v)) 271 #define dma_unmap_len(p, name) ((p)->name) 272 #define dma_unmap_len_set(p, name, v) (((p)->name) = (v)) 273 274 extern int uma_align_cache; 275 #define dma_get_cache_alignment() uma_align_cache 276 277 #endif _LINUX_DMA_MAPPING_H_ 278 */ 279