1/**
2 * \file
3 * \brief Dispatcher entry points.
4 */
5
6/*
7 * Copyright (c) 2007, 2008, 2009, ETH Zurich.
8 * All rights reserved.
9 *
10 * This file is distributed under the terms in the attached LICENSE file.
11 * If you do not find this file, copies can be found by writing to:
12 * ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group.
13 */
14
15#ifndef __ASSEMBLER__
16#define __ASSEMBLER__ // GCC Bug c/25993
17#endif /* __ASSEMBLER__ */
18
19#include <barrelfish/dispatch.h>
20#include <asmoffsets.h>
21
22    .syntax unified
23	.text
24	.extern disp_run, disp_pagefault, disp_pagefault_disabled, disp_trap
25	.globl run_entry, pagefault_entry, disabled_pagefault_entry, trap_entry
26
27//since thumb2 has a shorter branch range and can not directly load values into
28//high registers, we have to clobber one of the registers for that.
29
30.macro init_sp offset
31#ifndef __thumb2__
32//normal arm operations
33        /* Get the dispatcher address from the thread register. */
34        mrc     p15, 0, sp, c13, c0, 3
35        ldr     r12, =(OFFSETOF_DISP_GENERIC +\offset)
36        add     sp, sp, r12
37#else
38//XXX: this assumes we are allowed to clobber r3!
39#error "Thumb support is currently broken"
40        ldr     r3, =(OFFSETOF_DISP_GENERIC +\offset)
41        add     r3, THREAD_REGISTER, r3
42        mov     sp, r3
43#endif
44.endm
45
46//since thumb2 has a shorter branch range, we have to do long calls
47.macro branch target
48#ifndef __thumb2__
49//normal arm operations
50        b   \target
51#else
52        ldr     r3, =(\target)
53        bx      r3
54#endif
55.endm
56
57
58//
59// void run_entry(struct disp_priv* p)
60//
61run_entry:
62        init_sp      OFFSETOF_DISP_PRIV_STACK_LIMIT
63        mrc p15, 0, r0, c13, c0, 3 /* udisp */
64        branch       disp_run
65
66
67//
68// void pagefault_entry(disp ptr, vaddr_t fault_addr, uintptr_t error, vaddr_t pc)
69//
70pagefault_entry:
71        init_sp      OFFSETOF_DISP_PRIV_STACK_LIMIT
72        branch       disp_pagefault
73
74
75//
76// void disabled_pagefault_entry(disp ptr, vaddr_t fault_addr, uintptr_t error, vaddr_t pc)
77//
78disabled_pagefault_entry:
79        init_sp      OFFSETOF_DISP_PRIV_TRAP_STACK_LIMIT
80        branch       disp_pagefault_disabled
81
82
83//
84// void trap_entry(disp ptr, uintptr_t irq, uintptr_t error, vaddr_t pc)
85//
86trap_entry:
87        init_sp      OFFSETOF_DISP_PRIV_TRAP_STACK_LIMIT
88        branch       disp_trap
89
90