1/** 2 * \file 3 * \brief X86 inline asm utilities and defines 4 */ 5 6/* 7 * Copyright (c) 2007, 2008, ETH Zurich. 8 * All rights reserved. 9 * 10 * This file is distributed under the terms in the attached LICENSE file. 11 * If you do not find this file, copies can be found by writing to: 12 * ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group. 13 */ 14 15#ifndef __IA32_MSR_H 16#define __IA32_MSR_H 17 18typedef int mackerel_msr_t; 19 20/* 21 * Reading from Model-Specific Registers 22 * 23 * You might be tempted, gentle reader, to wonder why one should 24 * bother with the apparently pointless volatile declaration here, 25 * particularly if (as is the case with Barrelfish) rdmsr is an asm 26 * volatile inline function anyway. If you don't understand why, 27 * you're not qualified to change this code. If you do, you'll 28 * understand why it should not be changed, as long as we are 29 * compiling with GCC. 30 */ 31static inline uint32_t ia32_msr_read_32(ia32_t *base, mackerel_msr_t index) 32{ 33 volatile uint32_t r = rdmsr(index); 34 return r; 35} 36static inline uint64_t ia32_msr_read_64(ia32_t *base, mackerel_msr_t index) 37{ 38 volatile uint64_t r = rdmsr(index); 39 return r; 40} 41 42/* 43 * Writing to Model-Specific Registers 44 */ 45static inline void ia32_msr_write_32(ia32_t *base, mackerel_msr_t index, uint32_t v) 46{ 47 wrmsr(index, v); 48} 49static inline void ia32_msr_write_64(ia32_t *base, mackerel_msr_t index, uint64_t v) 50{ 51 wrmsr(index, v); 52} 53 54#endif // __IA32_MSR_H 55