1/* 2 * Copyright (c) 2011 ETH Zurich. 3 * All rights reserved. 4 * 5 * This file is distributed under the terms in the attached LICENSE file. 6 * If you do not find this file, copies can be found by writing to: 7 * ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group. 8 */ 9 10#ifndef _AHCI_UTIL_H 11#define _AHCI_UTIL_H 12 13#include <barrelfish/barrelfish.h> 14#include <ahci/ahci_dma_pool.h> 15#include <dev/ahci_port_dev.h> 16 17#define PORT_SIZE 0x80 18 19#define BLOCK_SIZE 512 20 21// The QEMU AHCI emulation only supports PRDs of size 512 bytes 22// PR_SIZE can be used together with AHCI_FIXED_PR_SIZE to enforce 23// PRs of fixed size specified in PR_SIZE 24// If not forced, PRs will be of arbitrary size with max length 4MB as 25// specified in the AHCI spec 26#define PR_SIZE 512 27#define MAX_PR_SIZE (128 * 1024) 28 29#define PRDT_OFFSET 0x80 30 31#ifndef CEIL_DIV 32#define CEIL_DIV(x, d) (((x) + ((d)-1)) / (d)) 33#endif 34 35struct ahci_command_slot { 36 struct ahci_dma_region *command_table; 37 bool in_use; 38 void *tag; 39}; 40 41struct ahci_port_info { 42 ahci_port_t port; 43 void *mapped_vaddr; 44 void *port_base; 45 struct ahci_dma_region *command_list; 46 struct ahci_dma_region *receive_fis; 47 struct ahci_command_slot command_slots[32]; 48 uint32_t hba_capabilities; 49 struct capref hba_cap; 50}; 51 52errval_t ahci_port_alloc_dma_structs(ahci_port_t *port, 53 struct ahci_dma_region **command_list, 54 struct ahci_dma_region **receive_fis); 55 56#endif // _AHCI_UTIL_H 57