1/* 2 * Copyright (c) 2014, University of Washington. 3 * Copyright (c) 2018, ETH Zurich. 4 * All rights reserved. 5 * 6 * This file is distributed under the terms in the attached LICENSE file. 7 * If you do not find this file, copies can be found by writing to: 8 * ETH Zurich D-INFK, CAB F.78, Universitaetstrasse 6, CH-8092 Zurich. 9 * Attn: Systems Group. 10 */ 11 12device vtd msbfirst ( addr base, addr iotlb, addr frr) "VT-d" { 13 //////////////////////////// Translation Structure Formats //////////////////////////// 14 15 datatype root_entry "Root Entry" { 16 _ 64 mbz; 17 ctp 52 "Context-table Pointer"; 18 _ 11 mbz; 19 p 1 "Present"; 20 }; 21 22 datatype ext_root_entry "Extended Root Entry" { 23 uctp 52 "Upper Context-table Pointer"; 24 _ 11 mbz; 25 up 1 "Upper present"; 26 lcpt 52 "Lower Context-table Pointer"; 27 _ 11 mbz; 28 lp 1 "Lower present"; 29 }; 30 31 constants ttype "Translation Type for requests-without-PASID" { 32 hmd = 0b00 "Host mode with Device-TLBs disabled"; 33 hme = 0b01 "Host mode with Device-TLBs enabled"; 34 ptm = 0b10 "Pass-through mode"; 35 //0b011: reserved 36 }; 37 38 constants addr_width "Address Width" { 39 agaw30 = 0b000 "30-bit AGAW (2-level page table)"; 40 agaw39 = 0b001 "39-bit AGAW (3-level page table)"; 41 agaw48 = 0b010 "48-bit AGAW (4-level page table)"; 42 agaw57 = 0b011 "57-bit AGAW (5-level page table)"; 43 agaw64 = 0b100 "64-bit AGAW (6-level page table)"; 44 // 0b101-0b111 are reserved 45 }; 46 47 // Context-entries have the same DID iff their SLPTPTR values are the same. 48 datatype ctxt_entry "Context Entry" { 49 _ 40 mbz; 50 did 16 "Domain Identifier"; 51 _ 1 mbz; 52 _ 4; 53 aw 3 type(addr_width) "Address Width"; 54 slptptr 52 "Second Level Page Translation Pointer"; 55 _ 8 mbz; 56 t 2 type(ttype) "Translation Type"; 57 fpd 1 "Fault Processing Disable"; 58 p 1 "Present"; 59 }; 60 61 datatype ext_ctxt_entry "Extended Context Entry" { 62 pasidstptr 52 "PASID State Table Pointer"; 63 _ 12 mbz; 64 pasidptr 52 "PASID Pointer Table"; 65 _ 8 mbz; 66 pts 4 "PASID Table Size"; 67 pat 32 "Page Attribute Table"; 68 _ 4 mbz; 69 slee 1 "Second-LEvel Execute Enable"; 70 ere 1 "Execute Requests Enable"; 71 eafe 1 "Extended Accessed Flag Enable"; 72 semp 1 "Supervisor Mode Execute Protection"; 73 did 16 "Domain Identifier"; 74 emte 1 "Extended Memory Type Enable"; 75 cd 1 "Cache Disable"; 76 wpe 1 "Write Protect Enable"; 77 nxe 1 "No Execute Enable"; 78 pge 1 "Page Global Enable"; 79 aw 3 "Address Width"; 80 slptptr 52 "Second Level Page Table Pointer"; 81 paside 1 "PASID Enable"; 82 neste 1 "NExted Translation Enable"; 83 pre 1 "Page Requeset Enable"; 84 dinve 1 "Deferred Invalidate Enable"; 85 emt 3 "Extended Memory Type"; 86 t 3 "Translatin Type"; 87 fpd 1 "Fault Processing Disable"; 88 p 1 "Present"; 89 }; 90 91 92 //////////////////////////// Remapping Registers //////////////////////////// 93 94 register VER addr(base, 0x000) "Version Register" { 95 _ 24 mbz; 96 max 4 ro "Major Version number"; 97 min 4 ro "Minor Version number"; 98 }; 99 100 101 constants numdom "Number of domains supported" { 102 nd4 = 0b000 "Hardware supports 4-bit (16 domains)"; 103 nd6 = 0b001 "Hardware supports 6-bit (64 domains)"; 104 nd8 = 0b010 "Hardware supports 8-bit (256 domains)"; 105 nd10 = 0b011 "Hardware supports 10-bit (1024 domains)"; 106 nd12 = 0b100 "Hardware supports 12-bit (4096 domains)"; 107 nd14 = 0b101 "Hardware supports 14-bit (16384 domains)"; 108 nd16 = 0b110 "Hardware supports 16-bit (65536 domains)"; 109 // 0b111 reserved 110 }; 111 112 register CAP addr(base, 0x008) "Capability Register" { 113 _ 3 rsvd; 114 lp5 1 ro "Supports 5-level paging"; 115 pi 1 ro "Posted Interrupts Supported"; 116 _ 2 rsvd; 117 fl1gp 1 ro "First Level 1-GByte Page Support"; 118 drd 1 ro "Read Draining"; 119 dwd 1 ro "Write Draining"; 120 mamv 6 ro "Maximum Address Mask Value"; 121 nfr 8 ro "Number of Fault-recording Registers"; 122 psi 1 ro "Page Selective Invalidation"; 123 _ 1 mbz; 124 _ 2 mbz "Second Level Large Page Support - Reserved"; 125 sllps30 1 ro "Second Level Large Page Support - 1GB page size (30-bit offset to page frame)"; 126 sllps21 1 ro "Second Level Large Page Support - 2MB page size (21-bit offset to page frame)"; 127 fro 10 ro "Fault-recording Register offset"; 128 _ 1 rsvd; 129 zlr 1 ro "Zero Length Read"; 130 mgaw 6 ro "Maximum Guest Address Width"; 131 _ 3 mbz; 132 _ 1 mbz "Supported Adjusted Guest Address Widths - reserved"; 133 sagaw57 1 ro "Supported Adjusted Guest Address Widths - 57-bit AGAW (5-level page-table)"; 134 sagaw48 1 ro "Supported Adjusted Guest Address Widths - 48-bit AGAW (4-level page-table)"; 135 sagaw39 1 ro "Supported Adjusted Guest Address Widths - 39-bit AGAW (3-level page-table)"; 136 _ 1 mbz "Supported Adjusted Guest Address Widths - reserved"; 137 cm 1 ro "Caching Mode"; 138 phmr 1 ro "Protected High-Memory Region"; 139 plmr 1 ro "Protected Low-Memory Region"; 140 rwbf 1 ro "Required Write-Buffer Flushing"; 141 afl 1 ro "Advanced Fault Logging"; 142 nd 3 ro type(numdom) "Number of domains supported"; 143 }; 144 145 register ECAP addr(base, 0x010) "Extended Capability Register" { 146 _ 22 mbz; 147 pds 1 ro "Page-request drain"; 148 dit 1 ro "device TLB invalidation throttle"; 149 pss 5 ro "PASID Size Supported"; 150 eafs 1 ro "Extended Accessed Flag Support"; 151 nwfs 1 ro "No Write Flag Support"; 152 pot 1 ro "PASID-Only Translations"; 153 srs 1 ro "Supervisor Request Support"; 154 ers 1 ro "Execute Request Support"; 155 prs 1 ro "Page Request Support"; 156 pasid 1 ro "Process Address Space ID Support"; 157 dis 1 ro "Deferred Invalidate Support"; 158 nest 1 ro "Nested Translation Support"; 159 mts 1 ro "Memory Type Support"; 160 ecs 1 ro "Extended Context Support"; 161 mhmv 4 ro "Maximum Handle Mask Value"; 162 _ 2 mbz; 163 iro 10 ro "IOTLB Register Offset"; 164 sc 1 ro "Snoop Control"; 165 pt 1 ro "Pass Through"; 166 _ 1 rsvd; 167 eim 1 ro "Extended Interrupt Mode"; 168 ir 1 ro "Interrupt Remapping support"; 169 dt 1 ro "Device-TLB support"; 170 qis 1 ro "Queued Invalidation support"; 171 pwc 1 ro "Page-walk Coherency"; 172 }; 173 174 register GCMD addr(base, 0x018) "Global Command Register" { 175 te 1 wo "Translation Enable"; 176 srtp 1 wo "Set Root Table Pointer"; 177 sfl 1 wo "Set Fault Log"; 178 eafl 1 wo "Enable Advanced Fault Logging"; 179 wbf 1 wo "Write Buffer Flush"; 180 qie 1 wo "Queued Invalidation Enable"; 181 ire 1 wo "Interrupt Remapping Enable"; 182 sirtp 1 wo "Set Interrupt Remap Table Pointer"; 183 cfi 1 wo "Compatibility Format Interrupt"; 184 _ 23 mbz; 185 }; 186 187 register GSTS addr(base, 0x01C) "Global Status Register" { 188 tes 1 ro "Translation Enable Status"; 189 rtps 1 ro "Root Table Pointer Status"; 190 fls 1 ro "Fault Log Status"; 191 afls 1 ro "Advanced Fault Logging Status"; 192 wbfs 1 ro "Write Buffer Flash Status"; 193 qies 1 ro "Queued Invalidation Enable Status"; 194 ires 1 ro "Interrupt Remapping Enable Status"; 195 irtps 1 ro "Interrupt Remaping Table Pointer Status"; 196 cfis 1 ro "Compatibility Format Interrupt Status"; 197 _ 23 mbz; 198 }; 199 200 constants rtt_ "Root Table Type" { 201 rt = 0x0 "Root Table"; 202 ert = 0x1 "Extended Root Table"; 203 }; 204 205 register RTADDR addr(base, 0x020) "Root Table Address Register" { 206 rta 52 rw "Root Table Address"; 207 rtt 1 rw "Root Table Type"; 208 _ 11 mbz; 209 210 }; 211 212 constants irg_ "Context Invalidation Request Granularity" { 213 rsvd_ir = 0b00 "Reserved"; 214 gir = 0b01 "Global Invalidation request"; 215 domir = 0b10 "Domain-selective invalidation request"; 216 devir = 0b11 "Device-selective invalidation request"; 217 }; 218 219 constants aig_ "Context Actual Request Granularity" { 220 rsvd_ip = 0b00 "Reserved"; 221 gip = 0b01 "Global Invalidation performed"; 222 domip = 0b10 "Domain-selective invalidation performed"; 223 devip = 0b11 "Device-selective invalidation performed"; 224 }; 225 226 constants functmask "Function Mask" { 227 nomask = 0b00 "No bits in the SID field masked"; 228 mask2 = 0b01 "Mask bit 2 in the SID field"; 229 mask12 = 0b10 "Mask bits 2:1 in the SID field"; 230 mask012 = 0b11 "Mask bits 2:0 in the SID field"; 231 }; 232 233 234 register CCMD addr(base, 0x028) "Context Command Register" { 235 icc 1 rw "Invalidate Context-Cache"; 236 cirg 2 rw type(irg_) "Context Invalidation Request Granularity"; 237 caig 2 ro type(aig_) "Context Actual Invalidation Granularity"; 238 _ 25 mbz; 239 fm 2 wo type(functmask) "Function Mask"; 240 sid 16 wo "Source-ID"; 241 did 16 rw "Domain-ID"; 242 }; 243 244 245 register FSTS addr(base, 0x034) "Fault Status Register " { 246 _ 16 rsvd; 247 fri 8 rw1cs "Fault Record Index"; 248 pro 1 rw1cs "Page Request Overflow"; 249 ite 1 rw1cs "Invalidation Timeout Error"; 250 ice 1 rw1cs "Invalidation Completion Error"; 251 iqe 1 rw1cs "Invalidation Queue Error"; 252 apf 1 rw1cs "Advanced Pending Fault"; 253 afo 1 rw1cs "Advanced Fault Overflow"; 254 ppf 1 rw1cs "Primary Pending Fault"; 255 pfo 1 rw1cs "Primary Fault Overflow"; 256 }; 257 258 259 register FECTL addr(base, 0x038) "Fault Event Control Register" { 260 im 1 rw "Interrupt mask"; 261 ip 1 ro "Interrupt Pending"; 262 _ 30 rsvd; 263 }; 264 265 266 register FEDATA addr(base, 0x03C) "Fault Event Data Register" { 267 eimd 16 rw "Extended Interrupt Message Data"; 268 imd 16 rw "Interrupt Message Data"; 269 }; 270 271 register FEADDR addr(base, 0x040) "Fault Event Address Register" { 272 ma 30 rw "Message address"; 273 _ 2 rsvd; 274 }; 275 276 register FEUADDR addr(base, 0x044) "Fault Event Upper Address Register" { 277 mua 32 rw "Message upper address"; 278 }; 279 280 281 register AFLOG addr(base, 0x058) "Advanced Fault Log Register" { 282 fla 52 rw "Fault log address"; 283 fls 3 rw "Fault log size in bits x 4K pages"; 284 _ 9 rsvd; 285 }; 286 287 register PMEN addr(base, 0x064) "Protected Memory Enable Register" { 288 epm 1 rw "Enable Protected memory"; 289 _ 30 rsvd; 290 prs 1 ro "Protected Region Status"; 291 }; 292 293 register PLMBASE addr(base, 0x068) "Protected Low Memory Base Register" { 294 plmb 20 rw "Protected Low-Memory Base"; 295 _ 12 rsvd; 296 }; 297 298 register PLMLIMIT addr(base, 0x06C) "Protected Low Memory Limit Register" { 299 plmb 20 rw "Protected Low-Memory Limit"; 300 _ 12 rsvd; 301 }; 302 303 register PHMBASE addr(base, 0x070) "Protected High Memory Base Register" { 304 phmb 52 rw "Protected High-Memory Base"; 305 _ 12 rsvd; 306 }; 307 308 register PHMLIMIT addr(base, 0x078) "Protected High Memory Limit Register" { 309 phml 52 rw "Protected High-Memory Limit"; 310 _ 12 rsvd; 311 }; 312 313 register IQH addr(base, 0x080) "Invalidation Queue Head" { 314 _ 46 rsvd; 315 qh 14 ro "Queue Head"; 316 _ 4 rsvd; 317 }; 318 319 register IQT addr(base, 0x088) "Invalidation Queue Tail" { 320 _ 46 rsvd; 321 qt 14 rw "Queue Tail"; 322 _ 4 rsvd; 323 }; 324 325 register IQA addr(base, 0x090) "Invalidation Queue Address" { 326 iqa 52 rw "Ivalidation Queue Base Address"; 327 _ 9 rsvd; 328 qs 3 rw "Queue Size"; 329 }; 330 331 register ICS addr(base, 0x09C) "Invalidation Completion Status" { 332 _ 31 rsvd; 333 iwc 1 rw1cs "Invalidation Wait Descriptor Complete"; 334 }; 335 336 337 register IECTL addr(base, 0x0A0) "Invalidation Completion Event" { 338 im 1 rw "Interrupt Mask"; 339 ip 1 ro "Interrupt Pending"; 340 _ 30 rsvd; 341 }; 342 343 register IEDATA addr(base, 0x0A4) "Invalidation Completion Event Data" { 344 eimd 16 rw "Extended Interrupt Message Data"; 345 imd 16 rw "Interrupt Message data"; 346 }; 347 348 349 register IEADDR addr(base, 0x0A8) "Invalidation Completion Event Address" { 350 ma 30 rw "Message address"; 351 _ 2 rsvd; 352 }; 353 354 355 register IEUADDR addr(base, 0x0AC) "Invalidation Completion Event Upper Address Register" { 356 mua 32 rw "Message upper address"; 357 }; 358 359 register IRTA addr(base, 0x0B8) "Interrupt Remapping Table Address Register" { 360 irta 52 rw "Interrupt Remapping Table Address"; 361 eime 1 rw "Extended Interrupt Mode Enable"; 362 _ 7 rsvd; 363 s 4 rw "Size"; 364 }; 365 366 register PQH addr(base, 0x0C0) "Page Request Queue Head Register" { 367 _ 46 rsvd; 368 pqh 14 rw "Page Queue Head"; 369 _ 4 rsvd; 370 }; 371 372 register PQT addr(base, 0x0C8) "Page Request Queue Tail Register" { 373 _ 46 rsvd; 374 pqt 14 rw "Page Queue Tail"; 375 _ 4 rsvd; 376 }; 377 378 register PQA addr(base, 0x0D0) "Page Request Queue Address Register" { 379 pqa 52 rw "Page Request Queue Base Address"; 380 _ 9 rsvd; 381 pqs 3 rw "Pgae Queue Size"; 382 }; 383 384 register PRS addr(base, 0x0DC) "Page Request Status Register" { 385 _ 31 rsvd; 386 ppr 1 rw1cs "Pending Page Request"; 387 }; 388 389 register PECTL addr(base, 0x0E0) "Page Request Event Control Register" { 390 im 1 rw "Interrupt mask"; 391 pe 1 ro "Interrupt Pending"; 392 _ 30 rsvd; 393 }; 394 395 register PEDATA addr(base, 0x0E4) "Page Request Event Data Register" { 396 eimd 16 rw "Extended Interrupt Message Data"; 397 imd 16 rw "Interrupt Message Data"; 398 }; 399 400 register PEADDR addr(base, 0x0E8) "Page Request Event Address Register" { 401 ma 30 rw "Message address"; 402 _ 2 rsvd; 403 }; 404 405 register PEUADDR addr(base, 0x0EC) "Page Request Event Upper Address Register" { 406 mua 32 rw "Message upper address"; 407 }; 408 409 410 /* TODO: Memory Type Range Registers */ 411 412 413 ////////////////////////////// IOTLB Registers ////////////////////////////// 414 415 register IVA addr(iotlb, 0x000) "Invalidate Address Register" { 416 addr 52 wo "Address"; 417 _ 5 mbz; 418 ih 1 wo "Invalidation Hint"; 419 am 6 wo "Address Mask"; 420 }; 421 422 register IOTLB addr(iotlb, 0x008) "IOTLB Invalidate Register" { 423 ivt 1 rw "Invalidate IOTLB"; 424 _ 1 mbz; 425 iirg 2 rw type(irg_) "IOTLB Invalidation Request Granularity"; 426 _ 1 mbz; 427 iaig 2 ro type(aig_) "IOTLB Actual Invalidation Granularity"; 428 _ 7 mbz; 429 dr 1 rw "Drain Reads"; 430 dw 1 rw "Drain Writes"; 431 did 16 rw "Domain-ID"; 432 _ 32 mbz; 433 }; 434 435 ///////////////////////// Fault Recording Registers ///////////////////////// 436 437 regarray FRCD_Lo addr(frr, 0x0) [256;16] "Fault Recording Register Lo" { 438 fi 52 ros "Fault Info"; 439 _ 12 rsvd; 440 }; 441 442 regarray FRCD_Hi addr(frr, 0x8) [256;16] "Fault Recording Register Hi" { 443 f 1 rw1cs "Fault"; 444 t 1 ros "Type"; 445 at 2 ros "Address Type"; 446 pv 20 ros "PASID Value"; 447 fr 8 ros "Fault reason"; 448 pp 1 ros "PASID Present"; 449 exe 1 ros "Execute Permission Requested"; 450 priv 1 ros "Privilege Mode Requested"; 451 _ 13 rsvd; 452 sid 16 ros "Source Identifier"; 453 }; 454}; 455