1/*
2 * Copyright (c) 2013 ETH Zurich. All rights reserved.
3 *
4 * This file is distributed under the terms in the attached LICENSE file.
5 * If you do not find this file, copies can be found by writing to:
6 * ETH Zurich D-INFK, CAB F.78, Universitaetstrasse 6, CH-8092 Zurich,
7 * Attn: Systems Group.
8 */
9
10/*
11 * omap44xx_per_ia_0.dev
12 *
13 * DESCRIPTION: 
14 *
15 * NOTE: This file has been automatically generated based on the
16 * XML files extracted from the TI RDT v1.0.0.4p Tool.
17 * Download from here: http://www.ti.com/product/omap4460
18 * This means that the file might not be optimal in terms of naming
19 * conventions for constants and registers (duplicated
20 * namespaces in register and device name etc.).
21 * Also, because of the underlying structure from the original XML
22 * it's possible that some constants appear multiple times (if they
23 * have slightly different descriptions for example).
24 *
25 * You want to clean that up before using the files for the first time!
26 */
27 
28device omap44xx_per_ia_0 msbfirst ( addr base ) "" {
29    
30    
31    register l4_ia_component_l addr(base, 0x0) "COMPONENT register identifies the component to which this register block belongs. The register contains a component code and revision, which are used to identify the hardware of the component. The COMPONENT register is read-only." {
32        code 16 ro "Interconnect code";
33        rev 16 ro "Component revision code";
34    };
35    
36    register l4_ia_component_h ro addr(base, 0x4) "COMPONENT register identifies the component to which this register block belongs. The register contains a component code and revision, which are used to identify the hardware of the component. The COMPONENT register is read-only." type(uint32);
37    
38    register l4_ia_core_l addr(base, 0x18) "Provide information about the core initiator" {
39        core_code 16 ro "Interconnect core code";
40        core_rev 16 ro "Component revision code code";
41    };
42    
43    register l4_ia_core_h addr(base, 0x1C) "Provide information about the core initiator" {
44        _ 16 mbz;
45        vendor_code 16 ro "Vendor revision core code";
46    };
47    
48    register l4_ia_agent_control_l addr(base, 0x20) "Enable error reporting on an initiator interface.The error reporting mechanism is enabled when the INBAND_ERROR_REP bit field is set to 1. The out-of-band OCP MError reporting mechanism is enabled when the MERROR_REP bit field is set to 1." {
49        prot_error_secondary_rep 1 rw "Out-of-band reporting of protection mechanism secondary errors";
50        prot_error_primary_rep 1 rw "Out-of-band reporting of protection mechanism primary errors";
51        _ 2 mbz;
52        inband_error_rep 1 rw "Setting this field to 1 reports on in-band errors using the INBAND_ERROR log bit of IA.AGENT_STATUS register.";
53        _ 27 mbz;
54    };
55    
56    register l4_ia_agent_control_h ro addr(base, 0x24) "Enable error reporting on an initiator interface." type(uint32);
57    
58    register l4_ia_agent_status_l addr(base, 0x28) "Stores status information for an initiator. The INBAND_ERROR and MERROR fields are read/write and are implemented as log bits." {
59        prot_error_secondary 1 rw1c "0x0: Secondary Protection error not present.0x1: Secondary Protection error present";
60        prot_error_primary 1 rw1c "0x0: Primary Protection error not present.0x1: Primary Protection error present";
61        _ 2 mbz;
62        inband_error 1 rw1c "0x0 No In-Band error present.0x1 In-Band error present.";
63        _ 27 mbz;
64    };
65    
66    register l4_ia_agent_status_h ro addr(base, 0x2C) "Stores status information for an initiator." type(uint32);
67    
68    register l4_ia_error_log_l addr(base, 0x58) "Log information about error conditions. The CODE field logs any protection violation or address hole errors detected by the initiator subsystem while decoding a request." {
69        multi 1 rw1c "Multiple errors detected";
70        secondary 1 rw1c "Indicates whether protection violation was a primary or secondary error";
71        _ 4 mbz;
72        code 2 rw1c "The error code of an initiator request.0x00: No errors0x01: Reserved0x10: Address hole0x11: Protection violation";
73        _ 10 mbz;
74        connid 6 ro "ConnID of request causing the error, refer to";
75        _ 5 mbz;
76        cmd 3 ro "Command that caused error";
77    };
78    
79    register l4_ia_error_log_h addr(base, 0x5C) "Log information about error conditions." {
80        _ 16 mbz;
81        req_info 16 ro "MReqInfo bits of request that caused the errorREQ_INFO[0] = supervisor,REQ_INFO[1] = Debug";
82    };
83    
84    register l4_ia_error_log_addr_l ro addr(base, 0x60) "Extended error log (address information)" type(uint32);
85    
86    register l4_ia_error_log_addr_h ro addr(base, 0x64) "Extended error log (address information)" type(uint32);
87};