1/* 2 * Copyright (c) 2007, ETH Zurich. All rights reserved. 3 * 4 * This file is distributed under the terms in the attached LICENSE file. 5 * If you do not find this file, copies can be found by writing to: 6 * ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group. 7 */ 8 9/* 10 * ac97_ext_audio.dev 11 * 12 * DESCRIPTION: AC'97 Extended Audio Register Set 13 * 14 * Numbers in comments refer to the Intel Audio Codec '97 specification, 15 * revision 2.3 revision 1.0, April, 2002 16 */ 17 18device ac97_ext_audio msbfirst ( io base ) "AC97 Extended Audio" { 19 20 // 5.8.1 21 constants rev_id "Revison ID" { 22 r21 = 0 "Rev. 2.1 or earlier"; 23 r22 = 1 "Rev. 2.2"; 24 r23 = 2 "Rev. 2.3"; 25 unk = 3 "Unknown"; 26 }; 27 register eaid ro io( base, 0x28) "Extended audio id" { 28 id 2 "Id"; 29 _ 2 rsvd; 30 rev 2 type(rev_id) "Revision ID"; 31 amap 1 "Slot/DAC mapping support"; 32 ldac 1 "PCM LFE DAC support"; 33 sdac 1 "PCM Surround L&R DACs support"; 34 cdac 1 "PCM Center DAC support"; 35 dsa 2 rw "DAC slot assignment"; 36 vrm 1 "Variable rate mic support"; 37 spdif 1 "SPDIF transmitter support"; 38 dra 1 "Double-rate PCM audio support"; 39 vra 1 "Variable rate PCM audion support"; 40 }; 41 42 // 5.8.2 43 register easc rw io( base, 0x2a ) "Extended audio status and control" { 44 vcfg 1 "S/PDIF validity flag"; 45 prl 1 "MIC ADC off"; 46 prk 1 "PCM LFE DACs off"; 47 prj 1 "PCM surround DACs off"; 48 pri 1 "PCM center DAC off"; 49 spcv 1 ro "S/PDIF configuration valid"; 50 madc 1 ro "Mic ADC ready"; 51 ldac 1 ro "PCM LFE DAC ready"; 52 sdac 1 ro "PCM Surround L&R DACs ready"; 53 cdac 1 ro "PCM Center DAC ready"; 54 dsa 2 "DAC slot assignment"; 55 vrm 1 "Variable rate mic enable"; 56 spdif 1 "SPDIF transmitter enable"; 57 dra 1 "Double-rate PCM audio enable"; 58 vra 1 "Variable rate PCM audion enable"; 59 }; 60 61 // 5.8.3 62 register front_sr rw io( base, 0x2c) "PCM front DAC rate" type(uint16); 63 register surr_sr rw io( base, 0x2e) "PCM surround DAC rate" type(uint16); 64 register lfe_sr rw io( base, 0x30) "PCM LFE DAC rate" type(uint16); 65 register lr_sr rw io( base, 0x32) "PCM left/right DAC rate" type(uint16); 66 register mic_sr rw io( base, 0x34) "MIC ADC rate" type(uint16); 67 68 // 5.8.4 69 register center_vc rw io( base, 0x36) "Center/LFE volume" { 70 lfe_mute 1 "LFE mute"; 71 _ 1 rsvd; 72 lfe_vol 6 "LFE volume"; 73 cntr_mute 1 "Center mute"; 74 _ 1 rsvd; 75 cntr_vol 6 "Center volume"; 76 }; 77 register surr_vc rw io( base, 0x38) "Surround volume" { 78 left_mute 1 "Left mute"; 79 _ 1 rsvd; 80 left_vol 6 "Left volume"; 81 right_mute 1 "Right mute"; 82 _ 1 rsvd; 83 right_vol 6 "Right volume"; 84 }; 85 86 // 5.8.5 87 constants spdif_sr "S/PDIF sample rate" { 88 sr_441 = 0 "44.1kHz"; 89 sr_rsvd = 0 "reserved"; 90 sr_48 = 0 "48kHz"; 91 sr_32 = 0 "32Hz"; 92 }; 93 register spdif_cntl rw io( base, 0x3a) "S/PDIF control" { 94 v 1 "validity"; 95 drs 1 "Double rate"; 96 spsr 2 type(spdif_sr) "Sample rate"; 97 l 1 "General level"; 98 cc 7 "Category code"; 99 pre 1 "Preemphasis"; 100 copy 1 "Copyright"; 101 notaudio 1 "Non-PCM format"; 102 pro 1 "Professional"; 103 }; 104 105 // 5.8.8 106 register vid1 ro io( base, 0x7c) "Vendor ID 1" { 107 f 8 "First PnP vendor ID code"; 108 s 8 "Second PnP vendor ID code"; 109 }; 110 register vid2 ro io( base, 0x7e) "Vendor ID 2" { 111 t 8 "Third PnP vendor ID code"; 112 dev 8 "Vendor-specific device ID"; 113 }; 114 115}; 116