1/* System initialisation shim
2
3   This code is executed on boot, by the simulator, to initialise the hardware
4   as the CPU driver expects it i.e. as initialised by UEFI/Hagfish.
5*/
6
7#define ASM_FILE
8#include <multiboot2.h>
9
10#define SHIM_STACK 256
11
12.global invalidate_caches, start
13
14/* We should begin in EL3, caches disabled. */
15start:
16    /* A small stack to call into C. */
17    adr x0, shim_stack
18    add sp, x0, #(SHIM_STACK - 8)
19
20    /* Invalidate the TLB */
21    tlbi alle3
22
23    /* Load the table base register, table must map this code 1-1. */
24    ldr x0, p_kernel_table
25    msr ttbr0_el3, x0
26
27    /* Set memory attribute 0 to Normal, inner and outer WB, non-transient.
28     * Set memory attribute 1 to Device, nGnRnE (strongly ordered). */
29    mov x0, #0x00ff
30    msr mair_el3, x0
31
32    /* Set the translation paramaters. */
33    mov x1, xzr
34    mov x2, #5
35    bfi x1, x2, #16, 3   /* 48b PA */
36    /* orr x1, x1, #(0<<14) */ /* 4kB granule */
37    orr x1, x1, #(3<<12) /* Table IS */
38    orr x1, x1, #(1<<10) /* Table Outer WB, WA */
39    orr x1, x1, #(1<< 8) /* Table Inner WB, WA */
40    orr x1, x1, #16      /* 48b VA */
41    msr tcr_el3, x1
42    dsb sy
43
44    /* Enable the MMU. */
45    mrs x0, sctlr_el3
46    orr x0, x0, #(1<<0) /* MMU control bit. */
47    msr sctlr_el3, x0
48    isb
49
50    /* Enable Caches. */
51    bl invalidate_caches
52    dmb sy
53    isb
54    mrs x0, sctlr_el3
55    orr x0, x0, #(1<<2) /* Cache control bit. */
56    msr sctlr_el3, x0
57
58    /* Switch to the kernel stack. */
59    ldr x2, p_kernel_stack_top
60    mov sp, x2
61
62    /* Jump to the kernel entry point, passing the multiboot magic (boot
63     * core), the address of the multiboot header, and the top of the kernel
64     * stack. */
65    ldr x0, magic
66    ldr x1, p_multiboot
67    ldr x5, p_entry
68    br x5
69
70/* These pointers are filled in at load time. */
71.align 8
72p_entry:            .dword 0
73p_multiboot:        .dword 0
74p_kernel_table:     .dword 0
75p_kernel_stack_top: .dword 0
76
77magic:
78    .word MULTIBOOT2_BOOTLOADER_MAGIC
79
80.align 8
81shim_stack:
82    .space SHIM_STACK
83