1/* 2 3 * Copyright (c) 2007, 2014 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 * 33 34 35 #include <linux/etherdevice.h> 36 #include <linux/delay.h> 37 #include <linux/slab.h> 38 #ifdef CONFIG_NET_RX_BUSY_POLL 39 #include <net/busy_poll.h> 40 #endif 41 42 #include <linux/list.h> 43 #include <linux/if_ether.h> 44 45 #include <linux/mlx4/driver.h> 46 #include <linux/mlx4/device.h> 47 #include <linux/mlx4/cmd.h> 48 #include <linux/mlx4/cq.h> 49 50 #include <sys/sockio.h> 51 #include <sys/sysctl.h> 52 */ 53#include <barrelfish/deferred.h> 54#include <barrelfish/sys_debug.h> 55#include <barrelfish/systime.h> 56 57#include <linux/net/ethernet.h> 58#include <linux/net/if_types.h> 59 60#include <linux/mlx4/driver.h> 61#include <linux/mlx4/cq.h> 62 63#include <linux/log2.h> 64#include <linux/if_ether.h> 65#include <linux/gfp.h> 66 67#include <debug_log/debug_log.h> 68 69#include <debug.h> 70 71#include "mlx4_devif_queue.h" 72#include "mlx4_en.h" 73/* 74 #include "en_port.h" 75 76 static void mlx4_en_sysctl_stat(struct mlx4_en_priv *priv); 77 static void mlx4_en_sysctl_conf(struct mlx4_en_priv *priv); 78 static int mlx4_en_unit; 79 80 #ifdef CONFIG_NET_RX_BUSY_POLL 81 must be called with local_bh_disable()d 82 static int mlx4_en_low_latency_recv(struct napi_struct *napi) 83 { 84 struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi); 85 struct net_device *dev = cq->dev; 86 struct mlx4_en_priv *priv = netdev_priv(dev); 87 struct mlx4_en_rx_ring *rx_ring = priv->rx_ring[cq->ring]; 88 int done; 89 90 if (!priv->port_up) 91 return LL_FLUSH_FAILED; 92 93 if (!mlx4_en_cq_lock_poll(cq)) 94 return LL_FLUSH_BUSY; 95 96 done = mlx4_en_process_rx_cq(dev, cq, 4); 97 #ifdef LL_EXTENDED_STATS 98 if (done) 99 rx_ring->cleaned += done; 100 else 101 rx_ring->misses++; 102 #endif 103 104 mlx4_en_cq_unlock_poll(cq); 105 106 return done; 107 } 108 #endif CONFIG_NET_RX_BUSY_POLL 109 110 #ifdef CONFIG_RFS_ACCEL 111 112 struct mlx4_en_filter { 113 struct list_head next; 114 struct work_struct work; 115 116 u8 ip_proto; 117 __be32 src_ip; 118 __be32 dst_ip; 119 __be16 src_port; 120 __be16 dst_port; 121 122 int rxq_index; 123 struct mlx4_en_priv *priv; 124 u32 flow_id; RFS infrastructure id 125 int id; mlx4_en driver id 126 u64 reg_id; Flow steering API id 127 u8 activated; Used to prevent expiry before filter 128 * is attached 129 130 struct hlist_node filter_chain; 131 }; 132 133 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv); 134 135 static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto) 136 { 137 switch (ip_proto) { 138 case IPPROTO_UDP: 139 return MLX4_NET_TRANS_RULE_ID_UDP; 140 case IPPROTO_TCP: 141 return MLX4_NET_TRANS_RULE_ID_TCP; 142 default: 143 return -EPROTONOSUPPORT; 144 } 145 }; 146 147 static void mlx4_en_filter_work(struct work_struct *work) 148 { 149 struct mlx4_en_filter *filter = container_of(work, 150 struct mlx4_en_filter, 151 work); 152 struct mlx4_en_priv *priv = filter->priv; 153 struct mlx4_spec_list spec_tcp_udp = { 154 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto), 155 { 156 .tcp_udp = { 157 .dst_port = filter->dst_port, 158 .dst_port_msk = (__force __be16)-1, 159 .src_port = filter->src_port, 160 .src_port_msk = (__force __be16)-1, 161 }, 162 }, 163 }; 164 struct mlx4_spec_list spec_ip = { 165 .id = MLX4_NET_TRANS_RULE_ID_IPV4, 166 { 167 .ipv4 = { 168 .dst_ip = filter->dst_ip, 169 .dst_ip_msk = (__force __be32)-1, 170 .src_ip = filter->src_ip, 171 .src_ip_msk = (__force __be32)-1, 172 }, 173 }, 174 }; 175 struct mlx4_spec_list spec_eth = { 176 .id = MLX4_NET_TRANS_RULE_ID_ETH, 177 }; 178 struct mlx4_net_trans_rule rule = { 179 .list = LIST_HEAD_INIT(rule.list), 180 .queue_mode = MLX4_NET_TRANS_Q_LIFO, 181 .exclusive = 1, 182 .allow_loopback = 1, 183 .promisc_mode = MLX4_FS_REGULAR, 184 .port = priv->port, 185 .priority = MLX4_DOMAIN_RFS, 186 }; 187 int rc; 188 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); 189 190 if (spec_tcp_udp.id < 0) { 191 MLX4_WARN( "RFS: ignoring unsupported ip protocol (%d)\n", 192 filter->ip_proto); 193 goto ignore; 194 } 195 list_add_tail(&spec_eth.list, &rule.list); 196 list_add_tail(&spec_ip.list, &rule.list); 197 list_add_tail(&spec_tcp_udp.list, &rule.list); 198 199 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn; 200 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN); 201 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); 202 203 filter->activated = 0; 204 205 if (filter->reg_id) { 206 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); 207 if (rc && rc != -ENOENT) 208 MLX4_ERR( "Error detaching flow. rc = %d\n", rc); 209 } 210 211 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id); 212 if (rc) 213 MLX4_ERR( "Error attaching flow. err = %d\n", rc); 214 215 ignore: 216 mlx4_en_filter_rfs_expire(priv); 217 218 filter->activated = 1; 219 } 220 221 static inline struct hlist_head * 222 filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, 223 __be16 src_port, __be16 dst_port) 224 { 225 unsigned long l; 226 int bucket_idx; 227 228 l = (__force unsigned long)src_port | 229 ((__force unsigned long)dst_port << 2); 230 l ^= (__force unsigned long)(src_ip ^ dst_ip); 231 232 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT); 233 234 return &priv->filter_hash[bucket_idx]; 235 } 236 237 static struct mlx4_en_filter * 238 mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip, 239 __be32 dst_ip, u8 ip_proto, __be16 src_port, 240 __be16 dst_port, u32 flow_id) 241 { 242 struct mlx4_en_filter *filter = NULL; 243 244 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC); 245 if (!filter) 246 return NULL; 247 248 filter->priv = priv; 249 filter->rxq_index = rxq_index; 250 INIT_WORK(&filter->work, mlx4_en_filter_work); 251 252 filter->src_ip = src_ip; 253 filter->dst_ip = dst_ip; 254 filter->ip_proto = ip_proto; 255 filter->src_port = src_port; 256 filter->dst_port = dst_port; 257 258 filter->flow_id = flow_id; 259 260 filter->id = priv->last_filter_id++ % RPS_NO_FILTER; 261 262 list_add_tail(&filter->next, &priv->filters); 263 hlist_add_head(&filter->filter_chain, 264 filter_hash_bucket(priv, src_ip, dst_ip, src_port, 265 dst_port)); 266 267 return filter; 268 } 269 270 static void mlx4_en_filter_free(struct mlx4_en_filter *filter) 271 { 272 struct mlx4_en_priv *priv = filter->priv; 273 int rc; 274 275 list_del(&filter->next); 276 277 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); 278 if (rc && rc != -ENOENT) 279 MLX4_ERR( "Error detaching flow. rc = %d\n", rc); 280 281 kfree(filter); 282 } 283 284 static inline struct mlx4_en_filter * 285 mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, 286 u8 ip_proto, __be16 src_port, __be16 dst_port) 287 { 288 struct hlist_node *elem; 289 struct mlx4_en_filter *filter; 290 struct mlx4_en_filter *ret = NULL; 291 292 hlist_for_each_entry(filter, elem, 293 filter_hash_bucket(priv, src_ip, dst_ip, 294 src_port, dst_port), 295 filter_chain) { 296 if (filter->src_ip == src_ip && 297 filter->dst_ip == dst_ip && 298 filter->ip_proto == ip_proto && 299 filter->src_port == src_port && 300 filter->dst_port == dst_port) { 301 ret = filter; 302 break; 303 } 304 } 305 306 return ret; 307 } 308 309 static int 310 mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb, 311 u16 rxq_index, u32 flow_id) 312 { 313 struct mlx4_en_priv *priv = netdev_priv(net_dev); 314 struct mlx4_en_filter *filter; 315 const struct iphdr *ip; 316 const __be16 *ports; 317 u8 ip_proto; 318 __be32 src_ip; 319 __be32 dst_ip; 320 __be16 src_port; 321 __be16 dst_port; 322 int nhoff = skb_network_offset(skb); 323 int ret = 0; 324 325 if (skb->protocol != htons(ETH_P_IP)) 326 return -EPROTONOSUPPORT; 327 328 ip = (const struct iphdr *)(skb->data + nhoff); 329 if (ip_is_fragment(ip)) 330 return -EPROTONOSUPPORT; 331 332 if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP)) 333 return -EPROTONOSUPPORT; 334 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl); 335 336 ip_proto = ip->protocol; 337 src_ip = ip->saddr; 338 dst_ip = ip->daddr; 339 src_port = ports[0]; 340 dst_port = ports[1]; 341 342 spin_lock_bh(&priv->filters_lock); 343 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto, 344 src_port, dst_port); 345 if (filter) { 346 if (filter->rxq_index == rxq_index) 347 goto out; 348 349 filter->rxq_index = rxq_index; 350 } else { 351 filter = mlx4_en_filter_alloc(priv, rxq_index, 352 src_ip, dst_ip, ip_proto, 353 src_port, dst_port, flow_id); 354 if (!filter) { 355 ret = -ENOMEM; 356 goto err; 357 } 358 } 359 360 queue_work(priv->mdev->workqueue, &filter->work); 361 362 out: 363 ret = filter->id; 364 err: 365 spin_unlock_bh(&priv->filters_lock); 366 367 return ret; 368 } 369 370 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv, 371 struct mlx4_en_rx_ring *rx_ring) 372 { 373 struct mlx4_en_filter *filter, *tmp; 374 LIST_HEAD(del_list); 375 376 spin_lock_bh(&priv->filters_lock); 377 list_for_each_entry_safe(filter, tmp, &priv->filters, next) { 378 list_move(&filter->next, &del_list); 379 hlist_del(&filter->filter_chain); 380 } 381 spin_unlock_bh(&priv->filters_lock); 382 383 list_for_each_entry_safe(filter, tmp, &del_list, next) { 384 cancel_work_sync(&filter->work); 385 mlx4_en_filter_free(filter); 386 } 387 } 388 389 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv) 390 { 391 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL; 392 LIST_HEAD(del_list); 393 int i = 0; 394 395 spin_lock_bh(&priv->filters_lock); 396 list_for_each_entry_safe(filter, tmp, &priv->filters, next) { 397 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA) 398 break; 399 400 if (filter->activated && 401 !work_pending(&filter->work) && 402 rps_may_expire_flow(priv->dev, 403 filter->rxq_index, filter->flow_id, 404 filter->id)) { 405 list_move(&filter->next, &del_list); 406 hlist_del(&filter->filter_chain); 407 } else 408 last_filter = filter; 409 410 i++; 411 } 412 413 if (last_filter && (&last_filter->next != priv->filters.next)) 414 list_move(&priv->filters, &last_filter->next); 415 416 spin_unlock_bh(&priv->filters_lock); 417 418 list_for_each_entry_safe(filter, tmp, &del_list, next) 419 mlx4_en_filter_free(filter); 420 } 421 #endif 422 423 static void mlx4_en_vlan_rx_add_vid(void *arg, struct net_device *dev, u16 vid) 424 { 425 struct mlx4_en_priv *priv = netdev_priv(dev); 426 struct mlx4_en_dev *mdev = priv->mdev; 427 int err; 428 int idx; 429 430 if (arg != priv) 431 return; 432 433 MLX4_DEBUG( "adding VLAN:%d\n", vid); 434 435 set_bit(vid, priv->active_vlans); 436 437 Add VID to port VLAN filter 438 mutex_lock(&mdev->state_lock); 439 if (mdev->device_up && priv->port_up) { 440 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); 441 if (err) 442 MLX4_ERR( "Failed configuring VLAN filter\n"); 443 } 444 if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx)) 445 MLX4_DEBUG( "failed adding vlan %d\n", vid); 446 mutex_unlock(&mdev->state_lock); 447 448 } 449 450 static void mlx4_en_vlan_rx_kill_vid(void *arg, struct net_device *dev, u16 vid) 451 { 452 struct mlx4_en_priv *priv = netdev_priv(dev); 453 struct mlx4_en_dev *mdev = priv->mdev; 454 int err; 455 456 if (arg != priv) 457 return; 458 459 MLX4_DEBUG( "Killing VID:%d\n", vid); 460 461 clear_bit(vid, priv->active_vlans); 462 463 Remove VID from port VLAN filter 464 mutex_lock(&mdev->state_lock); 465 mlx4_unregister_vlan(mdev->dev, priv->port, vid); 466 467 if (mdev->device_up && priv->port_up) { 468 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); 469 if (err) 470 MLX4_ERR( "Failed configuring VLAN filter\n"); 471 } 472 mutex_unlock(&mdev->state_lock); 473 474 } 475 476*/ 477static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv, uint64_t mac, 478 int *qpn, u64 *reg_id) { 479 struct mlx4_en_dev *mdev = priv->mdev; 480 struct mlx4_dev *dev = mdev->dev; 481 int err; 482 483 switch (dev->caps.steering_mode) { 484 case MLX4_STEERING_MODE_B0: { 485 struct mlx4_qp qp; 486 u8 gid[16] = { 0 }; 487 488 qp.qpn = *qpn; 489 gid[15] = mac >> 40; 490 gid[14] = mac >> 32; 491 gid[13] = mac >> 24; 492 gid[12] = mac >> 16; 493 gid[11] = mac >> 8; 494 gid[10] = mac >> 0; 495 gid[5] = priv->port; 496 497 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH); 498 break; 499 } 500 case MLX4_STEERING_MODE_DEVICE_MANAGED: { 501 // struct mlx4_spec_list spec_eth = { { NULL } }; 502 // __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); 503 // 504 // struct mlx4_net_trans_rule rule = { .queue_mode = MLX4_NET_TRANS_Q_FIFO, 505 // .exclusive = 0, .allow_loopback = 1, .promisc_mode = 506 // MLX4_FS_REGULAR, .priority = MLX4_DOMAIN_NIC, }; 507 // 508 // rule.port = priv->port; 509 // rule.qpn = *qpn; 510 // INIT_LIST_HEAD(&rule.list); 511 // 512 // spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH; 513 // memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN); 514 // memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); 515 // list_add_tail(&spec_eth.list, &rule.list); 516 // 517 // err = mlx4_flow_attach(dev, &rule, reg_id); 518 // break; 519 } 520 default: 521 return -EINVAL; 522 } 523 if (err) 524 MLX4_WARN("Failed Attaching Unicast\n"); 525 return err; 526} 527 528/* 529 static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv, 530 unsigned char *mac, int qpn, u64 reg_id) 531 { 532 struct mlx4_en_dev *mdev = priv->mdev; 533 struct mlx4_dev *dev = mdev->dev; 534 535 switch (dev->caps.steering_mode) { 536 case MLX4_STEERING_MODE_B0: { 537 struct mlx4_qp qp; 538 u8 gid[16] = {0}; 539 540 qp.qpn = qpn; 541 memcpy(&gid[10], mac, ETH_ALEN); 542 gid[5] = priv->port; 543 544 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH); 545 break; 546 } 547 case MLX4_STEERING_MODE_DEVICE_MANAGED: { 548 mlx4_flow_detach(dev, reg_id); 549 break; 550 } 551 default: 552 MLX4_ERR( "Invalid steering mode.\n"); 553 } 554 } 555 */ 556static int mlx4_en_get_qp(struct mlx4_en_priv *priv) { 557 struct mlx4_en_dev *mdev = priv->mdev; 558 struct mlx4_dev *dev = mdev->dev; 559 /*struct mlx4_mac_entry *entry;*/ 560 int index = 0; 561 int err = 0; 562 u64 reg_id; 563 int *qpn = &priv->base_qpn; 564 565 /*HARDWIRE*/ 566 u64 mac = priv->devif_queue->mac_address; 567 568 MLX4_DEBUG("Registering MAC: pM for adding\n"/*, IF_LLADDR(priv->dev)*/); 569 index = mlx4_register_mac(dev, priv->port, mac); 570 if (index < 0) { 571 err = index; 572 MLX4_ERR("Failed adding MAC: pM\n"/*, IF_LLADDR(priv->dev)*/); 573 return err; 574 } 575 576 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { 577 int base_qpn = mlx4_get_base_qpn(dev, priv->port); 578 *qpn = base_qpn + index; 579 return 0; 580 } 581 582 err = mlx4_qp_reserve_range(dev, 1, 1, qpn, 0); 583 MLX4_DEBUG("Reserved qp %d\n", *qpn); 584 if (err) { 585 MLX4_ERR("Failed to reserve qp for mac registration\n"); 586 goto qp_err; 587 } 588 589 /*TODO*/ 590 err = mlx4_en_uc_steer_add(priv, mac, qpn, ®_id); 591 assert(!err); 592 // if (err) 593 // goto steer_err; 594 595 // entry = kmalloc(sizeof(*entry), GFP_KERNEL); 596 // if (!entry) { 597 // err = -ENOMEM; 598 // goto alloc_err; 599 // } 600 // memcpy(entry->mac, IF_LLADDR(priv->dev), sizeof(entry->mac)); 601 // entry->reg_id = reg_id; 602 // 603 // hlist_add_head(&entry->hlist, 604 // &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]); 605 606 return 0; 607 608 /*alloc_err:*//*mlx4_en_uc_steer_release(priv, IF_LLADDR(priv->dev), *qpn, 609 reg_id);*/ 610 611 /*steer_err:*//*mlx4_qp_release_range(dev, *qpn, 1);*/ 612 613 qp_err: /*mlx4_unregister_mac(dev, priv->port, mac);*/ 614 return err; 615} 616/* 617 static void mlx4_en_put_qp(struct mlx4_en_priv *priv) 618 { 619 struct mlx4_en_dev *mdev = priv->mdev; 620 struct mlx4_dev *dev = mdev->dev; 621 int qpn = priv->base_qpn; 622 u64 mac; 623 624 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { 625 mac = mlx4_mac_to_u64(IF_LLADDR(priv->dev)); 626 MLX4_DEBUG( "Registering MAC: %pM for deleting\n", 627 IF_LLADDR(priv->dev)); 628 mlx4_unregister_mac(dev, priv->port, mac); 629 } else { 630 struct mlx4_mac_entry *entry; 631 struct hlist_node *n, *tmp; 632 struct hlist_head *bucket; 633 unsigned int i; 634 635 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { 636 bucket = &priv->mac_hash[i]; 637 hlist_for_each_entry_safe(entry, n, tmp, bucket, hlist) { 638 mac = mlx4_mac_to_u64(entry->mac); 639 MLX4_DEBUG( "Registering MAC: %pM for deleting\n", 640 entry->mac); 641 mlx4_en_uc_steer_release(priv, entry->mac, 642 qpn, entry->reg_id); 643 644 mlx4_unregister_mac(dev, priv->port, mac); 645 hlist_del(&entry->hlist); 646 kfree(entry); 647 } 648 } 649 650 MLX4_DEBUG( "Releasing qp: port %d, qpn %d\n", 651 priv->port, qpn); 652 mlx4_qp_release_range(dev, qpn, 1); 653 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; 654 } 655 } 656 657 static void mlx4_en_clear_list(struct net_device *dev) 658 { 659 struct mlx4_en_priv *priv = netdev_priv(dev); 660 struct mlx4_en_mc_list *tmp, *mc_to_del; 661 662 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) { 663 list_del(&mc_to_del->list); 664 kfree(mc_to_del); 665 } 666 } 667 668 static void mlx4_en_cache_mclist(struct net_device *dev) 669 { 670 struct ifmultiaddr *ifma; 671 struct mlx4_en_mc_list *tmp; 672 struct mlx4_en_priv *priv = netdev_priv(dev); 673 674 if_maddr_rlock(dev); 675 TAILQ_FOREACH(ifma, &dev->if_multiaddrs, ifma_link) { 676 if (ifma->ifma_addr->sa_family != AF_LINK) 677 continue; 678 if (((struct sockaddr_dl *)ifma->ifma_addr)->sdl_alen != 679 ETHER_ADDR_LEN) 680 continue; 681 Make sure the list didn't grow. 682 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC); 683 if (tmp == NULL) { 684 MLX4_ERR( "Failed to allocate multicast list\n"); 685 break; 686 } 687 memcpy(tmp->addr, 688 LLADDR((struct sockaddr_dl *)ifma->ifma_addr), ETH_ALEN); 689 list_add_tail(&tmp->list, &priv->mc_list); 690 } 691 if_maddr_runlock(dev); 692 } 693 694 static void update_mclist_flags(struct mlx4_en_priv *priv, 695 struct list_head *dst, 696 struct list_head *src) 697 { 698 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc; 699 bool found; 700 701 Find all the entries that should be removed from dst, 702 * These are the entries that are not found in src 703 704 list_for_each_entry(dst_tmp, dst, list) { 705 found = false; 706 list_for_each_entry(src_tmp, src, list) { 707 if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) { 708 found = true; 709 break; 710 } 711 } 712 if (!found) 713 dst_tmp->action = MCLIST_REM; 714 } 715 716 Add entries that exist in src but not in dst 717 * mark them as need to add 718 719 list_for_each_entry(src_tmp, src, list) { 720 found = false; 721 list_for_each_entry(dst_tmp, dst, list) { 722 if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) { 723 dst_tmp->action = MCLIST_NONE; 724 found = true; 725 break; 726 } 727 } 728 if (!found) { 729 new_mc = kmalloc(sizeof(struct mlx4_en_mc_list), 730 GFP_KERNEL); 731 if (!new_mc) { 732 MLX4_ERR( "Failed to allocate current multicast list\n"); 733 return; 734 } 735 memcpy(new_mc, src_tmp, 736 sizeof(struct mlx4_en_mc_list)); 737 new_mc->action = MCLIST_ADD; 738 list_add_tail(&new_mc->list, dst); 739 } 740 } 741 } 742 743 static void mlx4_en_set_rx_mode(struct net_device *dev) 744 { 745 struct mlx4_en_priv *priv = netdev_priv(dev); 746 747 if (!priv->port_up) 748 return; 749 750 queue_work(priv->mdev->workqueue, &priv->rx_mode_task); 751 } 752 753 static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv, 754 struct mlx4_en_dev *mdev) 755 { 756 int err = 0; 757 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) { 758 priv->flags |= MLX4_EN_FLAG_PROMISC; 759 760 Enable promiscouos mode 761 switch (mdev->dev->caps.steering_mode) { 762 case MLX4_STEERING_MODE_DEVICE_MANAGED: 763 err = mlx4_flow_steer_promisc_add(mdev->dev, 764 priv->port, 765 priv->base_qpn, 766 MLX4_FS_ALL_DEFAULT); 767 if (err) 768 MLX4_ERR( "Failed enabling promiscuous mode\n"); 769 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 770 break; 771 772 case MLX4_STEERING_MODE_B0: 773 err = mlx4_unicast_promisc_add(mdev->dev, 774 priv->base_qpn, 775 priv->port); 776 if (err) 777 MLX4_ERR( "Failed enabling unicast promiscuous mode\n"); 778 779 Add the default qp number as multicast 780 * promisc 781 782 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { 783 err = mlx4_multicast_promisc_add(mdev->dev, 784 priv->base_qpn, 785 priv->port); 786 if (err) 787 MLX4_ERR( "Failed enabling multicast promiscuous mode\n"); 788 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 789 } 790 break; 791 792 case MLX4_STEERING_MODE_A0: 793 err = mlx4_SET_PORT_qpn_calc(mdev->dev, 794 priv->port, 795 priv->base_qpn, 796 1); 797 if (err) 798 MLX4_ERR( "Failed enabling promiscuous mode\n"); 799 break; 800 } 801 802 Disable port multicast filter (unconditionally) 803 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 804 0, MLX4_MCAST_DISABLE); 805 if (err) 806 MLX4_ERR( "Failed disabling multicast filter\n"); 807 } 808 } 809 810 static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv, 811 struct mlx4_en_dev *mdev) 812 { 813 int err = 0; 814 815 priv->flags &= ~MLX4_EN_FLAG_PROMISC; 816 817 Disable promiscouos mode 818 switch (mdev->dev->caps.steering_mode) { 819 case MLX4_STEERING_MODE_DEVICE_MANAGED: 820 err = mlx4_flow_steer_promisc_remove(mdev->dev, 821 priv->port, 822 MLX4_FS_ALL_DEFAULT); 823 if (err) 824 MLX4_ERR( "Failed disabling promiscuous mode\n"); 825 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 826 break; 827 828 case MLX4_STEERING_MODE_B0: 829 err = mlx4_unicast_promisc_remove(mdev->dev, 830 priv->base_qpn, 831 priv->port); 832 if (err) 833 MLX4_ERR( "Failed disabling unicast promiscuous mode\n"); 834 Disable Multicast promisc 835 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 836 err = mlx4_multicast_promisc_remove(mdev->dev, 837 priv->base_qpn, 838 priv->port); 839 if (err) 840 MLX4_ERR( "Failed disabling multicast promiscuous mode\n"); 841 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 842 } 843 break; 844 845 case MLX4_STEERING_MODE_A0: 846 err = mlx4_SET_PORT_qpn_calc(mdev->dev, 847 priv->port, 848 priv->base_qpn, 0); 849 if (err) 850 MLX4_ERR( "Failed disabling promiscuous mode\n"); 851 break; 852 } 853 } 854 855 static void mlx4_en_do_multicast(struct mlx4_en_priv *priv, 856 struct net_device *dev, 857 struct mlx4_en_dev *mdev) 858 { 859 struct mlx4_en_mc_list *mclist, *tmp; 860 u8 mc_list[16] = {0}; 861 int err = 0; 862 u64 mcast_addr = 0; 863 864 865 Enable/disable the multicast filter according to IFF_ALLMULTI 866 if (dev->if_flags & IFF_ALLMULTI) { 867 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 868 0, MLX4_MCAST_DISABLE); 869 if (err) 870 MLX4_ERR( "Failed disabling multicast filter\n"); 871 872 Add the default qp number as multicast promisc 873 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { 874 switch (mdev->dev->caps.steering_mode) { 875 case MLX4_STEERING_MODE_DEVICE_MANAGED: 876 err = mlx4_flow_steer_promisc_add(mdev->dev, 877 priv->port, 878 priv->base_qpn, 879 MLX4_FS_MC_DEFAULT); 880 break; 881 882 case MLX4_STEERING_MODE_B0: 883 err = mlx4_multicast_promisc_add(mdev->dev, 884 priv->base_qpn, 885 priv->port); 886 break; 887 888 case MLX4_STEERING_MODE_A0: 889 break; 890 } 891 if (err) 892 MLX4_ERR( "Failed entering multicast promisc mode\n"); 893 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 894 } 895 } else { 896 Disable Multicast promisc 897 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 898 switch (mdev->dev->caps.steering_mode) { 899 case MLX4_STEERING_MODE_DEVICE_MANAGED: 900 err = mlx4_flow_steer_promisc_remove(mdev->dev, 901 priv->port, 902 MLX4_FS_MC_DEFAULT); 903 break; 904 905 case MLX4_STEERING_MODE_B0: 906 err = mlx4_multicast_promisc_remove(mdev->dev, 907 priv->base_qpn, 908 priv->port); 909 break; 910 911 case MLX4_STEERING_MODE_A0: 912 break; 913 } 914 if (err) 915 MLX4_ERR( "Failed disabling multicast promiscuous mode\n"); 916 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 917 } 918 919 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 920 0, MLX4_MCAST_DISABLE); 921 if (err) 922 MLX4_ERR( "Failed disabling multicast filter\n"); 923 924 Flush mcast filter and init it with broadcast address 925 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST, 926 1, MLX4_MCAST_CONFIG); 927 928 Update multicast list - we cache all addresses so they won't 929 * change while HW is updated holding the command semaphor 930 mlx4_en_cache_mclist(dev); 931 list_for_each_entry(mclist, &priv->mc_list, list) { 932 mcast_addr = mlx4_mac_to_u64(mclist->addr); 933 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 934 mcast_addr, 0, MLX4_MCAST_CONFIG); 935 } 936 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 937 0, MLX4_MCAST_ENABLE); 938 if (err) 939 MLX4_ERR( "Failed enabling multicast filter\n"); 940 941 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list); 942 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { 943 if (mclist->action == MCLIST_REM) { 944 detach this address and delete from list 945 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 946 mc_list[5] = priv->port; 947 err = mlx4_multicast_detach(mdev->dev, 948 &priv->rss_map.indir_qp, 949 mc_list, 950 MLX4_PROT_ETH, 951 mclist->reg_id); 952 if (err) 953 MLX4_ERR( "Fail to detach multicast address\n"); 954 955 remove from list 956 list_del(&mclist->list); 957 kfree(mclist); 958 } else if (mclist->action == MCLIST_ADD) { 959 attach the address 960 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 961 needed for B0 steering support 962 mc_list[5] = priv->port; 963 err = mlx4_multicast_attach(mdev->dev, 964 &priv->rss_map.indir_qp, 965 mc_list, 966 priv->port, 0, 967 MLX4_PROT_ETH, 968 &mclist->reg_id); 969 if (err) 970 MLX4_ERR( "Fail to attach multicast address\n"); 971 972 } 973 } 974 } 975 } 976 977 static void mlx4_en_do_set_rx_mode(struct work_struct *work) 978 { 979 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 980 rx_mode_task); 981 struct mlx4_en_dev *mdev = priv->mdev; 982 struct net_device *dev = priv->dev; 983 984 985 mutex_lock(&mdev->state_lock); 986 if (!mdev->device_up) { 987 MLX4_DEBUG( "Card is not up, ignoring rx mode change.\n"); 988 goto out; 989 } 990 if (!priv->port_up) { 991 MLX4_DEBUG( "Port is down, ignoring rx mode change.\n"); 992 goto out; 993 } 994 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) { 995 if (priv->port_state.link_state) { 996 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP; 997 update netif baudrate 998 priv->dev->if_baudrate = 999 IF_Mbps(priv->port_state.link_speed); 1000 Important note: the following call for if_link_state_change 1001 * is needed for interface up scenario (start port, link state 1002 * change) 1003 if_link_state_change(priv->dev, LINK_STATE_UP); 1004 MLX4_DEBUG( "Link Up\n"); 1005 } 1006 } 1007 1008 Promsicuous mode: disable all filters 1009 if ((dev->if_flags & IFF_PROMISC) || 1010 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) { 1011 mlx4_en_set_promisc_mode(priv, mdev); 1012 goto out; 1013 } 1014 1015 Not in promiscuous mode 1016 if (priv->flags & MLX4_EN_FLAG_PROMISC) 1017 mlx4_en_clear_promisc_mode(priv, mdev); 1018 1019 mlx4_en_do_multicast(priv, dev, mdev); 1020 out: 1021 mutex_unlock(&mdev->state_lock); 1022 } 1023 1024 #ifdef CONFIG_NET_POLL_CONTROLLER 1025 static void mlx4_en_netpoll(struct net_device *dev) 1026 { 1027 struct mlx4_en_priv *priv = netdev_priv(dev); 1028 struct mlx4_en_cq *cq; 1029 unsigned long flags; 1030 int i; 1031 1032 for (i = 0; i < priv->rx_ring_num; i++) { 1033 cq = priv->rx_cq[i]; 1034 spin_lock_irqsave(&cq->lock, flags); 1035 napi_synchronize(&cq->napi); 1036 mlx4_en_process_rx_cq(dev, cq, 0); 1037 spin_unlock_irqrestore(&cq->lock, flags); 1038 } 1039 } 1040 #endif 1041 1042 static void mlx4_en_watchdog_timeout(void *arg) 1043 { 1044 struct mlx4_en_priv *priv = arg; 1045 struct mlx4_en_dev *mdev = priv->mdev; 1046 1047 MLX4_DEBUG( "Scheduling watchdog\n"); 1048 queue_work(mdev->workqueue, &priv->watchdog_task); 1049 if (priv->port_up) 1050 callout_reset(&priv->watchdog_timer, MLX4_EN_WATCHDOG_TIMEOUT, 1051 mlx4_en_watchdog_timeout, priv); 1052 } 1053 1054 1055 1056 static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv) 1057 { 1058 struct mlx4_en_cq *cq; 1059 int i; 1060 1061 If we haven't received a specific coalescing setting 1062 * (module param), we set the moderation parameters as follows: 1063 * - moder_cnt is set to the number of mtu sized packets to 1064 * satisfy our coelsing target. 1065 * - moder_time is set to a fixed value. 1066 1067 priv->rx_frames = MLX4_EN_RX_COAL_TARGET / priv->dev->if_mtu + 1; 1068 priv->rx_usecs = MLX4_EN_RX_COAL_TIME; 1069 priv->tx_frames = MLX4_EN_TX_COAL_PKTS; 1070 priv->tx_usecs = MLX4_EN_TX_COAL_TIME; 1071 en_dbg(INTR, priv, "Default coalesing params for mtu: %u - " 1072 "rx_frames:%d rx_usecs:%d\n", 1073 (unsigned)priv->dev->if_mtu, priv->rx_frames, priv->rx_usecs); 1074 1075 Setup cq moderation params 1076 for (i = 0; i < priv->rx_ring_num; i++) { 1077 cq = priv->rx_cq[i]; 1078 cq->moder_cnt = priv->rx_frames; 1079 cq->moder_time = priv->rx_usecs; 1080 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF; 1081 priv->last_moder_packets[i] = 0; 1082 priv->last_moder_bytes[i] = 0; 1083 } 1084 1085 for (i = 0; i < priv->tx_ring_num; i++) { 1086 cq = priv->tx_cq[i]; 1087 cq->moder_cnt = priv->tx_frames; 1088 cq->moder_time = priv->tx_usecs; 1089 } 1090 1091 Reset auto-moderation params 1092 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW; 1093 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW; 1094 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH; 1095 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH; 1096 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL; 1097 priv->adaptive_rx_coal = 1; 1098 priv->last_moder_jiffies = 0; 1099 priv->last_moder_tx_packets = 0; 1100 } 1101 1102 static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv) 1103 { 1104 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies); 1105 struct mlx4_en_cq *cq; 1106 unsigned long packets; 1107 unsigned long rate; 1108 unsigned long avg_pkt_size; 1109 unsigned long rx_packets; 1110 unsigned long rx_bytes; 1111 unsigned long rx_pkt_diff; 1112 int moder_time; 1113 int ring, err; 1114 1115 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ) 1116 return; 1117 1118 for (ring = 0; ring < priv->rx_ring_num; ring++) { 1119 spin_lock(&priv->stats_lock); 1120 rx_packets = priv->rx_ring[ring]->packets; 1121 rx_bytes = priv->rx_ring[ring]->bytes; 1122 spin_unlock(&priv->stats_lock); 1123 1124 rx_pkt_diff = ((unsigned long) (rx_packets - 1125 priv->last_moder_packets[ring])); 1126 packets = rx_pkt_diff; 1127 rate = packets * HZ / period; 1128 avg_pkt_size = packets ? ((unsigned long) (rx_bytes - 1129 priv->last_moder_bytes[ring])) / packets : 0; 1130 1131 Apply auto-moderation only when packet rate 1132 * exceeds a rate that it matters 1133 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) && 1134 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) { 1135 if (rate < priv->pkt_rate_low) 1136 moder_time = priv->rx_usecs_low; 1137 else if (rate > priv->pkt_rate_high) 1138 moder_time = priv->rx_usecs_high; 1139 else 1140 moder_time = (rate - priv->pkt_rate_low) * 1141 (priv->rx_usecs_high - priv->rx_usecs_low) / 1142 (priv->pkt_rate_high - priv->pkt_rate_low) + 1143 priv->rx_usecs_low; 1144 } else { 1145 moder_time = priv->rx_usecs_low; 1146 } 1147 1148 if (moder_time != priv->last_moder_time[ring]) { 1149 priv->last_moder_time[ring] = moder_time; 1150 cq = priv->rx_cq[ring]; 1151 cq->moder_time = moder_time; 1152 err = mlx4_en_set_cq_moder(priv, cq); 1153 if (err) 1154 MLX4_ERR( "Failed modifying moderation for cq:%d\n", 1155 ring); 1156 } 1157 priv->last_moder_packets[ring] = rx_packets; 1158 priv->last_moder_bytes[ring] = rx_bytes; 1159 } 1160 1161 priv->last_moder_jiffies = jiffies; 1162 } 1163 */ 1164static /*inline*/int mlx4_en_do_get_stats(void *ptr) { 1165 struct mlx4_en_priv *priv = ptr; 1166 1167 // genpaddr_t t; 1168 // uint64_t *packet = NULL; 1169 // uint64_t count = 0; 1170 1171 while (1) { 1172 if (priv->mdev->device_up) { 1173 if (priv->port_up) { 1174 1175 /*printf("mtt_entry[ 1\n"); 1176 data = (uint64_t *) priv->mdev->dev->mtt_vaddr1; 1177 for (i = 0; i < 0x40000 / 8; ++i) { 1178 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1179 } 1180 printf("mtt_entry[ 2\n"); 1181 1182 data = (uint64_t *) priv->mdev->dev->mtt_vaddr2; 1183 for (i = 0; i < 0x40000 / 8; ++i) { 1184 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1185 } 1186 printf("mtt_entry[ 3\n"); 1187 1188 data = (uint64_t *) priv->mdev->dev->mtt_vaddr3; 1189 for (i = 0; i < 0x1000 / 8; ++i) { 1190 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1191 } 1192 printf("mtt_entry[ 4\n"); 1193 1194 data = (uint64_t *) priv->mdev->dev->mtt_vaddr4; 1195 for (i = 0; i < 0x2000 / 8; ++i) { 1196 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1197 } 1198 printf("mtt_entry[ 5\n"); 1199 1200 data = (uint64_t *) priv->mdev->dev->mtt_vaddr5; 1201 for (i = 0; i < 0x40000 / 8; ++i) { 1202 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1203 } 1204 printf("mtt_entry[ 6\n"); 1205 1206 data = (uint64_t *) priv->mdev->dev->mtt_vaddr6; 1207 for (i = 0; i < 0x40000 / 8; ++i) { 1208 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1209 } 1210 printf("mtt_entry[ 7\n"); 1211 1212 data = (uint64_t *) priv->mdev->dev->mtt_vaddr7; 1213 for (i = 0; i < 0x40000 / 8; ++i) { 1214 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1215 } 1216 printf("mtt_entry[ 8\n"); 1217 1218 data = (uint64_t *) priv->mdev->dev->mtt_vaddr8; 1219 for (i = 0; i < 0x40000 / 8; ++i) { 1220 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1221 } 1222 printf("mtt_entry[ 9\n"); 1223 1224 data = (uint64_t *) priv->mdev->dev->mtt_vaddr9; 1225 for (i = 0; i < 0x40000 / 8; ++i) { 1226 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1227 } 1228 printf("mtt_entry[ 10\n"); 1229 1230 data = (uint64_t *) priv->mdev->dev->mtt_vaddr10; 1231 for (i = 0; i < 0x40000 / 8; ++i) { 1232 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1233 } 1234 printf("mtt_entry[ 11\n"); 1235 1236 data = (uint64_t *) priv->mdev->dev->mtt_vaddr11; 1237 for (i = 0; i < 0x40000 / 8; ++i) { 1238 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1239 } 1240 printf("mtt_entry[ 12\n"); 1241 1242 printf("\n"); 1243 data = (uint64_t *) priv->mdev->dev->mtt_vaddr12; 1244 for (i = 0; i < 0x40000 / 8; ++i) { 1245 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1246 } 1247 printf("mtt_entry[ 13\n"); 1248 1249 printf("\n"); 1250 data = (uint64_t *) priv->mdev->dev->mtt_vaddr13; 1251 for (i = 0; i < 0x40000 / 8; ++i) { 1252 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1253 } 1254 printf("mtt_entry[ 14\n"); 1255 1256 printf("\n"); 1257 data = (uint64_t *) priv->mdev->dev->mtt_vaddr14; 1258 for (i = 0; i < 0x40000 / 8; ++i) { 1259 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1260 } 1261 printf("mtt_entry[ 15\n"); 1262 1263 printf("\n"); 1264 data = (uint64_t *) priv->mdev->dev->mtt_vaddr15; 1265 for (i = 0; i < 0x40000 / 8; ++i) { 1266 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1267 } 1268 printf("mtt_entry[ 16\n"); 1269 1270 printf("\n"); 1271 data = (uint64_t *) priv->mdev->dev->mtt_vaddr16; 1272 for (i = 0; i < 0x40000 / 8; ++i) { 1273 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1274 } 1275 printf("mtt_entry[ 17\n"); 1276 1277 printf("\n"); 1278 data = (uint64_t *) priv->mdev->dev->mtt_vaddr17; 1279 for (i = 0; i < 0x40000 / 8; ++i) { 1280 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1281 } 1282 printf("mtt_entry[ 18\n"); 1283 1284 printf("\n"); 1285 data = (uint64_t *) priv->mdev->dev->mtt_vaddr18; 1286 for (i = 0; i < 0x40000 / 8; ++i) { 1287 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1288 } 1289 printf("mtt_entry[ 19\n"); 1290 1291 printf("\n"); 1292 data = (uint64_t *) priv->mdev->dev->mtt_vaddr19; 1293 for (i = 0; i < 0x40000 / 8; ++i) { 1294 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1295 } 1296 printf("mtt_entry[ 20\n"); 1297 1298 printf("\n"); 1299 data = (uint64_t *) priv->mdev->dev->mtt_vaddr20; 1300 for (i = 0; i < 0x40000 / 8; ++i) { 1301 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1302 } 1303 printf("mtt_entry[ 21\n"); 1304 1305 printf("\n"); 1306 data = (uint64_t *) priv->mdev->dev->mtt_vaddr21; 1307 for (i = 0; i < 0x40000 / 8; ++i) { 1308 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1309 } 1310 printf("mtt_entry[ 22\n"); 1311 1312 printf("\n"); 1313 data = (uint64_t *) priv->mdev->dev->mtt_vaddr22; 1314 for (i = 0; i < 0x40000 / 8; ++i) { 1315 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1316 } 1317 printf("mtt_entry[ 23\n"); 1318 1319 printf("\n"); 1320 data = (uint64_t *) priv->mdev->dev->mtt_vaddr23; 1321 for (i = 0; i < 0x40000 / 8; ++i) { 1322 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1323 } 1324 printf("mtt_entry[ 24\n"); 1325 1326 printf("\n"); 1327 data = (uint64_t *) priv->mdev->dev->mtt_vaddr24; 1328 for (i = 0; i < 0x40000 / 8; ++i) { 1329 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1330 } 1331 printf("mtt_entry[ 25\n"); 1332 1333 printf("\n"); 1334 data = (uint64_t *) priv->mdev->dev->mtt_vaddr25; 1335 for (i = 0; i < 0x40000 / 8; ++i) { 1336 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1337 } 1338 printf("mtt_entry[ 26\n"); 1339 1340 printf("\n"); 1341 data = (uint64_t *) priv->mdev->dev->mtt_vaddr26; 1342 for (i = 0; i < 0x40000 / 8; ++i) { 1343 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1344 } 1345 printf("mtt_entry[ 27\n"); 1346 1347 printf("\n"); 1348 data = (uint64_t *) priv->mdev->dev->mtt_vaddr27; 1349 for (i = 0; i < 0x40000 / 8; ++i) { 1350 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1351 } 1352 printf("mtt_entry[ 28\n"); 1353 1354 printf("\n"); 1355 data = (uint64_t *) priv->mdev->dev->mtt_vaddr28; 1356 for (i = 0; i < 0x40000 / 8; ++i) { 1357 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1358 } 1359 printf("mtt_entry[ 29\n"); 1360 1361 printf("\n"); 1362 data = (uint64_t *) priv->mdev->dev->mtt_vaddr29; 1363 for (i = 0; i < 0x40000 / 8; ++i) { 1364 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1365 } 1366 printf("mtt_entry[ 30\n"); 1367 1368 printf("\n"); 1369 data = (uint64_t *) priv->mdev->dev->mtt_vaddr30; 1370 for (i = 0; i < 0x40000 / 8; ++i) { 1371 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1372 } 1373 printf("mtt_entry[ 31\n"); 1374 1375 printf("\n"); 1376 data = (uint64_t *) priv->mdev->dev->mtt_vaddr31; 1377 for (i = 0; i < 0x40000 / 8; ++i) { 1378 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1379 } 1380 printf("mtt_entry[ 32\n"); 1381 1382 printf("\n"); 1383 data = (uint64_t *) priv->mdev->dev->mtt_vaddr32; 1384 for (i = 0; i < 0x40000 / 8; ++i) { 1385 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1386 } 1387 printf("mtt_entry[ 33\n"); 1388 1389 printf("\n"); 1390 data = (uint64_t *) priv->mdev->dev->mtt_vaddr33; 1391 for (i = 0; i < 0x40000 / 8; ++i) { 1392 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1393 } 1394 printf("mtt_entry[ 34\n"); 1395 1396 printf("\n"); 1397 data = (uint64_t *) priv->mdev->dev->mtt_vaddr34; 1398 for (i = 0; i < 0x40000 / 8; ++i) { 1399 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1400 } 1401 printf("mtt_entry[ 35\n"); 1402 1403 printf("\n"); 1404 data = (uint64_t *) priv->mdev->dev->mtt_vaddr35; 1405 for (i = 0; i < 0x40000 / 8; ++i) { 1406 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1407 } 1408 printf("mtt_entry[ 36\n"); 1409 1410 printf("\n"); 1411 data = (uint64_t *) priv->mdev->dev->mtt_vaddr36; 1412 for (i = 0; i < 0x40000 / 8; ++i) { 1413 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1414 } 1415 printf("mtt_entry[ 37\n"); 1416 1417 printf("\n"); 1418 data = (uint64_t *) priv->mdev->dev->mtt_vaddr37; 1419 for (i = 0; i < 0x40000 / 8; ++i) { 1420 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1421 } 1422 printf("mtt_entry[ 38\n"); 1423 1424 printf("\n"); 1425 data = (uint64_t *) priv->mdev->dev->mtt_vaddr38; 1426 for (i = 0; i < 0x40000 / 8; ++i) { 1427 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1428 } 1429 printf("mtt_entry[ 39\n"); 1430 1431 printf("\n"); 1432 data = (uint64_t *) priv->mdev->dev->mtt_vaddr39; 1433 for (i = 0; i < 0x40000 / 8; ++i) { 1434 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1435 } 1436 printf("mtt_entry[ 40\n"); 1437 1438 printf("\n"); 1439 data = (uint64_t *) priv->mdev->dev->mtt_vaddr40; 1440 for (i = 0; i < 0x40000 / 8; ++i) { 1441 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1442 } 1443 printf("mtt_entry[ 41\n"); 1444 1445 printf("\n"); 1446 data = (uint64_t *) priv->mdev->dev->mtt_vaddr41; 1447 for (i = 0; i < 0x40000 / 8; ++i) { 1448 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1449 } 1450 printf("mtt_entry[ 42\n"); 1451 1452 printf("\n"); 1453 data = (uint64_t *) priv->mdev->dev->mtt_vaddr42; 1454 for (i = 0; i < 0x40000 / 8; ++i) { 1455 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1456 } 1457 printf("mtt_entry[ 43\n"); 1458 1459 printf("\n"); 1460 data = (uint64_t *) priv->mdev->dev->mtt_vaddr43; 1461 for (i = 0; i < 0x40000 / 8; ++i) { 1462 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1463 } 1464 printf("mtt_entry[ 44\n"); 1465 1466 printf("\n"); 1467 data = (uint64_t *) priv->mdev->dev->mtt_vaddr44; 1468 for (i = 0; i < 0x40000 / 8; ++i) { 1469 printf("mtt_entry[%d]: %"PRIx64"\n", i, data[i]); 1470 } 1471 printf("\n");*/ 1472 1473 // debug_printf("%s.%d:\n", __func__, __LINE__); 1474 // mlx4_en_process_rx_cq(priv, priv->rx_cq[0], 64); 1475 // debug_printf("%s.%d:\n", __func__, __LINE__); 1476 // mlx4_en_process_rx_cq(priv, priv->rx_cq[1], 64); 1477 // debug_printf("%s.%d:\n", __func__, __LINE__); 1478 // mlx4_en_process_rx_cq(priv, priv->rx_cq[2], 64); 1479 // debug_printf("%s.%d:\n", __func__, __LINE__); 1480 // mlx4_en_process_rx_cq(priv, priv->rx_cq[3], 64); 1481 1482 // mlx4_en_xmit_poll(priv, 0); 1483 1484 /*break;*/ 1485 1486 /*TODO*/ 1487 /*mlx4_en_auto_moderation(priv);*/ 1488 } 1489 1490 /*TODO: find a way to implement this recursion*/ 1491 /*queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);*/ 1492 } 1493 barrelfish_usleep(1 * 1000 * 1000); 1494 } 1495 return 0; 1496 /*mutex_unlock(&mdev->state_lock);*/ 1497} 1498 1499 1500// static void mlx4_send_test(struct mlx4_en_priv *priv) { 1501// genpaddr_t t; 1502// uint64_t *packet = NULL; 1503// uint64_t count; 1504// 1505// packet = dma_alloc(4096, &t); 1506// assert(packet); 1507// packet[0] = 0x5452ffffffffffff; 1508// packet[1] = 0x0100060856341200; 1509// packet[2] = 0x5452010004060008; 1510// packet[3] = 0x2400a8c056341200; 1511// packet[4] = 0xa8c0000000000000; 1512// packet[5] = 0x0000000000002400; 1513// packet[6] = 0x9373635343332313; 1514// packet[7] = 0x8373635343332313; 1515// packet[8] = 0x8373635343332313; 1516// packet[9] = 0x8373635343332313; 1517// packet[10] = 0x8373635343332313; 1518// packet[11] = 0x8373635343332313; 1519// packet[12] = 0x8373635343332313; 1520// packet[13] = 0x8373635343332313; 1521// 1522// systime_t ts = systime_now(); 1523// for (count = 0; count < 1000; count++) { 1524// if (mlx4_en_xmit(priv, 0, t, 1495)) 1525// printf("ERROR\n"); 1526// } 1527// debug_printf("[%ld] %s.%d:\n", systime_to_ns(systime_now() - ts), __func__, __LINE__); 1528// // debug_print_log(); 1529// } 1530 1531/* 1532 mlx4_en_service_task - Run service task for tasks that needed to be done 1533 * periodically 1534 1535 static void mlx4_en_service_task(struct work_struct *work) { 1536 struct delayed_work *delay = to_delayed_work(work); 1537 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, 1538 service_task); 1539 struct mlx4_en_dev *mdev = priv->mdev; 1540 1541 mutex_lock(&mdev->state_lock); 1542 if (mdev->device_up) { 1543 queue_delayed_work(mdev->workqueue, &priv->service_task, 1544 SERVICE_TASK_DELAY); 1545 } 1546 mutex_unlock(&mdev->state_lock); 1547 } 1548 1549 static void mlx4_en_linkstate(struct work_struct *work) 1550 { 1551 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1552 linkstate_task); 1553 struct mlx4_en_dev *mdev = priv->mdev; 1554 int linkstate = priv->link_state; 1555 1556 mutex_lock(&mdev->state_lock); 1557 If observable port state changed set carrier state and 1558 * report to system log 1559 if (priv->last_link_state != linkstate) { 1560 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) { 1561 en_info(priv, "Link Down\n"); 1562 if_link_state_change(priv->dev, LINK_STATE_DOWN); 1563 update netif baudrate 1564 priv->dev->if_baudrate = 0; 1565 1566 make sure the port is up before notifying the OS. 1567 * This is tricky since we get here on INIT_PORT and 1568 * in such case we can't tell the OS the port is up. 1569 * To solve this there is a call to if_link_state_change 1570 * in set_rx_mode. 1571 * 1572 } else if (priv->port_up && (linkstate == MLX4_DEV_EVENT_PORT_UP)){ 1573 if (mlx4_en_QUERY_PORT(priv->mdev, priv->port)) 1574 en_info(priv, "Query port failed\n"); 1575 priv->dev->if_baudrate = 1576 IF_Mbps(priv->port_state.link_speed); 1577 en_info(priv, "Link Up\n"); 1578 if_link_state_change(priv->dev, LINK_STATE_UP); 1579 } 1580 } 1581 priv->last_link_state = linkstate; 1582 mutex_unlock(&mdev->state_lock); 1583 } 1584 1585 */ 1586int mlx4_en_start_port(struct mlx4_en_priv *priv) { 1587 /*struct mlx4_en_priv *priv = netdev_priv(dev);*/ 1588 struct mlx4_en_dev *mdev = priv->mdev; 1589 struct mlx4_en_cq *cq; 1590 struct mlx4_en_tx_ring *tx_ring; 1591 int rx_index = 0; 1592 int tx_index = 0; 1593 int err = 0; 1594 int i; 1595 int j; 1596 u8 mc_list[16] = { 0 }; 1597 1598 if (priv->port_up) { 1599 MLX4_DEBUG("start port called while port already up\n"); 1600 return 0; 1601 } 1602 1603 INIT_LIST_HEAD(&priv->mc_list); 1604 INIT_LIST_HEAD(&priv->curr_list); 1605 INIT_LIST_HEAD(&priv->ethtool_list); 1606 1607 /*Calculate Rx buf size*/ 1608 priv->if_mtu = min(ETHERMTU, priv->max_mtu); 1609 mlx4_en_calc_rx_buf(priv); 1610 MLX4_DEBUG("Rx buf size:%d\n", priv->rx_mb_size); 1611 1612 /*Configure rx cq's and rings*/ 1613 err = mlx4_en_activate_rx_rings(priv); 1614 if (err) { 1615 MLX4_ERR("Failed to activate RX rings\n"); 1616 return err; 1617 } 1618 for (i = 0; i < priv->rx_ring_num; i++) { 1619 cq = priv->rx_cq[i]; 1620 1621 /*mlx4_en_cq_init_lock(cq);*/ 1622 err = mlx4_en_activate_cq(priv, cq, i); 1623 if (err) { 1624 MLX4_ERR("Failed activating Rx CQ\n"); 1625 goto cq_err; 1626 } 1627 for (j = 0; j < cq->size; j++) 1628 cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK; 1629 1630 /*printf("%"PRIx64"\n", *(uint64_t *) cq->buf);*/ 1631 /*err = mlx4_en_set_cq_moder(priv, cq); 1632 if (err) { 1633 MLX4_ERR("Failed setting cq moderation parameters"); 1634 mlx4_en_deactivate_cq(priv, cq); 1635 goto cq_err; 1636 }*/ 1637 mlx4_en_arm_cq(priv, cq); 1638 priv->rx_ring[i]->cqn = cq->mcq.cqn; 1639 ++rx_index; 1640 } 1641 1642 /*Set qp number*/ 1643 MLX4_DEBUG("Getting qp number for port %d\n", priv->port); 1644 err = mlx4_en_get_qp(priv); 1645 if (err) { 1646 MLX4_ERR("Failed getting eth qp\n"); 1647 goto cq_err; 1648 } 1649 mdev->mac_removed[priv->port] = 0; 1650 1651 /*gets default allocated counter index from func cap 1652 or sink counter index if no resources*/ 1653 priv->counter_index = mdev->dev->caps.def_counter_index[priv->port - 1]; 1654 1655 MLX4_DEBUG("%s: default counter index %d for port %d\n", __func__, 1656 priv->counter_index, priv->port); 1657 1658 err = mlx4_en_config_rss_steer(priv); 1659 if (err) { 1660 MLX4_ERR("Failed configuring rss steering\n"); 1661 goto mac_err; 1662 } 1663 1664 /*err = mlx4_en_create_drop_qp(priv); 1665 if (err) 1666 goto rss_err;*/ 1667 1668 /*Configure tx cq's and rings*/ 1669 for (i = 0; i < priv->tx_ring_num; i++) { 1670 /*Configure cq*/ 1671 cq = priv->tx_cq[i]; 1672 err = mlx4_en_activate_cq(priv, cq, i); 1673 if (err) { 1674 MLX4_ERR("Failed activating Tx CQ\n"); 1675 goto tx_err; 1676 } 1677 /*err = mlx4_en_set_cq_moder(priv, cq); 1678 if (err) { 1679 MLX4_ERR("Failed setting cq moderation parameters"); 1680 mlx4_en_deactivate_cq(priv, cq); 1681 goto tx_err; 1682 }*/ 1683 MLX4_DEBUG("Resetting index of collapsed CQ:%d to -1\n", i); 1684 cq->buf->wqe_index = cpu_to_be16(0xffff); 1685 1686 /*Configure ring*/ 1687 tx_ring = priv->tx_ring[i]; 1688 1689 err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn, 1690 i / priv->num_tx_rings_p_up); 1691 if (err) { 1692 MLX4_ERR("Failed activating Tx ring %d\n", i); 1693 /*mlx4_en_deactivate_cq(priv, cq);*/ 1694 goto tx_err; 1695 } 1696 1697 /* Arm CQ for TX completions*/ 1698 mlx4_en_arm_cq(priv, cq); 1699 1700 /*Set initial ownership of all Tx TXBBs to SW (1)*/ 1701 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE) 1702 *((u32 *) (tx_ring->buf + j)) = 0xffffffff; 1703 ++tx_index; 1704 } 1705 1706 /*Configure port*/ 1707 err = mlx4_SET_PORT_general(mdev->dev, priv->port, priv->rx_mb_size, 1708 priv->prof->tx_pause, priv->prof->tx_ppp, priv->prof->rx_pause, 1709 priv->prof->rx_ppp); 1710 if (err) { 1711 MLX4_ERR( 1712 "Failed setting port general configurations for port %d, with error %d\n", 1713 priv->port, err); 1714 goto tx_err; 1715 } 1716 1717 /*Set default qp number*/ 1718 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0); 1719 if (err) { 1720 MLX4_ERR("Failed setting default qp numbers\n"); 1721 goto tx_err; 1722 } 1723 1724 /*Init port*/ 1725 MLX4_DEBUG("Initializing port\n"); 1726 err = mlx4_INIT_PORT(mdev->dev, priv->port); 1727 if (err) { 1728 MLX4_ERR("Failed Initializing port\n"); 1729 goto tx_err; 1730 } 1731 1732 /*Attach rx QP to bradcast address*/ 1733 memset(&mc_list[10], 0xff, ETH_ALEN); 1734 mc_list[5] = priv->port; /*needed for B0 steering support*/ 1735 if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list, 1736 priv->port, 0, MLX4_PROT_ETH, &priv->broadcast_id)) 1737 MLX4_WARN("Failed Attaching Broadcast\n"); 1738 1739 /*Must redo promiscuous mode setup.*/ 1740 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC); 1741 1742 /*Schedule multicast task to populate multicast list*/ 1743 /*queue_work(mdev->workqueue, &priv->rx_mode_task); 1744 1745 mlx4_set_stats_bitmap(mdev->dev, priv->stats_bitmap);*/ 1746 1747 priv->port_up = true; 1748 1749 /*Enable the queues.*/ 1750 /*dev->if_drv_flags &= ~IFF_DRV_OACTIVE; 1751 dev->if_drv_flags |= IFF_DRV_RUNNING; 1752 #ifdef CONFIG_DEBUG_FS 1753 mlx4_en_create_debug_files(priv); 1754 #endif 1755 callout_reset(&priv->watchdog_timer, MLX4_EN_WATCHDOG_TIMEOUT, 1756 mlx4_en_watchdog_timeout, priv);*/ 1757 1758 return 0; 1759 1760 tx_err: /*while (tx_index--) { 1761 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[tx_index]); 1762 mlx4_en_deactivate_cq(priv, priv->tx_cq[tx_index]); 1763 }*/ 1764 /*mlx4_en_destroy_drop_qp(priv);*/ 1765 /*rss_err:*//*mlx4_en_release_rss_steer(priv);*/ 1766 mac_err: /*mlx4_en_put_qp(priv);*/ 1767 cq_err: /*while (rx_index--) 1768 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]); 1769 for (i = 0; i < priv->rx_ring_num; i++) 1770 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);*/ 1771 1772 return err; /*need to close devices*/ 1773} 1774/* 1775 1776 void mlx4_en_stop_port(struct net_device *dev) 1777 { 1778 struct mlx4_en_priv *priv = netdev_priv(dev); 1779 struct mlx4_en_dev *mdev = priv->mdev; 1780 struct mlx4_en_mc_list *mclist, *tmp; 1781 int i; 1782 u8 mc_list[16] = {0}; 1783 1784 if (!priv->port_up) { 1785 MLX4_DEBUG( "stop port called while port already down\n"); 1786 return; 1787 } 1788 1789 #ifdef CONFIG_DEBUG_FS 1790 mlx4_en_delete_debug_files(priv); 1791 #endif 1792 1793 close port 1794 mlx4_CLOSE_PORT(mdev->dev, priv->port); 1795 1796 Set port as not active 1797 priv->port_up = false; 1798 if (priv->counter_index != 0xff) { 1799 mlx4_counter_free(mdev->dev, priv->port, priv->counter_index); 1800 priv->counter_index = 0xff; 1801 } 1802 1803 Promsicuous mode 1804 if (mdev->dev->caps.steering_mode == 1805 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1806 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | 1807 MLX4_EN_FLAG_MC_PROMISC); 1808 mlx4_flow_steer_promisc_remove(mdev->dev, 1809 priv->port, 1810 MLX4_FS_ALL_DEFAULT); 1811 mlx4_flow_steer_promisc_remove(mdev->dev, 1812 priv->port, 1813 MLX4_FS_MC_DEFAULT); 1814 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) { 1815 priv->flags &= ~MLX4_EN_FLAG_PROMISC; 1816 1817 Disable promiscouos mode 1818 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn, 1819 priv->port); 1820 1821 Disable Multicast promisc 1822 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 1823 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn, 1824 priv->port); 1825 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 1826 } 1827 } 1828 1829 Detach All multicasts 1830 memset(&mc_list[10], 0xff, ETH_ALEN); 1831 mc_list[5] = priv->port; needed for B0 steering support 1832 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list, 1833 MLX4_PROT_ETH, priv->broadcast_id); 1834 list_for_each_entry(mclist, &priv->curr_list, list) { 1835 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1836 mc_list[5] = priv->port; 1837 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, 1838 mc_list, MLX4_PROT_ETH, mclist->reg_id); 1839 } 1840 mlx4_en_clear_list(dev); 1841 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { 1842 list_del(&mclist->list); 1843 kfree(mclist); 1844 } 1845 1846 Flush multicast filter 1847 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG); 1848 mlx4_en_destroy_drop_qp(priv); 1849 1850 Free TX Rings 1851 for (i = 0; i < priv->tx_ring_num; i++) { 1852 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[i]); 1853 mlx4_en_deactivate_cq(priv, priv->tx_cq[i]); 1854 } 1855 msleep(10); 1856 1857 for (i = 0; i < priv->tx_ring_num; i++) 1858 mlx4_en_free_tx_buf(dev, priv->tx_ring[i]); 1859 1860 Free RSS qps 1861 mlx4_en_release_rss_steer(priv); 1862 1863 Unregister Mac address for the port 1864 mlx4_en_put_qp(priv); 1865 mdev->mac_removed[priv->port] = 1; 1866 1867 Free RX Rings 1868 for (i = 0; i < priv->rx_ring_num; i++) { 1869 struct mlx4_en_cq *cq = priv->rx_cq[i]; 1870 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]); 1871 mlx4_en_deactivate_cq(priv, cq); 1872 } 1873 1874 callout_stop(&priv->watchdog_timer); 1875 1876 dev->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1877 } 1878 1879 static void mlx4_en_restart(struct work_struct *work) 1880 { 1881 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1882 watchdog_task); 1883 struct mlx4_en_dev *mdev = priv->mdev; 1884 struct net_device *dev = priv->dev; 1885 struct mlx4_en_tx_ring *ring; 1886 int i; 1887 1888 1889 if (priv->blocked == 0 || priv->port_up == 0) 1890 return; 1891 for (i = 0; i < priv->tx_ring_num; i++) { 1892 ring = priv->tx_ring[i]; 1893 if (ring->blocked && 1894 ring->watchdog_time + MLX4_EN_WATCHDOG_TIMEOUT < ticks) 1895 goto reset; 1896 } 1897 return; 1898 1899 reset: 1900 priv->port_stats.tx_timeout++; 1901 MLX4_DEBUG( "Watchdog task called for port %d\n", priv->port); 1902 1903 mutex_lock(&mdev->state_lock); 1904 if (priv->port_up) { 1905 mlx4_en_stop_port(dev); 1906 //for (i = 0; i < priv->tx_ring_num; i++) 1907 // netdev_tx_reset_queue(priv->tx_ring[i]->tx_queue); 1908 if (mlx4_en_start_port(dev)) 1909 MLX4_ERR( "Failed restarting port %d\n", priv->port); 1910 } 1911 mutex_unlock(&mdev->state_lock); 1912 } 1913 1914 static void mlx4_en_clear_stats(struct net_device *dev) 1915 { 1916 struct mlx4_en_priv *priv = netdev_priv(dev); 1917 struct mlx4_en_dev *mdev = priv->mdev; 1918 int i; 1919 1920 if (!mlx4_is_slave(mdev->dev)) 1921 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1)) 1922 MLX4_DEBUG( "Failed dumping statistics\n"); 1923 1924 memset(&priv->pstats, 0, sizeof(priv->pstats)); 1925 memset(&priv->pkstats, 0, sizeof(priv->pkstats)); 1926 memset(&priv->port_stats, 0, sizeof(priv->port_stats)); 1927 memset(&priv->vport_stats, 0, sizeof(priv->vport_stats)); 1928 1929 for (i = 0; i < priv->tx_ring_num; i++) { 1930 priv->tx_ring[i]->bytes = 0; 1931 priv->tx_ring[i]->packets = 0; 1932 priv->tx_ring[i]->tx_csum = 0; 1933 priv->tx_ring[i]->oversized_packets = 0; 1934 } 1935 for (i = 0; i < priv->rx_ring_num; i++) { 1936 priv->rx_ring[i]->bytes = 0; 1937 priv->rx_ring[i]->packets = 0; 1938 priv->rx_ring[i]->csum_ok = 0; 1939 priv->rx_ring[i]->csum_none = 0; 1940 } 1941 } 1942 */ 1943static void mlx4_en_open(void* arg) { 1944 1945 struct mlx4_en_priv *priv; 1946 struct mlx4_en_dev *mdev; 1947 int err = 0; 1948 1949 priv = arg; 1950 mdev = priv->mdev; 1951 1952 /*mutex_lock(&mdev->state_lock);*/ 1953 1954 if (!mdev->device_up) { 1955 MLX4_ERR("Cannot open - device down/disabled\n"); 1956 goto out; 1957 } 1958 1959 /*Reset HW statistics and SW counters*/ 1960 /*mlx4_en_clear_stats(dev);*/ 1961 1962 err = mlx4_en_start_port(priv); 1963 if (err) 1964 MLX4_ERR("Failed starting port:%d\n", priv->port); 1965 1966 out: /*mutex_unlock(&mdev->state_lock);*/ 1967 return; 1968} 1969/* 1970 void mlx4_en_free_resources(struct mlx4_en_priv *priv) 1971 { 1972 int i; 1973 1974 #ifdef CONFIG_RFS_ACCEL 1975 if (priv->dev->rx_cpu_rmap) { 1976 free_irq_cpu_rmap(priv->dev->rx_cpu_rmap); 1977 priv->dev->rx_cpu_rmap = NULL; 1978 } 1979 #endif 1980 1981 for (i = 0; i < priv->tx_ring_num; i++) { 1982 if (priv->tx_ring && priv->tx_ring[i]) 1983 mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]); 1984 if (priv->tx_cq && priv->tx_cq[i]) 1985 mlx4_en_destroy_cq(priv, &priv->tx_cq[i]); 1986 } 1987 1988 for (i = 0; i < priv->rx_ring_num; i++) { 1989 if (priv->rx_ring[i]) 1990 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], 1991 priv->prof->rx_ring_size, priv->stride); 1992 if (priv->rx_cq[i]) 1993 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); 1994 } 1995 1996 if (priv->sysctl) 1997 sysctl_ctx_free(&priv->stat_ctx); 1998 } 1999 */ 2000int mlx4_en_alloc_resources(struct mlx4_en_priv *priv) { 2001 struct mlx4_en_port_profile *prof = priv->prof; 2002 int i; 2003 int node = 0; 2004 2005 /*Create rx Rings*/ 2006 for (i = 0; i < priv->rx_ring_num; i++) { 2007 if (mlx4_en_create_cq(priv, &priv->rx_cq[i], prof->rx_ring_size, i, RX, 2008 node)) 2009 goto err; 2010 2011 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i], prof->rx_ring_size, 2012 node)) 2013 goto err; 2014 } 2015 2016 priv->mdev->dev->offset = priv->rx_ring[0]->wqres.mtt.offset; 2017 2018 /*Create tx Rings*/ 2019 for (i = 0; i < priv->tx_ring_num; i++) { 2020 if (mlx4_en_create_cq(priv, &priv->tx_cq[i], prof->tx_ring_size, i, TX, 2021 node)) 2022 goto err; 2023 2024 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], prof->tx_ring_size, 2025 TXBB_SIZE, node, i)) 2026 goto err; 2027 } 2028 2029#ifdef CONFIG_RFS_ACCEL 2030 priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->rx_ring_num); 2031 if (!priv->dev->rx_cpu_rmap) 2032 goto err; 2033#endif 2034 /*Re-create stat sysctls in case the number of rings changed.*/ 2035 /*mlx4_en_sysctl_stat(priv);*/ 2036 return 0; 2037 2038 err: 2039 MLX4_ERR("Failed to allocate NIC resources\n"); 2040 /*for (i = 0; i < priv->rx_ring_num; i++) { 2041 if (priv->rx_ring[i]) 2042 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], prof->rx_ring_size, 2043 priv->stride); 2044 if (priv->rx_cq[i]) 2045 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); 2046 } 2047 for (i = 0; i < priv->tx_ring_num; i++) { 2048 if (priv->tx_ring[i]) 2049 mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]); 2050 if (priv->tx_cq[i]) 2051 mlx4_en_destroy_cq(priv, &priv->tx_cq[i]); 2052 }*/ 2053 priv->port_up = false; 2054 return -ENOMEM; 2055} 2056/* 2057 struct en_port_attribute { 2058 struct attribute attr; 2059 ssize_t (*show)(struct en_port *, struct en_port_attribute *, char *buf); 2060 ssize_t (*store)(struct en_port *, struct en_port_attribute *, char *buf, size_t count); 2061 }; 2062 2063 #define PORT_ATTR_RO(_name) \ 2064struct en_port_attribute en_port_attr_##_name = __ATTR_RO(_name) 2065 2066 #define EN_PORT_ATTR(_name, _mode, _show, _store) \ 2067struct en_port_attribute en_port_attr_##_name = __ATTR(_name, _mode, _show, _store) 2068 2069 void mlx4_en_destroy_netdev(struct net_device *dev) 2070 { 2071 struct mlx4_en_priv *priv = netdev_priv(dev); 2072 struct mlx4_en_dev *mdev = priv->mdev; 2073 2074 MLX4_DEBUG( "Destroying netdev on port:%d\n", priv->port); 2075 2076 if (priv->vlan_attach != NULL) 2077 EVENTHANDLER_DEREGISTER(vlan_config, priv->vlan_attach); 2078 if (priv->vlan_detach != NULL) 2079 EVENTHANDLER_DEREGISTER(vlan_unconfig, priv->vlan_detach); 2080 2081 Unregister device - this will close the port if it was up 2082 if (priv->registered) { 2083 mutex_lock(&mdev->state_lock); 2084 ether_ifdetach(dev); 2085 mutex_unlock(&mdev->state_lock); 2086 } 2087 2088 if (priv->allocated) 2089 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE); 2090 2091 mutex_lock(&mdev->state_lock); 2092 mlx4_en_stop_port(dev); 2093 mutex_unlock(&mdev->state_lock); 2094 2095 2096 cancel_delayed_work(&priv->stats_task); 2097 cancel_delayed_work(&priv->service_task); 2098 flush any pending task for this netdev 2099 flush_workqueue(mdev->workqueue); 2100 callout_drain(&priv->watchdog_timer); 2101 2102 Detach the netdev so tasks would not attempt to access it 2103 mutex_lock(&mdev->state_lock); 2104 mdev->pndev[priv->port] = NULL; 2105 mutex_unlock(&mdev->state_lock); 2106 2107 2108 mlx4_en_free_resources(priv); 2109 2110 freeing the sysctl conf cannot be called from within mlx4_en_free_resources 2111 if (priv->sysctl) 2112 sysctl_ctx_free(&priv->conf_ctx); 2113 2114 kfree(priv->tx_ring); 2115 kfree(priv->tx_cq); 2116 2117 kfree(priv); 2118 if_free(dev); 2119 2120 } 2121 2122 static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu) 2123 { 2124 struct mlx4_en_priv *priv = netdev_priv(dev); 2125 struct mlx4_en_dev *mdev = priv->mdev; 2126 int err = 0; 2127 2128 MLX4_DEBUG( "Change MTU called - current:%u new:%u\n", 2129 (unsigned)dev->if_mtu, (unsigned)new_mtu); 2130 2131 if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) { 2132 MLX4_ERR( "Bad MTU size:%d.\n", new_mtu); 2133 return -EPERM; 2134 } 2135 mutex_lock(&mdev->state_lock); 2136 dev->if_mtu = new_mtu; 2137 if (dev->if_drv_flags & IFF_DRV_RUNNING) { 2138 if (!mdev->device_up) { 2139 NIC is probably restarting - let watchdog task reset 2140 * * the port 2141 MLX4_DEBUG( "Change MTU called with card down!?\n"); 2142 } else { 2143 mlx4_en_stop_port(dev); 2144 err = mlx4_en_start_port(dev); 2145 if (err) { 2146 MLX4_ERR( "Failed restarting port:%d\n", 2147 priv->port); 2148 queue_work(mdev->workqueue, &priv->watchdog_task); 2149 } 2150 } 2151 } 2152 mutex_unlock(&mdev->state_lock); 2153 return 0; 2154 } 2155 2156 static int mlx4_en_calc_media(struct mlx4_en_priv *priv) 2157 { 2158 int trans_type; 2159 int active; 2160 2161 active = IFM_ETHER; 2162 if (priv->last_link_state == MLX4_DEV_EVENT_PORT_DOWN) 2163 return (active); 2164 active |= IFM_FDX; 2165 trans_type = priv->port_state.transciver; 2166 XXX I don't know all of the transceiver values. 2167 switch (priv->port_state.link_speed) { 2168 case 1000: 2169 active |= IFM_1000_T; 2170 break; 2171 case 10000: 2172 if (trans_type > 0 && trans_type <= 0xC) 2173 active |= IFM_10G_SR; 2174 else if (trans_type == 0x80 || trans_type == 0) 2175 active |= IFM_10G_CX4; 2176 break; 2177 case 40000: 2178 active |= IFM_40G_CR4; 2179 break; 2180 } 2181 if (priv->prof->tx_pause) 2182 active |= IFM_ETH_TXPAUSE; 2183 if (priv->prof->rx_pause) 2184 active |= IFM_ETH_RXPAUSE; 2185 2186 return (active); 2187 } 2188 2189 static void mlx4_en_media_status(struct ifnet *dev, struct ifmediareq *ifmr) 2190 { 2191 struct mlx4_en_priv *priv; 2192 2193 priv = dev->if_softc; 2194 ifmr->ifm_status = IFM_AVALID; 2195 if (priv->last_link_state != MLX4_DEV_EVENT_PORT_DOWN) 2196 ifmr->ifm_status |= IFM_ACTIVE; 2197 ifmr->ifm_active = mlx4_en_calc_media(priv); 2198 2199 return; 2200 } 2201 2202 static int mlx4_en_media_change(struct ifnet *dev) 2203 { 2204 struct mlx4_en_priv *priv; 2205 struct ifmedia *ifm; 2206 int rxpause; 2207 int txpause; 2208 int error; 2209 2210 priv = dev->if_softc; 2211 ifm = &priv->media; 2212 rxpause = txpause = 0; 2213 error = 0; 2214 2215 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 2216 return (EINVAL); 2217 switch (IFM_SUBTYPE(ifm->ifm_media)) { 2218 case IFM_AUTO: 2219 break; 2220 case IFM_10G_SR: 2221 case IFM_10G_CX4: 2222 case IFM_1000_T: 2223 case IFM_40G_CR4: 2224 if ((IFM_SUBTYPE(ifm->ifm_media) 2225 == IFM_SUBTYPE(mlx4_en_calc_media(priv))) 2226 && (ifm->ifm_media & IFM_FDX)) 2227 break; 2228 Fallthrough 2229 default: 2230 printf("%s: Only auto media type\n", if_name(dev)); 2231 return (EINVAL); 2232 } 2233 Allow user to set/clear pause 2234 if (IFM_OPTIONS(ifm->ifm_media) & IFM_ETH_RXPAUSE) 2235 rxpause = 1; 2236 if (IFM_OPTIONS(ifm->ifm_media) & IFM_ETH_TXPAUSE) 2237 txpause = 1; 2238 if (priv->prof->tx_pause != txpause || priv->prof->rx_pause != rxpause) { 2239 priv->prof->tx_pause = txpause; 2240 priv->prof->rx_pause = rxpause; 2241 error = -mlx4_SET_PORT_general(priv->mdev->dev, priv->port, 2242 priv->rx_mb_size + ETHER_CRC_LEN, priv->prof->tx_pause, 2243 priv->prof->tx_ppp, priv->prof->rx_pause, 2244 priv->prof->rx_ppp); 2245 } 2246 return (error); 2247 } 2248 2249 static int mlx4_en_ioctl(struct ifnet *dev, u_long command, caddr_t data) 2250 { 2251 struct mlx4_en_priv *priv; 2252 struct mlx4_en_dev *mdev; 2253 struct ifreq *ifr; 2254 int error; 2255 int mask; 2256 2257 error = 0; 2258 mask = 0; 2259 priv = dev->if_softc; 2260 mdev = priv->mdev; 2261 ifr = (struct ifreq *) data; 2262 switch (command) { 2263 2264 case SIOCSIFMTU: 2265 error = -mlx4_en_change_mtu(dev, ifr->ifr_mtu); 2266 break; 2267 case SIOCSIFFLAGS: 2268 if (dev->if_flags & IFF_UP) { 2269 if ((dev->if_drv_flags & IFF_DRV_RUNNING) == 0) { 2270 mutex_lock(&mdev->state_lock); 2271 mlx4_en_start_port(dev); 2272 mutex_unlock(&mdev->state_lock); 2273 } else { 2274 mlx4_en_set_rx_mode(dev); 2275 } 2276 } else { 2277 mutex_lock(&mdev->state_lock); 2278 if (dev->if_drv_flags & IFF_DRV_RUNNING) { 2279 mlx4_en_stop_port(dev); 2280 if_link_state_change(dev, LINK_STATE_DOWN); 2281 } 2282 mutex_unlock(&mdev->state_lock); 2283 } 2284 break; 2285 case SIOCADDMULTI: 2286 case SIOCDELMULTI: 2287 mlx4_en_set_rx_mode(dev); 2288 break; 2289 case SIOCSIFMEDIA: 2290 case SIOCGIFMEDIA: 2291 error = ifmedia_ioctl(dev, ifr, &priv->media, command); 2292 break; 2293 case SIOCSIFCAP: 2294 mutex_lock(&mdev->state_lock); 2295 mask = ifr->ifr_reqcap ^ dev->if_capenable; 2296 if (mask & IFCAP_TXCSUM) { 2297 dev->if_capenable ^= IFCAP_TXCSUM; 2298 dev->if_hwassist ^= (CSUM_TCP | CSUM_UDP | CSUM_IP); 2299 2300 if (IFCAP_TSO4 & dev->if_capenable && 2301 !(IFCAP_TXCSUM & dev->if_capenable)) { 2302 dev->if_capenable &= ~IFCAP_TSO4; 2303 dev->if_hwassist &= ~CSUM_IP_TSO; 2304 if_printf(dev, 2305 "tso4 disabled due to -txcsum.\n"); 2306 } 2307 } 2308 if (mask & IFCAP_TXCSUM_IPV6) { 2309 dev->if_capenable ^= IFCAP_TXCSUM_IPV6; 2310 dev->if_hwassist ^= (CSUM_UDP_IPV6 | CSUM_TCP_IPV6); 2311 2312 if (IFCAP_TSO6 & dev->if_capenable && 2313 !(IFCAP_TXCSUM_IPV6 & dev->if_capenable)) { 2314 dev->if_capenable &= ~IFCAP_TSO6; 2315 dev->if_hwassist &= ~CSUM_IP6_TSO; 2316 if_printf(dev, 2317 "tso6 disabled due to -txcsum6.\n"); 2318 } 2319 } 2320 if (mask & IFCAP_RXCSUM) 2321 dev->if_capenable ^= IFCAP_RXCSUM; 2322 if (mask & IFCAP_RXCSUM_IPV6) 2323 dev->if_capenable ^= IFCAP_RXCSUM_IPV6; 2324 2325 if (mask & IFCAP_TSO4) { 2326 if (!(IFCAP_TSO4 & dev->if_capenable) && 2327 !(IFCAP_TXCSUM & dev->if_capenable)) { 2328 if_printf(dev, "enable txcsum first.\n"); 2329 error = EAGAIN; 2330 goto out; 2331 } 2332 dev->if_capenable ^= IFCAP_TSO4; 2333 dev->if_hwassist ^= CSUM_IP_TSO; 2334 } 2335 if (mask & IFCAP_TSO6) { 2336 if (!(IFCAP_TSO6 & dev->if_capenable) && 2337 !(IFCAP_TXCSUM_IPV6 & dev->if_capenable)) { 2338 if_printf(dev, "enable txcsum6 first.\n"); 2339 error = EAGAIN; 2340 goto out; 2341 } 2342 dev->if_capenable ^= IFCAP_TSO6; 2343 dev->if_hwassist ^= CSUM_IP6_TSO; 2344 } 2345 if (mask & IFCAP_LRO) 2346 dev->if_capenable ^= IFCAP_LRO; 2347 if (mask & IFCAP_VLAN_HWTAGGING) 2348 dev->if_capenable ^= IFCAP_VLAN_HWTAGGING; 2349 if (mask & IFCAP_VLAN_HWFILTER) 2350 dev->if_capenable ^= IFCAP_VLAN_HWFILTER; 2351 if (mask & IFCAP_WOL_MAGIC) 2352 dev->if_capenable ^= IFCAP_WOL_MAGIC; 2353 if (dev->if_drv_flags & IFF_DRV_RUNNING) 2354 mlx4_en_start_port(dev); 2355 out: 2356 mutex_unlock(&mdev->state_lock); 2357 VLAN_CAPABILITIES(dev); 2358 break; 2359 #if __FreeBSD_version >= 1100036 2360 case SIOCGI2C: { 2361 struct ifi2creq i2c; 2362 2363 error = copyin(ifr->ifr_data, &i2c, sizeof(i2c)); 2364 if (error) 2365 break; 2366 if (i2c.len > sizeof(i2c.data)) { 2367 error = EINVAL; 2368 break; 2369 } 2370 2371 * Note that we ignore i2c.addr here. The driver hardcodes 2372 * the address to 0x50, while standard expects it to be 0xA0. 2373 2374 error = mlx4_get_module_info(mdev->dev, priv->port, 2375 i2c.offset, i2c.len, i2c.data); 2376 if (error < 0) { 2377 error = -error; 2378 break; 2379 } 2380 error = copyout(&i2c, ifr->ifr_data, sizeof(i2c)); 2381 break; 2382 } 2383 #endif 2384 default: 2385 error = ether_ioctl(dev, command, data); 2386 break; 2387 } 2388 2389 return (error); 2390 } 2391 */ 2392 2393int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, 2394 struct mlx4_en_port_profile *prof, struct mlx4_queue *queue) { 2395 /*struct net_device *dev;*/ 2396 struct mlx4_en_priv *priv; 2397 // uint8_t dev_addr[ETHER_ADDR_LEN]; 2398 int err; 2399 int i; 2400 struct thread *thread; 2401 systime_t current; 2402 2403 priv = calloc(1, sizeof(*priv)); 2404 queue->priv = priv; 2405 priv->devif_queue = queue; 2406 /*dev = priv->dev = if_alloc(IFT_ETHER); 2407 if (dev == NULL) { 2408 MLX4_ERR( "Net device allocation failed\n"); 2409 kfree(priv); 2410 return -ENOMEM; 2411 } 2412 dev->if_softc = priv; 2413 if_initname(dev, "mlxen", atomic_fetchadd_int(&mlx4_en_unit, 1)); 2414 dev->if_mtu = ETHERMTU; 2415 dev->if_init = mlx4_en_open; 2416 dev->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 2417 dev->if_ioctl = mlx4_en_ioctl; 2418 dev->if_transmit = mlx4_en_transmit; 2419 dev->if_qflush = mlx4_en_qflush; 2420 dev->if_snd.ifq_maxlen = prof->tx_ring_size;*/ 2421 2422 /** Initialize driver private data*/ 2423 2424 priv->counter_index = 0xff; 2425 /*spin_lock_init(&priv->stats_lock);*/ 2426 /*INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode); 2427 INIT_WORK(&priv->watchdog_task, mlx4_en_restart); 2428 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate); 2429 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats); 2430 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task); 2431 callout_init(&priv->watchdog_timer, 1);*/ 2432#ifdef CONFIG_RFS_ACCEL 2433 INIT_LIST_HEAD(&priv->filters); 2434 spin_lock_init(&priv->filters_lock); 2435#endif 2436 2437 priv->msg_enable = MLX4_EN_MSG_LEVEL; 2438 /*priv->dev = dev;*/ 2439 priv->mdev = mdev; 2440 /*priv->ddev = &mdev->pdev->dev;*/ 2441 priv->prof = prof; 2442 priv->port = port; 2443 priv->port_up = false; 2444 priv->flags = prof->flags; 2445 2446 priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up; 2447 priv->tx_ring_num = prof->tx_ring_num; 2448 priv->tx_ring = calloc(MAX_TX_RINGS, sizeof(struct mlx4_en_tx_ring *)); 2449 if (!priv->tx_ring) { 2450 err = -ENOMEM; 2451 goto out; 2452 } 2453 priv->tx_cq = calloc(sizeof(struct mlx4_en_cq *), MAX_TX_RINGS); 2454 if (!priv->tx_cq) { 2455 err = -ENOMEM; 2456 goto out; 2457 } 2458 2459 priv->rx_ring_num = prof->rx_ring_num; 2460 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0; 2461 priv->mac_index = -1; 2462 priv->last_ifq_jiffies = 0; 2463 priv->if_counters_rx_errors = 0; 2464 priv->if_counters_rx_no_buffer = 0; 2465#ifdef CONFIG_MLX4_EN_DCB 2466 if (!mlx4_is_slave(priv->mdev->dev)) { 2467 priv->dcbx_cap = DCB_CAP_DCBX_HOST; 2468 priv->flags |= MLX4_EN_FLAG_DCB_ENABLED; 2469 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) { 2470 dev->dcbnl_ops = &mlx4_en_dcbnl_ops; 2471 } else { 2472 en_info(priv, "QoS disabled - no HW support\n"); 2473 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops; 2474 } 2475 } 2476#endif 2477 2478 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) 2479 INIT_HLIST_HEAD(&priv->mac_hash[i]); 2480 2481 /*Query for default mac and max mtu*/ 2482 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port]; 2483 priv->mac = mdev->dev->caps.def_mac[priv->port]; 2484 if (ILLEGAL_MAC(priv->mac)) { 2485#if BITS_PER_LONG == 64 2486 MLX4_ERR("Port: %d, invalid mac burned: 0x%lx, quiting\n", priv->port, 2487 priv->mac); 2488#elif BITS_PER_LONG == 32 2489 MLX4_ERR( "Port: %d, invalid mac burned: 0x%llx, quiting\n", 2490 priv->port, priv->mac); 2491#endif 2492 err = -EINVAL; 2493 goto out; 2494 } 2495 2496 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + DS_SIZE); 2497 2498 /*mlx4_en_sysctl_conf(priv);*/ 2499 2500 err = mlx4_en_alloc_resources(priv); 2501 if (err) 2502 goto out; 2503 2504 /*Allocate page for receive rings*/ 2505 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE, 2506 MLX4_EN_PAGE_SIZE); 2507 if (err) { 2508 MLX4_ERR("Failed to allocate page for rx qps\n"); 2509 goto out; 2510 } 2511 priv->allocated = 1; 2512 2513 /** Set driver features*/ 2514 2515 /*dev->if_capabilities |= IFCAP_HWCSUM | IFCAP_HWCSUM_IPV6; 2516 dev->if_capabilities |= IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING; 2517 dev->if_capabilities |= IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWFILTER; 2518 dev->if_capabilities |= IFCAP_LINKSTATE | IFCAP_JUMBO_MTU; 2519 dev->if_capabilities |= IFCAP_LRO; 2520 2521 if (mdev->LSO_support) 2522 dev->if_capabilities |= IFCAP_TSO4 | IFCAP_TSO6 | IFCAP_VLAN_HWTSO; 2523 2524 set TSO limits so that we don't have to drop TX packets 2525 dev->if_hw_tsomax = MLX4_EN_TX_MAX_PAYLOAD_SIZE 2526 - (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN) hdr; 2527 dev->if_hw_tsomaxsegcount = MLX4_EN_TX_MAX_MBUF_FRAGS - 1 hdr; 2528 dev->if_hw_tsomaxsegsize = MLX4_EN_TX_MAX_MBUF_SIZE 2529 ; 2530 2531 dev->if_capenable = dev->if_capabilities; 2532 2533 dev->if_hwassist = 0; 2534 if (dev->if_capenable & (IFCAP_TSO4 | IFCAP_TSO6)) 2535 dev->if_hwassist |= CSUM_TSO; 2536 if (dev->if_capenable & IFCAP_TXCSUM) 2537 dev->if_hwassist |= (CSUM_TCP | CSUM_UDP | CSUM_IP); 2538 if (dev->if_capenable & IFCAP_TXCSUM_IPV6) 2539 dev->if_hwassist |= (CSUM_UDP_IPV6 | CSUM_TCP_IPV6);*/ 2540 2541 /*Register for VLAN events*/ 2542 /*priv->vlan_attach = EVENTHANDLER_REGISTER(vlan_config, 2543 mlx4_en_vlan_rx_add_vid, priv, EVENTHANDLER_PRI_FIRST); 2544 priv->vlan_detach = EVENTHANDLER_REGISTER(vlan_unconfig, 2545 mlx4_en_vlan_rx_kill_vid, priv, EVENTHANDLER_PRI_FIRST);*/ 2546 2547 mdev->port_queue[priv->port] = queue; 2548 2549 priv->last_link_state = MLX4_DEV_EVENT_PORT_DOWN; 2550 /*mlx4_en_set_default_moderation(priv);*/ 2551 2552 /*Set default MAC*/ 2553 // for (i = 0; i < ETHER_ADDR_LEN; i++) 2554 // dev_addr[ETHER_ADDR_LEN - 1 - i] = (u8)(priv->mac >> (8 * i)); 2555 queue->mac_address = bswap64(priv->mac) >> 16; 2556 2557 /*ether_ifattach(dev, dev_addr); 2558 if_link_state_change(dev, LINK_STATE_DOWN); 2559 ifmedia_init(&priv->media, IFM_IMASK | IFM_ETH_FMASK, mlx4_en_media_change, 2560 mlx4_en_media_status); 2561 ifmedia_add(&priv->media, IFM_ETHER | IFM_FDX | IFM_1000_T, 0, NULL); 2562 ifmedia_add(&priv->media, IFM_ETHER | IFM_FDX | IFM_10G_SR, 0, NULL); 2563 ifmedia_add(&priv->media, IFM_ETHER | IFM_FDX | IFM_10G_CX4, 0, NULL); 2564 ifmedia_add(&priv->media, IFM_ETHER | IFM_FDX | IFM_40G_CR4, 0, NULL); 2565 ifmedia_add(&priv->media, IFM_ETHER | IFM_AUTO, 0, NULL); 2566 ifmedia_set(&priv->media, IFM_ETHER | IFM_AUTO);*/ 2567 2568 MLX4_WARN("Using %d TX rings\n", prof->tx_ring_num); 2569 MLX4_WARN("Using %d RX rings\n", prof->rx_ring_num); 2570 2571 priv->registered = 1; 2572 2573 /*MLX4_WARN("Using %d TX rings\n", prof->tx_ring_num); 2574 MLX4_WARN("Using %d RX rings\n", prof->rx_ring_num);*/ 2575 2576 priv->rx_mb_size = ETHERMTU + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN; 2577 err = mlx4_SET_PORT_general(mdev->dev, priv->port, priv->rx_mb_size, 2578 prof->tx_pause, prof->tx_ppp, prof->rx_pause, prof->rx_ppp); 2579 if (err) { 2580 MLX4_ERR("Failed setting port general configurations " 2581 "for port %d, with error %d\n", priv->port, err); 2582 goto out; 2583 } 2584 2585 /*Init port*/ 2586 MLX4_WARN("Initializing port\n"); 2587 err = mlx4_INIT_PORT(mdev->dev, priv->port); 2588 if (err) { 2589 MLX4_ERR("Failed Initializing port\n"); 2590 goto out; 2591 } 2592 2593 if (0) { 2594 thread = thread_create(mlx4_en_do_get_stats, priv); 2595 assert(thread != NULL); 2596 } 2597 2598 got_port_irq = false; 2599 current = systime_now(); 2600 while (!got_port_irq) { 2601 if (systime_now() >= current + 10 * 1000000000L) { 2602 break; 2603 } 2604 event_dispatch_non_block(get_default_waitset()); 2605 } 2606 2607 mlx4_en_open(priv); 2608 2609 /*queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);*/ 2610 2611 // mlx4_send_test(priv); 2612 2613 /*TODO: implement if necesary*/ 2614 /*if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 2615 queue_delayed_work(mdev->workqueue, &priv->service_task, 2616 SERVICE_TASK_DELAY);*/ 2617 2618 return 0; 2619 2620 out: /*mlx4_en_destroy_netdev(dev);*/ 2621 return err; 2622} 2623/* 2624 static int mlx4_en_set_ring_size(struct net_device *dev, 2625 int rx_size, int tx_size) 2626 { 2627 struct mlx4_en_priv *priv = netdev_priv(dev); 2628 struct mlx4_en_dev *mdev = priv->mdev; 2629 int port_up = 0; 2630 int err = 0; 2631 2632 rx_size = roundup_pow_of_two(rx_size); 2633 rx_size = max_t(u32, rx_size, MLX4_EN_MIN_RX_SIZE); 2634 rx_size = min_t(u32, rx_size, MLX4_EN_MAX_RX_SIZE); 2635 tx_size = roundup_pow_of_two(tx_size); 2636 tx_size = max_t(u32, tx_size, MLX4_EN_MIN_TX_SIZE); 2637 tx_size = min_t(u32, tx_size, MLX4_EN_MAX_TX_SIZE); 2638 2639 if (rx_size == (priv->port_up ? 2640 priv->rx_ring[0]->actual_size : priv->rx_ring[0]->size) && 2641 tx_size == priv->tx_ring[0]->size) 2642 return 0; 2643 mutex_lock(&mdev->state_lock); 2644 if (priv->port_up) { 2645 port_up = 1; 2646 mlx4_en_stop_port(dev); 2647 } 2648 mlx4_en_free_resources(priv); 2649 priv->prof->tx_ring_size = tx_size; 2650 priv->prof->rx_ring_size = rx_size; 2651 err = mlx4_en_alloc_resources(priv); 2652 if (err) { 2653 MLX4_ERR( "Failed reallocating port resources\n"); 2654 goto out; 2655 } 2656 if (port_up) { 2657 err = mlx4_en_start_port(dev); 2658 if (err) 2659 MLX4_ERR( "Failed starting port\n"); 2660 } 2661 out: 2662 mutex_unlock(&mdev->state_lock); 2663 return err; 2664 } 2665 static int mlx4_en_set_rx_ring_size(SYSCTL_HANDLER_ARGS) 2666 { 2667 struct mlx4_en_priv *priv; 2668 int size; 2669 int error; 2670 2671 priv = arg1; 2672 size = priv->prof->rx_ring_size; 2673 error = sysctl_handle_int(oidp, &size, 0, req); 2674 if (error || !req->newptr) 2675 return (error); 2676 error = -mlx4_en_set_ring_size(priv->dev, size, 2677 priv->prof->tx_ring_size); 2678 return (error); 2679 } 2680 2681 static int mlx4_en_set_tx_ring_size(SYSCTL_HANDLER_ARGS) 2682 { 2683 struct mlx4_en_priv *priv; 2684 int size; 2685 int error; 2686 2687 priv = arg1; 2688 size = priv->prof->tx_ring_size; 2689 error = sysctl_handle_int(oidp, &size, 0, req); 2690 if (error || !req->newptr) 2691 return (error); 2692 error = -mlx4_en_set_ring_size(priv->dev, priv->prof->rx_ring_size, 2693 size); 2694 2695 return (error); 2696 } 2697 2698 static int mlx4_en_get_module_info(struct net_device *dev, 2699 struct ethtool_modinfo *modinfo) 2700 { 2701 struct mlx4_en_priv *priv = netdev_priv(dev); 2702 struct mlx4_en_dev *mdev = priv->mdev; 2703 int ret; 2704 u8 data[4]; 2705 2706 Read first 2 bytes to get Module & REV ID 2707 ret = mlx4_get_module_info(mdev->dev, priv->port, 2708 0offset, 2size, data); 2709 2710 if (ret < 2) { 2711 MLX4_ERR( "Failed to read eeprom module first two bytes, error: 0x%x\n", -ret); 2712 return -EIO; 2713 } 2714 2715 switch (data[0] identifier ) { 2716 case MLX4_MODULE_ID_QSFP: 2717 modinfo->type = ETH_MODULE_SFF_8436; 2718 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 2719 break; 2720 case MLX4_MODULE_ID_QSFP_PLUS: 2721 if (data[1] >= 0x3) { revision id 2722 modinfo->type = ETH_MODULE_SFF_8636; 2723 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 2724 } else { 2725 modinfo->type = ETH_MODULE_SFF_8436; 2726 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 2727 } 2728 break; 2729 case MLX4_MODULE_ID_QSFP28: 2730 modinfo->type = ETH_MODULE_SFF_8636; 2731 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 2732 break; 2733 case MLX4_MODULE_ID_SFP: 2734 modinfo->type = ETH_MODULE_SFF_8472; 2735 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 2736 break; 2737 default: 2738 MLX4_ERR( "mlx4_en_get_module_info : Not recognized cable type\n"); 2739 return -EINVAL; 2740 } 2741 2742 return 0; 2743 } 2744 2745 static int mlx4_en_get_module_eeprom(struct net_device *dev, 2746 struct ethtool_eeprom *ee, 2747 u8 *data) 2748 { 2749 struct mlx4_en_priv *priv = netdev_priv(dev); 2750 struct mlx4_en_dev *mdev = priv->mdev; 2751 int offset = ee->offset; 2752 int i = 0, ret; 2753 2754 if (ee->len == 0) 2755 return -EINVAL; 2756 2757 memset(data, 0, ee->len); 2758 2759 while (i < ee->len) { 2760 MLX4_DEBUG( 2761 "mlx4_get_module_info i(%d) offset(%d) len(%d)\n", 2762 i, offset, ee->len - i); 2763 2764 ret = mlx4_get_module_info(mdev->dev, priv->port, 2765 offset, ee->len - i, data + i); 2766 2767 if (!ret) Done reading 2768 return 0; 2769 2770 if (ret < 0) { 2771 MLX4_ERR( 2772 "mlx4_get_module_info i(%d) offset(%d) bytes_to_read(%d) - FAILED (0x%x)\n", 2773 i, offset, ee->len - i, ret); 2774 return -1; 2775 } 2776 2777 i += ret; 2778 offset += ret; 2779 } 2780 return 0; 2781 } 2782 2783 static void mlx4_en_print_eeprom(u8 *data, __u32 len) 2784 { 2785 int i; 2786 int j = 0; 2787 int row = 0; 2788 const int NUM_OF_BYTES = 16; 2789 2790 printf("\nOffset\t\tValues\n"); 2791 printf("------\t\t------\n"); 2792 while(row < len){ 2793 printf("0x%04x\t\t",row); 2794 for(i=0; i < NUM_OF_BYTES; i++){ 2795 printf("%02x ", data[j]); 2796 row++; 2797 j++; 2798 } 2799 printf("\n"); 2800 } 2801 } 2802 2803 Read cable EEPROM module information by first inspecting the first 2804 * two bytes to get the length and then read the rest of the information. 2805 * The information is printed to dmesg. 2806 static int mlx4_en_read_eeprom(SYSCTL_HANDLER_ARGS) 2807 { 2808 2809 u8* data; 2810 int error; 2811 int result = 0; 2812 struct mlx4_en_priv *priv; 2813 struct net_device *dev; 2814 struct ethtool_modinfo modinfo; 2815 struct ethtool_eeprom ee; 2816 2817 error = sysctl_handle_int(oidp, &result, 0, req); 2818 if (error || !req->newptr) 2819 return (error); 2820 2821 if (result == 1) { 2822 priv = arg1; 2823 dev = priv->dev; 2824 data = kmalloc(PAGE_SIZE, GFP_KERNEL); 2825 2826 error = mlx4_en_get_module_info(dev, &modinfo); 2827 if (error) { 2828 MLX4_ERR( 2829 "mlx4_en_get_module_info returned with error - FAILED (0x%x)\n", 2830 -error); 2831 goto out; 2832 } 2833 2834 ee.len = modinfo.eeprom_len; 2835 ee.offset = 0; 2836 2837 error = mlx4_en_get_module_eeprom(dev, &ee, data); 2838 if (error) { 2839 MLX4_ERR( 2840 "mlx4_en_get_module_eeprom returned with error - FAILED (0x%x)\n", 2841 -error); 2842 Continue printing partial information in case of an error 2843 } 2844 2845 EEPROM information will be printed in dmesg 2846 mlx4_en_print_eeprom(data, ee.len); 2847 out: 2848 kfree(data); 2849 } 2850 Return zero to prevent sysctl failure. 2851 return (0); 2852 } 2853 2854 static int mlx4_en_set_tx_ppp(SYSCTL_HANDLER_ARGS) 2855 { 2856 struct mlx4_en_priv *priv; 2857 int ppp; 2858 int error; 2859 2860 priv = arg1; 2861 ppp = priv->prof->tx_ppp; 2862 error = sysctl_handle_int(oidp, &ppp, 0, req); 2863 if (error || !req->newptr) 2864 return (error); 2865 if (ppp > 0xff || ppp < 0) 2866 return (-EINVAL); 2867 priv->prof->tx_ppp = ppp; 2868 error = -mlx4_SET_PORT_general(priv->mdev->dev, priv->port, 2869 priv->rx_mb_size + ETHER_CRC_LEN, 2870 priv->prof->tx_pause, 2871 priv->prof->tx_ppp, 2872 priv->prof->rx_pause, 2873 priv->prof->rx_ppp); 2874 2875 return (error); 2876 } 2877 2878 static int mlx4_en_set_rx_ppp(SYSCTL_HANDLER_ARGS) 2879 { 2880 struct mlx4_en_priv *priv; 2881 struct mlx4_en_dev *mdev; 2882 int ppp; 2883 int error; 2884 int port_up; 2885 2886 port_up = 0; 2887 priv = arg1; 2888 mdev = priv->mdev; 2889 ppp = priv->prof->rx_ppp; 2890 error = sysctl_handle_int(oidp, &ppp, 0, req); 2891 if (error || !req->newptr) 2892 return (error); 2893 if (ppp > 0xff || ppp < 0) 2894 return (-EINVAL); 2895 See if we have to change the number of tx queues. 2896 if (!ppp != !priv->prof->rx_ppp) { 2897 mutex_lock(&mdev->state_lock); 2898 if (priv->port_up) { 2899 port_up = 1; 2900 mlx4_en_stop_port(priv->dev); 2901 } 2902 mlx4_en_free_resources(priv); 2903 priv->prof->rx_ppp = ppp; 2904 error = -mlx4_en_alloc_resources(priv); 2905 if (error) 2906 MLX4_ERR( "Failed reallocating port resources\n"); 2907 if (error == 0 && port_up) { 2908 error = -mlx4_en_start_port(priv->dev); 2909 if (error) 2910 MLX4_ERR( "Failed starting port\n"); 2911 } 2912 mutex_unlock(&mdev->state_lock); 2913 return (error); 2914 2915 } 2916 priv->prof->rx_ppp = ppp; 2917 error = -mlx4_SET_PORT_general(priv->mdev->dev, priv->port, 2918 priv->rx_mb_size + ETHER_CRC_LEN, 2919 priv->prof->tx_pause, 2920 priv->prof->tx_ppp, 2921 priv->prof->rx_pause, 2922 priv->prof->rx_ppp); 2923 2924 return (error); 2925 } 2926 2927 static void mlx4_en_sysctl_conf(struct mlx4_en_priv *priv) 2928 { 2929 struct net_device *dev; 2930 struct sysctl_ctx_list *ctx; 2931 struct sysctl_oid *node; 2932 struct sysctl_oid_list *node_list; 2933 struct sysctl_oid *coal; 2934 struct sysctl_oid_list *coal_list; 2935 const char *pnameunit; 2936 2937 dev = priv->dev; 2938 ctx = &priv->conf_ctx; 2939 pnameunit = device_get_nameunit(priv->mdev->pdev->dev.bsddev); 2940 2941 sysctl_ctx_init(ctx); 2942 priv->sysctl = SYSCTL_ADD_NODE(ctx, SYSCTL_STATIC_CHILDREN(_hw), 2943 OID_AUTO, dev->if_xname, CTLFLAG_RD, 0, "mlx4 10gig ethernet"); 2944 node = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(priv->sysctl), OID_AUTO, 2945 "conf", CTLFLAG_RD, NULL, "Configuration"); 2946 node_list = SYSCTL_CHILDREN(node); 2947 2948 SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "msg_enable", 2949 CTLFLAG_RW, &priv->msg_enable, 0, 2950 "Driver message enable bitfield"); 2951 SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "rx_rings", 2952 CTLFLAG_RD, &priv->rx_ring_num, 0, 2953 "Number of receive rings"); 2954 SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "tx_rings", 2955 CTLFLAG_RD, &priv->tx_ring_num, 0, 2956 "Number of transmit rings"); 2957 SYSCTL_ADD_PROC(ctx, node_list, OID_AUTO, "rx_size", 2958 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0, 2959 mlx4_en_set_rx_ring_size, "I", "Receive ring size"); 2960 SYSCTL_ADD_PROC(ctx, node_list, OID_AUTO, "tx_size", 2961 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0, 2962 mlx4_en_set_tx_ring_size, "I", "Transmit ring size"); 2963 SYSCTL_ADD_PROC(ctx, node_list, OID_AUTO, "tx_ppp", 2964 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0, 2965 mlx4_en_set_tx_ppp, "I", "TX Per-priority pause"); 2966 SYSCTL_ADD_PROC(ctx, node_list, OID_AUTO, "rx_ppp", 2967 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0, 2968 mlx4_en_set_rx_ppp, "I", "RX Per-priority pause"); 2969 SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "port_num", 2970 CTLFLAG_RD, &priv->port, 0, 2971 "Port Number"); 2972 SYSCTL_ADD_STRING(ctx, node_list, OID_AUTO, "device_name", 2973 CTLFLAG_RD, __DECONST(void *, pnameunit), 0, 2974 "PCI device name"); 2975 2976 Add coalescer configuration. 2977 coal = SYSCTL_ADD_NODE(ctx, node_list, OID_AUTO, 2978 "coalesce", CTLFLAG_RD, NULL, "Interrupt coalesce configuration"); 2979 coal_list = SYSCTL_CHILDREN(coal); 2980 SYSCTL_ADD_UINT(ctx, coal_list, OID_AUTO, "pkt_rate_low", 2981 CTLFLAG_RW, &priv->pkt_rate_low, 0, 2982 "Packets per-second for minimum delay"); 2983 SYSCTL_ADD_UINT(ctx, coal_list, OID_AUTO, "rx_usecs_low", 2984 CTLFLAG_RW, &priv->rx_usecs_low, 0, 2985 "Minimum RX delay in micro-seconds"); 2986 SYSCTL_ADD_UINT(ctx, coal_list, OID_AUTO, "pkt_rate_high", 2987 CTLFLAG_RW, &priv->pkt_rate_high, 0, 2988 "Packets per-second for maximum delay"); 2989 SYSCTL_ADD_UINT(ctx, coal_list, OID_AUTO, "rx_usecs_high", 2990 CTLFLAG_RW, &priv->rx_usecs_high, 0, 2991 "Maximum RX delay in micro-seconds"); 2992 SYSCTL_ADD_UINT(ctx, coal_list, OID_AUTO, "sample_interval", 2993 CTLFLAG_RW, &priv->sample_interval, 0, 2994 "adaptive frequency in units of HZ ticks"); 2995 SYSCTL_ADD_UINT(ctx, coal_list, OID_AUTO, "adaptive_rx_coal", 2996 CTLFLAG_RW, &priv->adaptive_rx_coal, 0, 2997 "Enable adaptive rx coalescing"); 2998 EEPROM support 2999 SYSCTL_ADD_PROC(ctx, node_list, OID_AUTO, "eeprom_info", 3000 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0, 3001 mlx4_en_read_eeprom, "I", "EEPROM information"); 3002 } 3003 3004 static void mlx4_en_sysctl_stat(struct mlx4_en_priv *priv) 3005 { 3006 struct sysctl_ctx_list *ctx; 3007 struct sysctl_oid *node; 3008 struct sysctl_oid_list *node_list; 3009 struct sysctl_oid *ring_node; 3010 struct sysctl_oid_list *ring_list; 3011 struct mlx4_en_tx_ring *tx_ring; 3012 struct mlx4_en_rx_ring *rx_ring; 3013 char namebuf[128]; 3014 int i; 3015 3016 ctx = &priv->stat_ctx; 3017 sysctl_ctx_init(ctx); 3018 node = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(priv->sysctl), OID_AUTO, 3019 "stat", CTLFLAG_RD, NULL, "Statistics"); 3020 node_list = SYSCTL_CHILDREN(node); 3021 3022 #ifdef MLX4_EN_PERF_STAT 3023 SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "tx_poll", CTLFLAG_RD, 3024 &priv->pstats.tx_poll, "TX Poll calls"); 3025 SYSCTL_ADD_QUAD(ctx, node_list, OID_AUTO, "tx_pktsz_avg", CTLFLAG_RD, 3026 &priv->pstats.tx_pktsz_avg, "TX average packet size"); 3027 SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "inflight_avg", CTLFLAG_RD, 3028 &priv->pstats.inflight_avg, "TX average packets in-flight"); 3029 SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "tx_coal_avg", CTLFLAG_RD, 3030 &priv->pstats.tx_coal_avg, "TX average coalesced completions"); 3031 SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "rx_coal_avg", CTLFLAG_RD, 3032 &priv->pstats.rx_coal_avg, "RX average coalesced completions"); 3033 #endif 3034 3035 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tso_packets", CTLFLAG_RD, 3036 &priv->port_stats.tso_packets, "TSO packets sent"); 3037 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "queue_stopped", CTLFLAG_RD, 3038 &priv->port_stats.queue_stopped, "Queue full"); 3039 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "wake_queue", CTLFLAG_RD, 3040 &priv->port_stats.wake_queue, "Queue resumed after full"); 3041 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_timeout", CTLFLAG_RD, 3042 &priv->port_stats.tx_timeout, "Transmit timeouts"); 3043 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_oversized_packets", CTLFLAG_RD, 3044 &priv->port_stats.oversized_packets, "TX oversized packets, m_defrag failed"); 3045 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_alloc_failed", CTLFLAG_RD, 3046 &priv->port_stats.rx_alloc_failed, "RX failed to allocate mbuf"); 3047 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_chksum_good", CTLFLAG_RD, 3048 &priv->port_stats.rx_chksum_good, "RX checksum offload success"); 3049 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_chksum_none", CTLFLAG_RD, 3050 &priv->port_stats.rx_chksum_none, "RX without checksum offload"); 3051 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_chksum_offload", 3052 CTLFLAG_RD, &priv->port_stats.tx_chksum_offload, 3053 "TX checksum offloads"); 3054 3055 Could strdup the names and add in a loop. This is simpler. 3056 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_bytes", CTLFLAG_RD, 3057 &priv->pkstats.rx_bytes, "RX Bytes"); 3058 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_packets", CTLFLAG_RD, 3059 &priv->pkstats.rx_packets, "RX packets"); 3060 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_multicast_packets", CTLFLAG_RD, 3061 &priv->pkstats.rx_multicast_packets, "RX Multicast Packets"); 3062 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_broadcast_packets", CTLFLAG_RD, 3063 &priv->pkstats.rx_broadcast_packets, "RX Broadcast Packets"); 3064 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_errors", CTLFLAG_RD, 3065 &priv->pkstats.rx_errors, "RX Errors"); 3066 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_dropped", CTLFLAG_RD, 3067 &priv->pkstats.rx_dropped, "RX Dropped"); 3068 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_length_errors", CTLFLAG_RD, 3069 &priv->pkstats.rx_length_errors, "RX Length Errors"); 3070 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_over_errors", CTLFLAG_RD, 3071 &priv->pkstats.rx_over_errors, "RX Over Errors"); 3072 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_crc_errors", CTLFLAG_RD, 3073 &priv->pkstats.rx_crc_errors, "RX CRC Errors"); 3074 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_jabbers", CTLFLAG_RD, 3075 &priv->pkstats.rx_jabbers, "RX Jabbers"); 3076 3077 3078 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_in_range_length_error", CTLFLAG_RD, 3079 &priv->pkstats.rx_in_range_length_error, "RX IN_Range Length Error"); 3080 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_out_range_length_error", 3081 CTLFLAG_RD, &priv->pkstats.rx_out_range_length_error, 3082 "RX Out Range Length Error"); 3083 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_lt_64_bytes_packets", CTLFLAG_RD, 3084 &priv->pkstats.rx_lt_64_bytes_packets, "RX Lt 64 Bytes Packets"); 3085 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_127_bytes_packets", CTLFLAG_RD, 3086 &priv->pkstats.rx_127_bytes_packets, "RX 127 bytes Packets"); 3087 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_255_bytes_packets", CTLFLAG_RD, 3088 &priv->pkstats.rx_255_bytes_packets, "RX 255 bytes Packets"); 3089 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_511_bytes_packets", CTLFLAG_RD, 3090 &priv->pkstats.rx_511_bytes_packets, "RX 511 bytes Packets"); 3091 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_1023_bytes_packets", CTLFLAG_RD, 3092 &priv->pkstats.rx_1023_bytes_packets, "RX 1023 bytes Packets"); 3093 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_1518_bytes_packets", CTLFLAG_RD, 3094 &priv->pkstats.rx_1518_bytes_packets, "RX 1518 bytes Packets"); 3095 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_1522_bytes_packets", CTLFLAG_RD, 3096 &priv->pkstats.rx_1522_bytes_packets, "RX 1522 bytes Packets"); 3097 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_1548_bytes_packets", CTLFLAG_RD, 3098 &priv->pkstats.rx_1548_bytes_packets, "RX 1548 bytes Packets"); 3099 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "rx_gt_1548_bytes_packets", CTLFLAG_RD, 3100 &priv->pkstats.rx_gt_1548_bytes_packets, 3101 "RX Greater Then 1548 bytes Packets"); 3102 3103 struct mlx4_en_pkt_stats { 3104 unsigned long tx_packets; 3105 unsigned long tx_bytes; 3106 unsigned long tx_multicast_packets; 3107 unsigned long tx_broadcast_packets; 3108 unsigned long tx_errors; 3109 unsigned long tx_dropped; 3110 unsigned long tx_lt_64_bytes_packets; 3111 unsigned long tx_127_bytes_packets; 3112 unsigned long tx_255_bytes_packets; 3113 unsigned long tx_511_bytes_packets; 3114 unsigned long tx_1023_bytes_packets; 3115 unsigned long tx_1518_bytes_packets; 3116 unsigned long tx_1522_bytes_packets; 3117 unsigned long tx_1548_bytes_packets; 3118 unsigned long tx_gt_1548_bytes_packets; 3119 unsigned long rx_prio[NUM_PRIORITIES][NUM_PRIORITY_STATS]; 3120 unsigned long tx_prio[NUM_PRIORITIES][NUM_PRIORITY_STATS]; 3121 #define NUM_PKT_STATS 72 3122 }; 3123 3124 3125 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_packets", CTLFLAG_RD, 3126 &priv->pkstats.tx_packets, "TX packets"); 3127 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_bytes", CTLFLAG_RD, 3128 &priv->pkstats.tx_bytes, "TX Bytes"); 3129 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_multicast_packets", CTLFLAG_RD, 3130 &priv->pkstats.tx_multicast_packets, "TX Multicast Packets"); 3131 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_broadcast_packets", CTLFLAG_RD, 3132 &priv->pkstats.tx_broadcast_packets, "TX Broadcast Packets"); 3133 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_errors", CTLFLAG_RD, 3134 &priv->pkstats.tx_errors, "TX Errors"); 3135 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_dropped", CTLFLAG_RD, 3136 &priv->pkstats.tx_dropped, "TX Dropped"); 3137 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_lt_64_bytes_packets", CTLFLAG_RD, 3138 &priv->pkstats.tx_lt_64_bytes_packets, "TX Less Then 64 Bytes Packets"); 3139 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_127_bytes_packets", CTLFLAG_RD, 3140 &priv->pkstats.tx_127_bytes_packets, "TX 127 Bytes Packets"); 3141 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_255_bytes_packets", CTLFLAG_RD, 3142 &priv->pkstats.tx_255_bytes_packets, "TX 255 Bytes Packets"); 3143 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_511_bytes_packets", CTLFLAG_RD, 3144 &priv->pkstats.tx_511_bytes_packets, "TX 511 Bytes Packets"); 3145 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_1023_bytes_packets", CTLFLAG_RD, 3146 &priv->pkstats.tx_1023_bytes_packets, "TX 1023 Bytes Packets"); 3147 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_1518_bytes_packets", CTLFLAG_RD, 3148 &priv->pkstats.tx_1518_bytes_packets, "TX 1518 Bytes Packets"); 3149 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_1522_bytes_packets", CTLFLAG_RD, 3150 &priv->pkstats.tx_1522_bytes_packets, "TX 1522 Bytes Packets"); 3151 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_1548_bytes_packets", CTLFLAG_RD, 3152 &priv->pkstats.tx_1548_bytes_packets, "TX 1548 Bytes Packets"); 3153 SYSCTL_ADD_ULONG(ctx, node_list, OID_AUTO, "tx_gt_1548_bytes_packets", CTLFLAG_RD, 3154 &priv->pkstats.tx_gt_1548_bytes_packets, 3155 "TX Greater Then 1548 Bytes Packets"); 3156 3157 3158 3159 for (i = 0; i < priv->tx_ring_num; i++) { 3160 tx_ring = priv->tx_ring[i]; 3161 snprintf(namebuf, sizeof(namebuf), "tx_ring%d", i); 3162 ring_node = SYSCTL_ADD_NODE(ctx, node_list, OID_AUTO, namebuf, 3163 CTLFLAG_RD, NULL, "TX Ring"); 3164 ring_list = SYSCTL_CHILDREN(ring_node); 3165 SYSCTL_ADD_ULONG(ctx, ring_list, OID_AUTO, "packets", 3166 CTLFLAG_RD, &tx_ring->packets, "TX packets"); 3167 SYSCTL_ADD_ULONG(ctx, ring_list, OID_AUTO, "bytes", 3168 CTLFLAG_RD, &tx_ring->bytes, "TX bytes"); 3169 } 3170 3171 for (i = 0; i < priv->rx_ring_num; i++) { 3172 rx_ring = priv->rx_ring[i]; 3173 snprintf(namebuf, sizeof(namebuf), "rx_ring%d", i); 3174 ring_node = SYSCTL_ADD_NODE(ctx, node_list, OID_AUTO, namebuf, 3175 CTLFLAG_RD, NULL, "RX Ring"); 3176 ring_list = SYSCTL_CHILDREN(ring_node); 3177 SYSCTL_ADD_ULONG(ctx, ring_list, OID_AUTO, "packets", 3178 CTLFLAG_RD, &rx_ring->packets, "RX packets"); 3179 SYSCTL_ADD_ULONG(ctx, ring_list, OID_AUTO, "bytes", 3180 CTLFLAG_RD, &rx_ring->bytes, "RX bytes"); 3181 SYSCTL_ADD_ULONG(ctx, ring_list, OID_AUTO, "error", 3182 CTLFLAG_RD, &rx_ring->errors, "RX soft errors"); 3183 } 3184 } 3185 */ 3186